1. Technical Field
Embodiments of this disclosure are related to semiconductor packaging, and in particular to semiconductor packages that include heat sinks for passive cooling of a semiconductor die.
2. Description of the Related Art
As semiconductor packaging has evolved to accommodate the increasing complexity and miniaturization of semiconductor devices, a number of different packaging structures have been developed to meet various specifications. These include Ball Grid Array (BGA), Flip-Chip (FC), and Thermal Enhancement (TE).
In BGA, an array of solder balls is arranged on a bottom surface of the package. The ball grid array is aligned with a corresponding array of contact pads on the surface of a circuit board, and the assembly is heated until the solder of the balls melts and reflows to electrically and mechanically couple the package to the circuit board. In an FC structure, contact pads on the active face of a semiconductor die are directly coupled to another circuit structure, such as a laminate base of a chip package or a circuit board. This usually entails inverting the die to place the active face of the die against the other circuit structure, hence the name. The electrical connection is typically made via solder balls (i.e., BGA). A laminate base is generally used in applications where the grid of contact pads on the semiconductor die is at a finer pitch than the contact pads on the circuit board to which the die is to be attached. The laminate base has “landing pads” on its upper surface to receive the array of solder balls coupled to the pads of the die, which are coupled, via a redistribution layer, with corresponding pads on its lower surface that are arranged at a pitch corresponding to the array of pads on the circuit board. The lateral dimensions of the laminate are greater than those of the die to accommodate the coarser pitched array on its lower surface. Finally, in TE, a heat sink is incorporated into the package and thermally coupled to the semiconductor die to improve the thermal performance of the package.
In the example shown in
Additional passive electronic devices 112, such as, e.g., resistors, inductors, and capacitors, can be mounted to the laminate base 102 around the die 104 in a space between the heat spreader 108 and the laminate 102. This can be very beneficial, especially where the passive devices are closely associated with the circuit on the die 104, as explained below.
In many systems, passive devices that are external to an integrated circuit die are required to establish selectable parameters of various circuits integrated into the circuit on the die. For example, such passive devices can be used to establish the frequency or range of an oscillator, the range of a filter, the value of a reference voltage, etc. In such cases, the die might have pairs of contact terminals that are to be coupled only to terminals of respective resistors or capacitors. In a standard arrangement, the passive devices would be mounted to a circuit board together with a semiconductor package, with circuit traces formed in or on the circuit board coupling terminals of the passive devices to corresponding contacts of the package. By mounting the passive devices inside the package, the connections between the die and the passive devices can be made internal to the package. This reduces the number of contacts between the package and the circuit board, and also reduces the number of components that are mounted to the circuit board.
Because the overall dimensions of the package 100 are determined by the pitch and number of contacts of the BGA 107 on the bottom of the package rather than the size of the die 104, the inclusion of the passive devices 112 in the package in otherwise unused space on the upper side of the laminate base does not appreciably increase the footprint of the package. Meanwhile, the circuit board to which the package 100 is to be attached does not need to carry those passive devices, and can therefore be made less complex and more compact.
The heat spreaders 108, 122, 132 of
According to an embodiment, a heat spreader is provided, for use in semiconductor packages, that has a depth sufficient to receive passive devices therein, and that includes a projection extending from an inner face of the heat spreader to make thermal contact with a back surface of a semiconductor die.
According to an embodiment, a heat spreader is provided, including a rim formed around the perimeter of the heat spreader and having a rim face defining a first plane. A web having an inner face is coupled to and extends inward from the rim. A projection extends from the inner face of the web toward the first plane, and includes a projection face lying in a second plane parallel to the first plane.
The heat spreader can be formed by any of a number of processes, including stamping, fine blanking, injection molding of metallic or ceramic material, and machining of metallic blanks.
According to an embodiment, the heat spreader is included as part of a semiconductor package. The rim is sized to be coupled to the perimeter of a laminate base to which a semiconductor die is coupled. Passive devices are also coupled to the laminate base and completely enclosed with the die by the heat spreader. The die is thinned to less than 500 μm, and preferably less than 200 μm. As a result, the die is thinner than the passive devices. Accordingly, the projection face extends inward from the inner face of the web to make close thermal contact with the surface of the semiconductor die, while providing space around the die for the passive devices.
While the TEFCBGA packages described above with reference to
As temperature increases, the laminate undergoes greater linear expansion than the silicon die. As a result, the solder joints between the die and the laminate are subjected to significant shear stress, which can cause failure of the solder joints, particularly those nearest to the perimeter of the die. The likelihood of such failure increases over time, as the solder joints become fatigued by repeated thermal cycling. Additionally, the package undergoes distortion caused by the unequal expansion of the die and laminate. Because the laminate expands at a greater rate than the die, the outer edges of the laminate tend to curl upward from the center (toward the die), which produces tensile stress on the solder joints between the laminate and PCB, especially around the perimeter of the array, again resulting in potential failure of the solder joints, or delamination of the PCB.
The problems outlined above increase in direct relation to the size of the semiconductor die. Thus, as die size increases, the average reliability and working life of a given device decreases. This is a significant problem, in view of the fact that the current market trends toward miniaturization and increased functionality means that semiconductor device manufacturers are under pressure to incorporate more systems and functions into individual devices. The result is that size and circuit density of semiconductor devices are both increasing.
The undesirable effects of thermal mismatch in electronic components can be reduced by thinning the semiconductor die. A typical die is around 750 μm-1 mm in thickness, but dice can be thinned to a significant degree using various known chemical and manufacturing processes, in some case to as thin as around 50-200 μm. Thinning the die can significantly reduce the effects of thermal mismatch, including both strain and warpage, thereby increasing the reliability of the device and of the connection between the device and a circuit board.
However, with respect to the TEFCBGA packaging described in the background, thinning the die results in a gap between the back face of the die and the inner face of the heat spreader, which affects the transfer of heat from the die to the spreader. To compensate for the increased gap, a thicker layer of thermal interface material can be provided between the back face of the die and the heat spreader. However, most thermal interface materials have a lower value of thermal conductivity than materials commonly used for heat spreaders, so the thicker layer attenuates the transfer of heat from the die to the spreader. The result is that the average operating temperature of the die is increased, which can negatively affect the operation of the semiconductor device in well known ways, and also increases the thermal mismatch, which tends to cancel some of the benefits obtained by thinning the die.
One possible solution is to reduce the height of the heat spreader to eliminate the gap. However, if the clearance inside the heat spreader is reduced to the height of the thinned die, there is not sufficient space to receive the passive devices between the spreader and the laminate, so the advantages of mounting the passive devices inside the package are lost.
The package 200 includes a laminate base 102, a thinned semiconductor die 201 mounted to the laminate base, and a hat-top-style heat spreader 202 mounted to the laminate base over the semiconductor die. The heat spreader 202 includes a rim 210 having a face 206 that extends fully around a perimeter of the spreader, and that lies in a first plane P1, a web 205, and a projection 204. The rim 210 is coupled to the projection 204 by the web 205. The rim face 206 is sized and shaped to be adhered to the back face 103 of the laminate base 102 around its perimeter. An inner face 207 of the web 205 lies in a second plane P2 that is separated from the first plane P1 by a distance sufficient to provide clearance between the laminate base 102 and the inner face for the placement of passive devices 112 on the laminate base 102. The projection 204 includes a projection face 208 that lies in a third plane P3 and that extends forward from the inner face 207 toward the laminate base 102 a distance sufficient to bring the projection face into close contact with a back surface 203 of the thinned semiconductor die 201. Lateral dimensions of the projection face 208 are preferably at least equal to lateral dimensions of the semiconductor die 201 so that the projection face is in direct contact with the die over the entire back surface 203. This provides the maximum possible surface area for transfer of heat from the die to the heat spreader 202.
The rim face 206 of the heat spreader 202 is coupled to the back face 103 of the laminate base 102 by any appropriate method, including adhesive, fasteners, solder, etc. For the purpose of this disclosure, it is assumed that a suitable adhesive is employed to couple the rim face 206 to the back face 103 of the laminate base 102. While such adhesive will typically constitute a very thin layer between the rim face 206 and the back face 103, it will have some thickness. Nevertheless, for the purpose of this disclosure, the rim face 206 and the back face 103 will be considered to be coplanar. Thus, a minimum distance between the first and second planes P1, P2 can be defined as being equal to the distance from the back face 103 of the laminate base 102 to the back-most point or surface of the tallest of the passive devices 112. At that distance, the inner face 207 will be in direct contact with that backmost point. One of ordinary skill in the art will recognize that in practice, the minimum distance can be reduced by an amount equal to any space introduced between the rim face 206 and the back face 103 by an adhesive or other fastening means.
Likewise, although a thermal interface material between the back face 203 of the die and the projection face 208 of the spreader is preferably as thin as possible, any thickness introduced will be ignored for the purpose of defining a spacing between the first plane P1 and the third plane P3. Thus, assuming passive devices 112 having thicknesses of no more than 1 mm and a thinned die 201 having a thickness, including the thickness of a BGA 106 coupling the die to the laminate 102, of 150 μm, the distance between the first plane P1, and the second plane P2 can be 1 mm or more. Given a spacing of 1 mm between P1 and P2, the spacing between the second plane P2 and the third plane P3 is 850 μm, so that the distance between the first and third planes is equal to the thickness of the die 203.
Because the inner surface 208 of the projection portion 204 is in close contact with the back surface 203 of the thinned semiconductor die 201, thermal transfer from the die to the heat spreader 202 is substantially equal to thermal transfer from the die 104 to the spreader 132 described above with reference to
The heat spreader 202 is manufactured from sheet metal in a stamping operation that is, except for the stamping dies used, substantially identical to the operation employed to manufacture the heat spreader 132 of
Finally, the clearance space between the laminate base 102 and the inner surface 207 of the web 205 can be selected and manufactured to accommodate passive devices of different sizes and shapes, without regard for the thickness of the semiconductor die 201. This is not possible with the prior art heat spreaders; if the clearance were increased to accommodate a passive device that was thicker than the die, this would result in a separation between the die and the spreader, and would reduce heat transfer.
The heat spreader 222 comprises a stiffener 223 and a lid 224. The lid 224 includes a projection portion 225 and a flange 221. The projection portion 225 has a projection face 227 that is in close contact with the back face 203 of the semiconductor die 201. The flange 221 includes an inner face 226. The stiffener, acting as a rim, is attached to the base 102 on one side, and to the flange 221 of the lid 224 on the other side, by means of a suitable adhesive, or its equivalent. The flange 221 acts as a web to couple the stiffener 223 to the projection portion 225. A thickness of the stiffener 223 is selected to accommodate the thickness of the passive devices 112, while the distance the projection 225 extends inward from the inner face 226 is selected to permit close contact with the semiconductor die, given the thickness of the stiffener 223.
Operation of the heat spreader 222 is substantially identical to that of the heat spreader 204 described above with reference to
One advantage of the heat spreader 222 of
Embodiments are described as including passive devices positioned on a laminate base and covered by a heat spreader. According to other embodiments, active devices are also positioned on the laminate base. For example, according to an embodiment, a power transistor is positioned on the laminate base. A thickness of the power transistor and the spacing between first and second planes P1 and P2 are selected to be substantially equal, so that the inner face of the heat spreader contacts the transistor and acts also to conduct heat from the power transistor.
Devices that are formed on semiconductor material substrates—e.g., silicon wafers—are generally formed on only one surface thereof, and actually occupy a very small part of the total thickness of the substrate. This surface is generally referred to as the active, front, or top surface. Likewise, for the purposes of the present disclosure and claims, the terms front and back are used to establish an orientation with reference to a semiconductor wafer or die. For example, where a device includes a semiconductor die, reference to a front surface of some element of the device can be understood as referring to the surface of that element that would be uppermost if the device as a whole were oriented so that the active surface of the die was the uppermost part of the die. Of course, a back surface of an element is the surface that would be lowermost, given the same orientation of the device. Use of either term to refer to an element of such a device is not to be construed as indicating or requiring an actual physical orientation of the element, the device, or the associated semiconductor component, and, where used in a claim, does not limit the claim except as explained above.
In describing the embodiments illustrated in the drawings, directional references, such as right, left, upper, lower, etc., may be used to refer to elements or movements as they are shown in the figures. Such terms are used to simplify the description and are not to be construed as limiting the claims in any way.
Ordinal numbers, e.g., first, second, third, etc., are used in the claims and specification according to conventional practice, i.e., for the purpose of clearly distinguishing between claimed elements or features thereof. The use of such numbers does not suggest any other relationship, e.g., order of operation or relative position of such elements, nor does it exclude the possible combination of the listed elements into a single, multiple-function structure or housing. Furthermore, ordinal numbers used in the claims have no specific correspondence to those used in the specification to refer to elements of disclosed embodiments on which those claims read.
The term coupled, as used in the specification and claims, includes within its scope indirect coupling, such as when two elements are coupled with one or more intervening elements even where no intervening elements are recited. For example, where a claim recites a semiconductor die coupled to a package laminate, this language reads on embodiments in which the die is coupled via a plurality of solder balls or any other means, including other intervening structures.
The abstract of the disclosure is provided as a brief outline of some of the principles of the disclosure according to one embodiment, and is not intended as a complete or definitive description of any embodiment thereof, nor should it be relied upon to define terms used in the specification or claims. The abstract does not limit the scope of the claims.
Elements of the various embodiments described above can be combined, and further modifications can be made, to provide further embodiments without deviating from the spirit and scope of the disclosure.
These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.