Claims
- 1. A semiconductor package comprising, a low thermally conductive cap secured to a high thermally conductive substrate using a seal band, wherein said seal band secures said high thermally conductive substrate to at least one first high thermally conductive material, and wherein at least one low thermally conductive material secures said at least one first high thermally conductive material to at least one second high thermally conductive material, and wherein said at least one second high thermally conductive material is in secure contact with said low thermally conductive cap.
- 2. The semiconductor package of claim 1, wherein said seal band is selected from a group comprising nickel/gold, gold/tin, tin/silver and alloys thereof.
- 3. The semiconductor package of claim 1, wherein said first high thermally conductive material is selected from a group comprising gold/tin, tin/silver, tin/lead and alloys thereof.
- 4. The semiconductor package of claim 1, wherein said second high thermally conductive material is selected from a group comprising gold/tin, tin/silver, tin/lead and alloys thereof.
- 5. The semiconductor package of claim 1, wherein said low thermally conductive material is selected from a group comprising nickel/iron, alloy 42, alloy 45 and alloys thereof.
- 6. The semiconductor package of claim 1, wherein material for said low thermally conductive cap is selected from a group comprising nickel/iron, alloy 42, alloy 45 and alloys thereof.
- 7. The semiconductor package of claim 1, wherein said high thermally conductive substrate is an aluminum nitride substrate.
- 8. The semiconductor package of claim 1, wherein said first high thermally conductive material is secured to said seal band on said high thermally conductive substrate using a furnace reflow process.
- 9. The semiconductor package of claim 1, wherein said low thermally conductive cap is secured to said second high thermally conductive material using a seam sealing process.
- 10. The semiconductor package of claim 1, wherein said low thermally conductive cap forms a hermetic seal with said high thermally conductive substrate.
- 11. The semiconductor package of claim 1, wherein at least one semiconductor element is secured to said high thermally conductive substrate.
- 12. The semiconductor package of claim 1, wherein at least one semiconductor element is secured to said high thermally conductive substrate, and wherein said semiconductor element is selected from a group comprising semiconductor chip, thin film wiring and decoupling capacitor.
- 13. The semiconductor package of claim 1, wherein said high thermally conductive substrate has a thermal conductivity in the range from about 140 W/mK to about 210 W/mK.
- 14. The semiconductor package of claim 1, wherein said low thermally conductive material has a thermal conductivity in the range from about 14 W/mK to about 20 W/mK.
- 15. The semiconductor package of claim 1, wherein said first or said second high thermally conductive material has a thermal conductivity in the range from about 50 W/mK to about 60 W/mK.
CROSS-REFERENCE TO RELATED PATENT APPLICATION
This Patent Application is related to U.S. patent application Ser. No. 08/792,073, filed on Jan. 31, 1997, FI9-96-147, entitled "HERMETIC SEALING OF A SUBSTRATE OF HIGH THERMAL CONDUCTIVITY USING AN INTERPOSER OF LOW THERMAL CONDUCTIVITY", assigned to the assignee of the instant Patent Application, and the disclosure of which is incorporated herein by reference.
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