HIGH CAPACITY LOW COST MULTI-STATE MAGNETIC MEMORY

Abstract

One embodiment of the present invention includes a multi-state current-switching magnetic memory element having a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.

Description

IN THE DRAWINGS

FIG. 1 shows relevant layers of a multi-state current-switching magnetic memory element 100 are shown, in accordance with an embodiment of the present invention.

FIG. 2 shows various states of the memory element 100.

FIG. 3 shows a graph of the level of resistance (R) of each of the layers 118, 114, 110 and 106 (shown in the y-axis) vs. the state of the memory element 100.

FIG. 4 shows a graph 250 of the tunneling magneto resistance (TMR), shown in the y-axis, vs. the resistance area (RA). FIG. 5 shows.

FIG. 5 shows relevant layers of a multi-state current-switching magnetic memory element 600 are shown, in accordance with another embodiment of the present invention.

FIG. 6 shows relevant layers of a multi-state current-switching magnetic memory element 700, in accordance with yet another embodiment of the present invention.

FIG. 7 shows relevant layers of a multi-state current-switching magnetic memory element 800, in accordance with still another embodiment of the present invention.

FIG. 8 shows a program/erase circuit for programming and/or erasing the memory elements of the various embodiments of the present invention.

FIG. 9 shows a read circuit for reading the memory elements of the various embodiments of the present invention.

Claims

1. A multi-state current-switching magnetic memory element comprising: a stack of magnetic tunneling junctions (MTJs) separated by a non-magnetic layer, the stack for storing more than one bit of information,wherein different levels of current applied to the memory element cause switching to different states.

2. A multi-state current-switching magnetic memory element, as recited in claim 1, wherein the barrier layers of the MTJs each have a thickness that is different from the thickness of the barrier layers of the other MTJs thereby causing the MTJ to have a unique resistance.

3. A multi-state current-switching magnetic memory element, as recited in claim 1, wherein the aspect ratio of each of the MTJs is different than the aspect ratio of the other MTJs in the stack.

4. A multi-state current-switching magnetic memory element, as recited in claim 1, wherein the aspect ratio of the MTJs are 1 to 10.

5. A multi-state magnetic memory element, as recited in claim 4, wherein each of the MTJ include a fixed layer and a free layer and a barrier layer, the fixed layer and the free layer being separated from each other by the barrier layer.

6. A multi-state magnetic memory element, as recited in claim 3, further including a pinning layer formed adjacent to the fixed layer of each of the MTJs.

7. A multi-state magnetic memory element, as recited in claim 6, further including a bottom electrode on top of which is formed the pinning layer of one of the MTJs.

8. A multi-state magnetic memory element, as recited in claim 7, further including a top electrode formed on top of the pinning layer of one of the MTJs.

9. A multi-state magnetic memory element, as recited in claim 8, wherein the barrier layer of each of the MTJs is made substantially of magnesium oxide (MgO).

10. A multi-state magnetic memory element, as recited in claim 9, wherein the fixed layer of each of the MTJs is made substantially of a magnetic material.

11. A multi-state current-switching magnetic memory element comprising: A first magnetic tunneling junctions (MTJ) formed on top of a bottom electrode;A second MTJ separated from the first MTJ by an insulation layer;A top electrode formed on top of the second MTJ,wherein different levels of current applied to the memory element cause switching to different states.

12. A multi-state current-switching magnetic memory element, as recited in claim 12, further including a first pinning layer formed between the bottom electrode and the first MTJ.

13. A multi-state current-switching magnetic memory element, as recited in claim 12, further including a second pinning layer formed between the insulation layer and the and the second MTJ.

14. A multi-state magnetic memory element, as recited in claim 13, wherein the fixed layer of each of the MTJs is made substantially of a magnetic material.

15. A multi-state magnetic memory element, as recited in claim 14, wherein the barrier layer of each of the MTJs is made substantially of magnesium oxide (MgO).

16. A multi-state current-switching magnetic memory element, as recited in claim 15, wherein each MTJ includes a fixed layer, a barrier layer and a free layer, the barrier layer separating the fixed and free layers.

17. A multi-state current-switching magnetic memory element, as recited in claim 16, further including more than two MTJs.

18. A multi-state current-switching magnetic memory element comprising: A bottom electrode;A pinning layer;A first magnetic tunneling junctions (MTJ) formed on top of the pinning layer;A second MTJ formed on top of the pinning layer;A trench disposed between the first and second MTJs;A top electrode formed on top of the first and second MTJs and the trench,wherein different levels of current applied to the memory element cause switching to different states.

19. A multi-state current-switching magnetic memory element, as recited in claim 18, further including more than two MTJs.

20. A method of making a multi-state current-switching magnetic memory element comprising: depositing a first pinning layer on top of a bottom electrode;depositing one of a stack of magnetic tunneling junctions (MTJs) on top of the first pinning layer;forming a non-magnetic layer on top of the first MTJ;forming a second of the stack of MTJs on top of the non-magnetic layer;depositing a second pinning layer on top of the second MTF;depositing a top electrode on top of the second pinning layer,wherein different levels of current applied to the memory element cause switching to different states.