Patent Application
20090277670
This disclosure relates to a printed circuit board having first and second circuit board joined together and in particular to a printed circuit board having pad-to-pad connectors coupling adjoining signal layers between the first and second circuit board.
Printed circuit boards (“PCB”) are generally fabricated from a plurality of laminated layers. Each of the layers typically consist of a core being fabricated from an insulating material, such as FR-4, epoxy glass, polyester or synthetic resin bonded paper for example. Typically, a copper layer is bonded to one or both sides of the core. Circuits or “traces” are formed on the copper by applying a mask and removing unneeded copper. The individual layers are then laminated together to form the PCB.
Due to constraints in the manufacturing processes, the size of the PCB is limited. To accommodate the need for larger PCBs_ and backplanes, various methods of joining multiple PCBs_ have been proposed. One such method is illustrated in
The external card approach provides a means for coupling together multiple PCBs, however, there are several drawbacks. The external cards 18 require additional height or add undesired thickness to the PCBs_and therefore can not be used in applications with space constraints. The connections also require through-vias 20 which are expensive to manufacture are parasitic in nature and adversely impact the impedance. Further, the external cards 18 require internal PCB vias within the card 18 which reduces signal quality.
While existing systems for coupling multiple PCBs_ are adequate for their intended purposes, it is desirable to have a PCB assembled from multiple PCBs that requires provides a smaller profile and improves signal quality between the circuit boards.
A printed circuit board assembly is provided having a first printed circuit board. The first printed circuit board includes a first signal layer having a first side and a second signal layer. The first and second signal layers are positioned in a laminate arrangement wherein one end of said first layer extends beyond said second layer by a first distance. A second printed circuit board is also provided having a third signal layer. The third signal layer has a second and fourth signal layers that are positioned in a laminate arrangement wherein said third layer extends beyond said second layer by said first distance. A conductor is positioned between and electrically coupling the first signal layer first side and said third signal layer second side.
Another printed circuit board embodiment is also provided having a first printed circuit board. The first printed circuit board includes a first core having a first signal layer and a second signal layer. A first fill layer is arranged in contact with the second signal layer. A second core having a third signal layer and a fourth signal layer is arranged such that said third signal layer is in contact with the fill layer. The second core is positioned with an end offset from an end of said first core by a first distance. A second printed circuit board is also provided having a third core having a fifth signal layer and a sixth signal layer. A second fill layer is in contact with the fifth signal layer. A fourth core having a seventh and eighth signal layer is positioned such that the third signal layer is in contact with the second fill layer. The fourth core is positioned with an end offset from an end of the third core by the first distance. A connector is also provided between the first fill layer and the second fill layer, wherein the connector electrically couples the second signal layer and the seventh signal layer.
Another printed circuit board embodiment is provided with a first circuit board having a plurality of cores. Each of the cores has a first and second signal layer and is further separated by a nonconductive first fill layer. The plurality of cores is positioned such that the first signal layer of each core extends beyond the adjacent first fill layer to define a stair-step profile arrangement. A second circuit board is provided also having a plurality of cores. Each of the second circuit board cores has a third and fourth signal layer. A nonconductive second fill layer also separates each of the second circuit board cores. The plurality of second circuit board cores are positioned such that the fourth signal layer of each core extends beyond the adjacent second fill layer to define an inverted stair step profile arrangement. The second circuit board is positioned in series with the first circuit board wherein each of the first signal layers is electrically coupled to one of the fourth signal layers.
The use of the terms “a” and “an” and “the” and similar references in the context of describing the invention (especially in the context of the following claims) are to be construed to cover both the singular and the plural, unless otherwise indicated herein or clearly contradicted by context. The modifier “about” used in connection with a quantity is inclusive of the stated value and has the meaning dictated by the context (e.g., it includes the degree of error associated with measurement of the particular quantity). All ranges disclosed herein are inclusive of the endpoints, and the endpoints are independently combinable with each other.
With reference now to
In the exemplary embodiments, the sub-circuit boards 32, 34 are multi-layer printed circuit boards. The PCBs are made by bonding a layer of copper over a substrate, referred to as a core, to form a blank board. The core may be manufactured from any suitable nonconductive material such as fiberglass, polyimide, FR-4, FR-2, BT-Epoxy, cyanate ester, pyrlux, or polytetraflouroethylene for example. In the exemplary embodiment, the sub-circuit boards 32, 34 include a copper layer on both sides of the core.
Once the copper layers are bonded, the layers are then subsequently processed to remove un-needed copper and create the desired “traces” or signal paths on each side of the core. The traces may be formed to using a mask that protects the traces during subsequent etching processes. Several different processes may be used to remove the copper, such as but not limited to silkscreen printing and etching, photoengraving, and milling. Alternative processes for forming the board layer also include processes that add the copper traces to the board rather than removing the copper layer.
The sub-circuit board 32, includes a number of individual layers. A layer 44 consists of a core 36 with a first signal layer 38 and a second signal layer 40. A fill layer 42 separates the core 36 and signal layers 38, 40 from the adjacent cores/signal-layers within the sub-circuit board 32. The sub-circuit board 32 may also include optional outer layers 46 to provide a layer for mounting surface mount components for example. In the exemplary embodiment, the sub-circuit board 32 includes six layers with an additional outer layer 46 on one side.
The individual layers 44 are arranged as a laminate to form the sub-circuit board 32. The layers 44 are further arranged with different lengths and the end portions are staggered to form a stair-step profile 48. This arrangement results in a portion 50 of the first signal layer 38 for each layer 44 being exposed when sub-circuit board 32 is in the unassembled state. The sub-circuit board 32 may further include one or more layers 56 that are the same length as the adjacent layer 44. As will be discussed in more detail below, these layers 56 do not interconnect with sub-circuit board 34. Further, it should be appreciated that while the layers 44 are described herein as having a different length, the layers 44 may alternatively be the same length. In this embodiment, two stair-step profiles may be arranged on each end of the sub-circuit board 32. Further, it should be appreciated that while the non-interconnecting layer 56 is illustrated on the side of the sub-circuit board 32, this type of layer 56 may be positioned within the interior of the laminate arrangement as well.
Each exposed portion 50 includes one or more signal pads 52. The signal pads 52 electrically communicate with the traces on the individual layers 44. In the exemplary embodiment, there is a plurality of signal pads extending across the length of the exposed portion 50. The sub-circuit board 32 further includes one or more fastener holes 52 that are sized to receive a fastener, such as bolt 54 for example.
Similar to sub-circuit board 32, sub-circuit board 34 includes a plurality of layers 58. Each layer 58 includes a fill layer 66 adjacent to a core 60. A third signal layer 62 and a fourth signal layer 64 are bonded to the core 60 and have the desired traced formed thereon. The layers 58 are arranged in a laminate manner as described above. The layers are further arranged in an inverse stair-step profile 68. The stair-step profile 68 creates a second exposed portion 70 on each of the fourth signal layers of each layer 58.
In addition to the layers 58, sub-circuit board 34 may further include an optional outer layer 74. Non-interconnected layers 76 may also be included in sub-circuit board 34 as well. Similar to sub-circuit board 32, a fastener hole 78 sized to receive a fastener, such as bolt 80 for example, extends through the laminate. It should be appreciated that sub-circuit board 32 and sub-circuit board 34 are identical-mirror images of each other, at least in the stair-step portions 48, 68.
PCB 30 further includes one or more pad-on-pad connectors 82. The connectors 82 includes a carrier or “interposer body” 84 that provides support for one or more conductive columns 86. The interposer body 84 is made from a nonconductive thermoplastic or elastomer material and is sized to fit within the exposed portions 50, 70. The conductive columns 86 are arranged to align and electrically connect the signal pads 52, 72 when the PCB 30 is assembled. In the exemplary embodiment, the connectors 82 further have some elasticity and are compressible when the PCB is assembled. This elasticity provides a normal force on the respective layers 44, 58 in which the connector 82 is coupled and also reduces the inductance of the conductive column 86. The connector 82 may also be a Land Grid Array (LGA) compression connectors such as the type developed by Tyco® (Tyco electronics is a division of Tyco International Ltd) for example. However, it should be appreciated that other types of conductors, capable of connecting electrical components may also be used.
A pair of plates 88, 90 are arranged on opposite sides of the sub-circuit boards 32, 34 and span across the interconnection of the sub-circuit boards 32, 34. The plates 88, 90 are captured on the PCB 30 by the fasteners 54, 80. A second retaining fastener, such as retaining nuts 92, 94, capture the fasteners 54, 80 and maintain the interconnection between sub-circuit board 32 and sub-circuit board 34.
During the assembly of PCB 30, a connector 82 is positioned on each exposed portion 50 of sub-circuit board 32. The connectors 82 include a conductive column 86 for each signal pad 52. When assembled, the conductive columns 86 are in electrical contact with the signal pads 52 to transfer signals from the first signal layer 38. It should be appreciated that while the connectors 82 are referred to collectively, each connector 82 may have a different configuration to match that of the corresponding signal pads 52 for the layer 44 on which it is assembled.
After placing the connectors 82 on the exposed portions 50, the second sub-circuit board 34 is placed into an interconnected arrangement with sub-circuit board 32. The exposed portions 70 are arranged in contact with the connectors 82 such that the conductive columns 86 are in electrical contact with the signal pads 72. The plates 88, 90 are positioned over the interconnection point and the retaining fasteners 92, 94, capture the fasteners 54, 80. The tightening of the fasteners 54, 80, 92, 94 causes the connectors 82 to compress slightly as discussed above. This compression provides a normal force on the signal layers, such as first signal layer 38 and fourth signal layer 64 for example, to ensure a positive electrical connection and lower impedance. When assembled and the retaining fasteners 54,80, 92, 94 tightened, the adjoining layers 44, 58 are positioned in the same plane.
An alternate embodiment PCB 30 is illustrated in
Another alternate embodiment of PCB 30 is illustrated in
The printed circuit board stair-step interconnection disclosed herein provides advantages in reliably increasing the size of the printed circuit board. This interconnection arrangement provides further advantages in that it allows multiple printed circuit boards to be edge joined with minimal increases in the thickness of the printed circuit board. The interconnection arrangement provides further advantages in that no through vias are required to make the interconnection which reduces the reduces parasitic impact to signal quality, inductance of the interface, and lowers costs.
The diagrams depicted herein are just examples. There may be many variations to these diagrams or the steps (or operations) described therein without departing from the spirit of the invention. For instance, the steps may be performed in a differing order, or steps may be added, deleted or modified. All of these variations are considered a part of the claimed invention.
While the invention has been described with reference to exemplary embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed as the best mode contemplated for carrying out this invention.
