This application claims the benefit of priority to Taiwanese Patent Application No. 111147073 filed on Dec. 8, 2022, which is hereby incorporated by reference in its entirety.
The present invention relates to a transistor, in particular to a high electron mobility transistor.
A high electron mobility transistor (HEMT) is a field effect transistor that uses semiconductor materials with different energy gaps to form a two-dimensional electron gas (2DEG) layer at the junction. Due to the high electron mobility of the two-dimensional electron gas, HEMTs can provide advantages such as high breakdown voltage, low resistance and high electron mobility and are widely used in high-power electronic devices.
Depending on different designs and functions, HEMTs can be sorted into the enhancement-mode (E-mode) HEMT and the depletion-mode (D-mode) HEMT. In the case of the depleted AlGaN/GaN HEMT, undoped GaN serving as a channel layer grows on carbon-doped (C-doped) GaN, and then AlGaN grows on the channel layer to form a covering layer. By means of the polarization effect of AlGaN and GaN, a two-dimensional electron gas layer can be formed in the channel layer. However, the GaN material used in conventional designs still has limitations in electron mobility, which affects the electrical characteristics of HEMT devices.
Therefore, how to design a high electron mobility transistor that can improve electron mobility is indeed a topic worthy of research.
One of the objectives of the present invention is to provide a high electron mobility transistor using a two-dimensional material structure.
To achieve the above objective, the present invention provides a high electron mobility transistor, which includes a substrate, a buffer layer, a gallium nitride layer, a two-dimensional material structure, a covering layer, a drain, a source and a gate. The buffer layer is located on the substrate. The gallium nitride layer is located on the buffer layer and forms a channel layer. The two-dimensional material structure is located on the channel layer. The covering layer partially covers the two-dimensional material structure. The drain and the source are arranged on the two-dimensional material structure, and the gate is arranged on the covering layer.
In one embodiment of the present invention, the two-dimensional material structure includes two connection parts and an extension part, each connection part is connected to the extension part, and each connection part has a thickness greater than that of the extension part.
In one embodiment of the present invention, the extension part is made of at least one two-dimensional material layer.
In one embodiment of the present invention, wherein each connection part is made by stacking a plurality of two-dimensional material layers, and a number of the plurality of two-dimensional material layers is greater than 5.
In one embodiment of the present invention, the plurality of two-dimensional material layers are a bulk structure.
In one embodiment of the present invention, any one of the plurality of two-dimensional material layers has a size not smaller than that of an adjacent two-dimensional material layer stacked thereon.
In one embodiment of the present invention, the drain and the source are respectively located on the two connection parts to form an ohmic contact.
In one embodiment of the present invention, the transistor further includes a gradient structure formed at a junction between each connection part and the extension part, wherein a thickness of the gradient structure gradually decreases from the respective connection part toward the extension part.
In one embodiment of the present invention, the covering layer covers only the extension part of the two-dimensional material structure, and a top surface of the covering layer is flush with a top surface of each connection part.
In one embodiment of the present invention, the covering layer covers only the extension part of the two-dimensional material structure, and a top surface of the covering layer is not flush with a top surface of each connection part.
In one embodiment of the present invention, the two-dimensional material structure is made of a material selected from a group consisting of MoS2, WS2, α-P, Sb, TiCO2, Hf2CO2, Zr2CO2, BCN, B2Se2, BCP, BP, and BAs.
In one embodiment of the present invention, the covering layer is made of aluminum gallium nitride.
Accordingly, the high electron mobility transistor of the present invention can effectively improve the electron mobility of the channel layer by the characteristics of the two-dimensional material and improve the device characteristics of the high electron mobility transistor accordingly. Moreover, the effect of turning on or off the control device can be achieved by adjusting the reverse bias applied to the gate.
Since various aspects and embodiments are only illustrative and non-restrictive, those skilled in the art may conceive other aspects and embodiments without departing from the scope of the present invention. The features and advantages of these embodiments will become apparent from the following detailed description and the claims appended hereto.
In this disclosure, the term “one”, “a” or “an” is used to describe the elements and components described herein. This is done for convenience of explanation only and to provide a general sense of the scope of the invention. Accordingly, unless otherwise indicated, such description should be understood to encompass one or at least one, and the singular should also include the plural.
In this disclosure, the terms “first”, “second” and other similar ordinal numbers are mainly used to distinguish or refer to the same or similar elements or structures, and do not necessarily imply that these elements or structures are located in space or time sequence. It should be understood that in certain situations or configurations, ordinal words can be used interchangeably without affecting the implementation of the invention.
In this disclosure, the terms “includes,” “has,” and any other similar terms are intended to cover non-exclusive inclusions. For example, an element or structure containing plural elements is not limited to the elements listed herein, but may include other elements not expressly listed but that are generally inherent to the element or structure.
Reference is made to
The buffer layer 20 is located on the substrate 10. The buffer layer 20 serves to alleviate the stress on the surface of the substrate 10 for facilitating the formation of other semiconductor materials on the substrate 10. The buffer layer 20 can be made of materials such as aluminum nitride (AlN), aluminum gallium nitride (AlGaN), or other composite materials in the form of a superlattice structure.
The gallium nitride layer 30 is located on the buffer layer 20. In one embodiment of the present invention, the gallium nitride layer 30 may include a carbon-doped (C-doped) gallium nitride layer 31 (or a Fe-doped gallium nitride layer) near the buffer layer 20, as well as an undoped gallium nitride layer stacked on the top of the carbon-doped gallium nitride layer 31 away from the buffer layer 20 for forming a channel layer 32. The channel layer 32 can serve as the channel for the two-dimensional electron gas (2DEG).
The two-dimensional material structure 40 is located on the channel layer 32 of the gallium nitride layer 30. The two-dimensional material structure 40 is primarily made of a few-layer two-dimensional material (FL-2D material). The material of the two-dimensional material structure 40 is selected from a group consisting of MoS2, WS2, α-P, Sb, TiCO2, Hf2CO2, Zr2CO2, BCN, B2Se2, BCP, BP, and BAs. According to the disclosure of the reference “Recent Advances in the Carrier Mobility of Two-Dimensional Materials: A Theoretical Perspective, ACS Omega 2020 5 (24), 14203-14211”, the relevant data about the band gap (eV) and electron/hole mobility (103 cm2/V*s) of the aforementioned two-dimensional materials are shown in Table 1, where μ represents mobility, superscripts e and h represent electrons and holes respectively, and subscripts x and y represent the X-axis and Y-axis respectively. It can be seen that two-dimensional materials can provide superior electron and hole mobility.
As shown in
The covering layer 50 partially covers the two-dimensional material structure 40. Furthermore, the covering layer 50 mainly covers the extension part 42 of the two-dimensional material structure 40 but fails to cover the connection parts 41 of the two-dimensional material structure 40. In the present invention, the covering layer 50 is made of aluminum gallium nitride. The position of the top surface 51 of the covering layer 50 with respect to the top surface 411 of each connection part 41 varies depending on the thickness of each connection part 41 of the two-dimensional material structure 40. In this embodiment, the top surface 51 of the covering layer 50 is flush with the top surface 411 of each connection part 41. However, the present invention is not limited hereto. The top surface 51 of the covering layer 50 may be higher or lower than the top surface 411 of each connection part 41.
The drain 60 and the source 70 are disposed on the two-dimensional material structure 40. Specifically, the drain 60 is disposed on one of the connection parts 41 of the two-dimensional material structure 40 for forming an ohmic contact between the drain 60 and that connection part 41. The source 70 is disposed on the other connection part 41 for forming an ohmic contact between the source 70 and the other connection part 41. The gate 80 is disposed on the top surface 51 of the covering layer 50 for forming either an ohmic contact or a Schottky contact between the gate 80 and the covering layer 50.
Due to the high electron mobility characteristics of the FL-2D material, in the high electron mobility transistor 1 of the present invention, an electron channel with high electron mobility can be formed by the two-dimensional material structure 40 and the channel layer 32. In the following description, the two-dimensional material structure 40 is made of MoS2, but the present invention is not limited hereto. Moreover, according to the disclosure of the reference “Dirac Cones in Graphene, Interlayer Interaction in Layered Materials, and the Band Gap in MoS2, Crystals 2016, 6, 143”, it can be known that if a single two-dimensional material layer is formed of MoS2, band gap thereof is approximately 1.84 eV. If a stack structure (or a bulk structure) of the plurality of two-dimensional material layers is formed of MoS2, the band gap thereof is merely about 0.76 eV. In other words, in this case, the aforementioned stack structure exhibits approximate metallic behavior. Therefore, in the present invention, when the source 70 and the drain 60 are respectively disposed on the two connection part 41 of the two-dimensional material structure 40, it is easy to form an ohmic contact between the buck-like structure formed by MoS2 and the metal electrode. The extension part 42 of the two-dimensional material structure 40 is made of a single layer or a few-layer of MoS2 material to maintain the characteristics of high electron mobility.
Due to the high electron mobility characteristics of the aforementioned few-layer 2D materials, in the high electron mobility transistor 1 of the present invention, an electron channel with high electron mobility can be formed by the two-dimensional material structure 40 and the channel layer 32. When electrons are transferred through the two-dimensional material between the source 70 and the drain 60, the high electron mobility transistor 1 of the present invention exhibits superior electron characteristics.
Additionally, the high electron mobility transistor 1 of the present invention forms an epitaxial structure of a depletion-mode HEMT. By means of the polarization effect between the channel layer 32 and the covering layer 50, a two-dimensional electron gas (2DEG) is formed within the channel layer 32 and the two-dimensional material structure 40, and remains in a normal ON state. At this state, the gate 80 can serve as the switch of the high electron mobility transistor 1 of the present invention. By applying a bias to the gate 80, the energy band of AlGaN/GaN can be correspondingly adjusted, thereby increasing or decreasing the concentration of the two-dimensional electron gas. For example, in the case that no voltage is applied to the gate 80, the high electron mobility transistor 1 of the present invention is in the ON state; whereas in the case that a reverse bias is applied to the gate 80, the high electron mobility transistor 1 of the present invention switches to the OFF state.
Reference is made to
Additionally, in this embodiment, the top surface 51 of the covering layer 50 is higher than the top surface 411 of each connection part 41. In another word, the top surface 51 of the covering layer 50 is not flush with the top surface 411 of each connection part 41.
The above embodiments are provided for illustrative purposes and are not intended to limit the embodiments or their applications or uses. Additionally, although at least one exemplary embodiment has been presented in the above embodiments, it should be understood that various variations or modifications can be made for the present invention. It should also be understood that the embodiments described herein are not intended to limit the scope, application, or configuration of the claimed subject matter in any way. On the contrary, the embodiments described above can provide a convenient guide for those skilled in the art to implement one or more embodiments. Furthermore, various changes can be made to the functionality and arrangement of the components without departing from the scope defined by the claims, and the claims encompass known equivalents and foreseeable equivalents at the time of filing of this patent application.
Number | Date | Country | Kind |
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111147073 | Dec 2022 | TW | national |