Claims
- 1. The process for making a punch-through IGBT in a float zone silicon wafer of the N type conductivity; said process comprising the steps of forming a plurality of junctions and metallizing for said junctions on the top surface of said wafer to define at least a portion of said IGBT; removing material from the bottom surface of said wafer to reduce the thickness of said wafer to a given value; implanting hydrogen ions into the bottom surface of said wafer at an implant energy in the range of about 100 KeV to 500 KeV to define an N+ buffer layer to a given depth and concentration into said bottom surface; and forming a P− type collector region on the bottom of said N+ buffer layer; forming a backside contact atop said P− type collector region; and annealing said hydrogen implant by raising said wafer to a temperature less than the temperature which damages the top side structure of said IGBT at a time after the implant thereof.
- 2. The process of claim 1, wherein said hydrogen implant is annealed prior to the formation of said P− collector region and said backside contact.
- 3. The process for making a punch-through IGBT in a float zone silicon wafer of the N type conductivity; said process comprising the steps of forming a plurality of junctions and metallizing for said junctions on the top surface of said wafer to define at least a portion of said IGBT; removing material from the bottom surface of said wafer to reduce the thickness of said wafer to a given value; implanting hydrogen ions into the bottom surface of said wafer to define an N+ buffer layer to a given depth and concentration into said bottom surface; and forming a P− type collector region on the bottom of said N+ buffer layer; forming a backside contact atop said P− type collector region; and annealing said hydrogen implant by raising said wafer to a temperature less than the temperature which damages the top side structure of said IGBT at a time after the implant thereof; wherein said hydrogen implant is annealed during the formation of said P− collector region and backside contact.
- 4. The process of claim 1, wherein said hydrogen implant has a dose of about 1E12/cm2 to about 1E16/cm2 and is annealed at a temperature of about 300° C. to about 400° C. from about 30 minutes to about 60 minutes.
- 5. The process of claim 4, wherein said hydrogen implant is annealed prior to the formation of said P− collector region and said backside contact.
- 6. The process of claim 4, wherein said P− collector region and said hydrogen implant is annealed during the formation of said backside contact.
- 7. The process of claim 1, wherein said backside metal is a sequential layered Al/Ti/NiV/Ag metal.
- 8. The process of claim 1, wherein said P− collector region anode is formed of a boron implant which is about 0.1 micron to about 0.5 micron deep.
- 9. The process of claim 8, wherein said boron implant has a dose of about 1E14/cm2 at about 50 KeV.
- 10. The process of claim 8, wherein said backside metal is a sequential layered Al/Ti/NiV/Ag metal.
- 11. The process of claim 9, wherein said backside metal is a sequential layered Al/Ti/NiV/Ag metal.
- 12. The process of claim 7, wherein said hydrogen implant has a dose of about 1E12/cm2 to about 1E16/cm2 and is annealed at a temperature of about 300° C. to about 400° C. from about 30 minutes to about 60 minutes.
- 13. The process of claim 12, wherein said hydrogen implant is annealed prior to the formation of said P− collector region and said backside contact.
- 14. The process of claim 12, wherein said hydrogen implant is annealed during the formation of said backside contact.
- 15. The process of claim 1, wherein said P− type collector region is formed by a layer of P type amorphous silicon.
- 16. The process for making a punch-through IGBT in a float zone silicon wafer of the N type conductivity; said process comprising the steps of forming a plurality of junctions and metallizing for said junctions on the top surface of said wafer to define at least a portion of said IGBT; removing material from the bottom surface of said wafer to reduce the thickness of said wafer to a given value; implanting hydrogen ions into the bottom surface of said wafer to define an N+ buffer layer to a given depth and concentration into said bottom surface; and forming a P− type collector region on the bottom of said N+ buffer layer; forming a backside contact atop said P− type collector region; and annealing said hydrogen implant by raising said wafer to a temperature less than the temperature which damages the top side structure of said IGBT at a time after the implant thereof; wherein said hydrogen is implanted in a plurality of separate sequential steps of progressively decreasing dose and progressively increasing energy.
- 17. The process of claim 1, wherein said dose reduces from about 1E13/cm2 to 1E15/cm2 and said energy increases from 100 KeV to 200 KeV.
- 18. The process of making contact to an N type bottom surface of a silicon semiconductor wafer which has a top side structure on the top surface thereof; said process comprising the steps of implanting hydrogen ions into said N type bottom surface at an implant energy in the range of about 5 KeV to about 100 KeV to increase the N type concentration thereof and applying a backside metal contact to said implanted surface region; and raising the temperature of said wafer to a temperature less than the temperature which damages said top side structure at a time after said implant step.
- 19. The process of claim 18, wherein said hydrogen implant is annealed prior to the formation of said backside contact.
- 20. The process of making contact to an N type bottom surface of a silicon semiconductor wafer which has a top side structure on the top surface thereof; said process comprising the steps of implanting hydrogen ions into said N type bottom surface to increase the N type concentration thereof and applying a backside metal contact to said implanted surface region; and raising the temperature of said wafer to a temperature less than the temperature which damages said top side structure at a time after said implant step; wherein said hydrogen implant is annealed during the formation of said backside contact.
- 21. The process of claim 18, wherein said hydrogen implant has a dose of about 1E14/cm2 to about 1E16/cm2 and is annealed at a temperature of about 300° C. to about 400° C. for from about 30 minutes to about 60 minutes.
- 22. The process of claim 18 wherein said backside metal is a sequential layered contact of titanium, nickel-vanadium and silver.
- 23. The process of making contact to an N type bottom surface of a silicon semiconductor wafer which has a top side structure on the top surface thereof; said process comprising the steps of implanting hydrogen ions into said N type bottom surface to increase the N type concentration thereof and applying a backside metal contact to said implanted surface region; and raising the temperature of said wafer to a temperature less than the temperature which damages said top side structure at a time after said implant step; wherein said hydrogen is implanted in a plurality of separate sequential steps of progressively decreasing dose and progressively increasing energy.
- 24. The process of claim 23, wherein said dose reduces from about 1E14/cm2 to 1E16/cm2 and said energy increases from 5 KeV to 100 KeV.
- 25. The process of claim 18, wherein said semiconductor wafer defines a vertical conduction power MOSFET.
RELATED APPLICATIONS
This application relates to U.S. Ser. No. 09/566,219, filed May 5, 2000; U.S. Ser. No. 09/565,148, filed May 5, 2000; U.S. Pat. No. 6,242,288, issued Jun. 5, 2001 filed; and U.S. Ser. No. 09/565,973, filed May 5, 2000.
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