Claims
- 1. An integrated circuit comprising:A. microprocessor circuitry including input leads, output leads, and internal logic, the internal logic including an arithmetic and logic unit and an accumulator; and B. a test access port connected to a test mode select signal, a test clock signal, a test reset signal, a test data in signal, and a test data out signal, the test access port including: i. a tap controller connected to the test mode select signal, the test clock signal and the test reset signal; ii. an instruction register connected to the test data in signal, the test data out signal, and the tap controller; iii. a boundary scan register connected to the test data in signal, the test data out signal and the instruction register, the boundary scan register including a boundary scan serial scan path of registers connected to the input leads and output leads of the microprocessor circuitry; iv. a bypass register connected to the test data in signal, the test data out signal and the instruction register; and v. an emulation register connected to the test data in signal, the test data out signal and the instruction register, the emulation register including an emulation serial scan path of registers connected to the internal logic of the microprocessor circuitry and separate from the boundary scan serial scan path of registers.
- 2. An integrated circuit of claim 1 including a control register in series with the emulation serial scan path, the control register controlling at least one operation of the microprocessor circuitry.
- 3. An integrated circuit of claim 1 including a data register in series with the emulation serial scan path, the data register receiving data from the emulation serial scan path and transmitting data to the emulation serial scan path, the data register providing data to the microprocessor circuitry and receiving data from the microprocessor circuitry.
NOTICE
(C) Copyright 1989 Texas Instruments Incorporated. A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
This application is a division of Ser. No. 08/920,643 filed Aug. 29, 1997 and is a continuation in part of coassigned application Ser. No. 07/093,463, filed Sep. 4, 1987, now abandoned, and Ser. No. 07/057,078 filed Jun. 2, 1987, now U.S. Pat. No. 4,860,290.
The following coassigned applications and patents are hereby incorporated herein by reference:
U.S. Pat. No. 5,237,672;
Ser. No. 07/387,569, filed Jul. 28, 1989; abandoned;
Ser. No. 07/387,455, filed Jul. 28, 1989, abandoned;
Ser. No. 07/386,850, filed Jul. 28, 1989, abandoned;
U.S. Pat. No. 5,233,690;
U.S. Pat. No. 5,140,687;
U.S. Pat. No. 4,860,290;
Ser. No. 093,463, filed Sep. 4, 1987; abandoned;
U.S. Pat. No. 5,109,494;
U.S. Pat. No. 5,101,498;
U.S. Pat. No. 5,829,054;
U.S. Pat. No. 5,724,248;
U.S. Pat. No. 5,586,275;
U.S. Pat. No. 5,072,418;
U.S. Pat. No. 5,142,677;
U.S. Pat. No. 5,155,812; and
U.S. Pat. No. 5,907,714.
This application is among and related to coassigned application Ser. No. 07/388,270, abandoned, U.S. Pat. No. 5,535,331; U.S. Pat. No. 6,085,336, U.S. Pat. No. 5,329,471; application Ser. No. 07/387,724, abandoned; and U.S. Pat. No. 5,805,792, all filed contemporaneously and hereby incorporated herein by reference.
This invention relates to electronic data processing and emulation, simulation, and testability devices and systems, and methods of their manufacture and operation.
US Referenced Citations (6)
Number |
Name |
Date |
Kind |
4314333 |
Shibayama et al. |
Feb 1982 |
A |
4441154 |
McDonough et al. |
Apr 1984 |
A |
4788683 |
Hester et al. |
Nov 1988 |
A |
5109190 |
Sakashita et al. |
Apr 1992 |
A |
5355369 |
Greenbergerl et al. |
Oct 1994 |
A |
6055656 |
Wilson, Jr. et al. |
Apr 2000 |
A |
Continuation in Parts (2)
|
Number |
Date |
Country |
Parent |
07/093463 |
Sep 1987 |
US |
Child |
08/920643 |
|
US |
Parent |
07/057078 |
Jun 1987 |
US |
Child |
07/093463 |
|
US |