Patent Application
20110081617
1. Field of the Invention
The invention relates to an integrated lithography equipment, more particularly, to a lithography equipment capable of maintaining the temperature of wafers as the wafers
2. Description of the Prior Art
Lithography is a critical step in semiconductor fabrication to transfer the layout pattern of integrated circuits onto semiconductor wafers. Preferably, the pattern of a photomask is transferred through exposure and development processes to the photoresist formed on surface of the semiconductor wafers. In current lithography, after the wafers are coated with photoresist in the coating area of lithography equipment, a pre-baking is conducted by using a temperature between 90° C. to 120° C. to transform the liquid-state photoresist into a solid-state film, which enhances the adhesion between the photoresist and the wafer. After the pre-baking process, the wafers are idled and cooled in an idle area to approximately room temperature before an exposure process is performed on the wafers. As the cooling process takes a certain amount of time, an idle period is consumed in the lithography equipment before the wafers are being transferred to the exposure area.
It is an objective of the present invention to provide an integrated lithography equipment and related lithography process to improve the overlay accuracy of the current lithography process.
The lithography equipment includes an input/output area for loading at least one wafer, a coating a developing area for performing coating and developing processes on the wafer, an exposure processing area for exposing the wafer, and an idle and transport area disposed between the coating and developing area and the exposure processing area for isothermally or adiabatically transferring wafers between the coating and developing area and the exposure processing area and holding wafers isothermally or adiabatically.
The lithography process includes the steps of: providing a wafer; performing a first process to the wafer in a first processing area to obtain a processed wafer; and idling or transporting the processed wafer isothermally or adiabatically in an idle and transport area to a second processing area for a second process.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
The interior of a lithography equipment is typically filled with numerous electronic devices therein, including printed circuits board and functional modules utilized for controlling the equipment as well as other connecting wires. As the wafers are typically placed on top of the lithography equipment and on top of these devices during the idling period, heat generated by these devices would easily disrupt the idled wafers. For instance, heat could evaporate solvents in the photoresist directly or cause expansion or bending of the wafers. This results in serious misalignment during the pattern transfer process as well as affects the overlay accuracy.
Overlay accuracy is a key factor to control lithographic technology. Most of electric circuit patterns are formed by transferring the patterns of masks to photoresists in the lithographic processes and later transferring the patterns of photoresists to the material layers of a wafer in a subsequent etching process. Therefore, the patterns of the masks must be disposed in exact positions in every etching process for forming electric circuit patterns in each material layer. Otherwise, the electric circuit pattern in one material layer may not correspond with the underlying electric circuit pattern and failure of the fabricated electric circuits would result. It has been found that during the measurement for overlay accuracy, mis-alignment often results in vector field distribution pattern and also affects gate length and contact resistance of high voltage device substantially. Hence, how to effectively control the overlay accuracy in lithography process has become an important task.
Referring to
The idle and transport area 18 is located between the coating and developing area 16 and the exposure processing area 20. A wafer chuck 28 is disposed on the idle and transport area 18 for supporting wafers ready to be entered into the exposure processing area 20 or transported out from the exposure processing area 20 for developing process. In this embodiment, the idle and transport area 18 is further divided into a track idle area 24 and an exposure idle area 26, in which the track idle area 24 is located adjacent to the coating and developing area 16 and the exposure idle area 26 is adjacent to the exposure processing area 20.
As shown in
As shown in
In order to thermally isolate the wafers from the surrounding heat sources, the present invention could use the isolating system 38 to completely enclose or partially shield the electronic rack 36 used for containing the heat radiating electronic devices or functional modules, or completely enclose or partially shield wafers or wafer cassettes carrying the wafers to thermally isolate the wafers. The isolating system 38 preferably includes a thermal shield 40 composed of aluminum foil, plastic or other thermal isolating material, but not limited thereto. The thermal shield 40 is preferably used to shield the plane between the electronic rack 36 containing circuit boards, devices, functional modules, or wires and the susceptible wafer, which effectively prevents the evaporation of solvents within the photoresist from the heat produced by these devices within the electronic rack 36 as the wafers are idled in the idle and transport area 18, and also prevents phenomenon such as expansion of the wafers. In addition, the thermal shield 40 composed of same or different thermal isolating material could also be used to enclose or partially shield the wafers or wafer cassettes containing the wafers, thereby prevention evaporation of solvents within the photoresist that have been previously coated on surface of the wafers. Despite the present embodiment preferably shield the plane between the electronic rack 36 and the susceptible wafer with the thermal shield 40 to ensure that the wafers are unaffected by the heat, the electronic rack 36 and the wafers or wafer cassettes could all be enclosed by the thermal shield 40 simultaneously or one of them is completely enclosed and the other one is partially shielded, which are also within the scope of the present invention. The shape or dimension of thermal shield 40 can be adjusted according to different coverage levels. For example, thermal shield 40 can be a plane thin film when it is used to shield the plane between the electronic rack 36 and the susceptible wafer, while it can have a shelled-shape when is it used to cover the electronic rack 36 or the susceptible wafer.
As shown in
Referring to
The idle and transport area 68 is located between the coating and developing area 66 and the exposure processing area 70, and the idle and transport area 68 is preferably divided into a track idle area 74 and an exposure idle area 76. A wafer chuck (not shown) is disposed on the idle and transport area 68 for accommodating wafers ready to be transported into the exposure processing area 70 or transported out from the exposure processing area 70 for developing process. In this embodiment, a gap 80 is formed between the track idle area 74 and the exposure idle area 76. In other words, the track idle area 74 and the exposure idle area 76 are physically separated and as the wafers are idled in the track idle area 74, a robot arm, a transporting equipment, or manual transport is employed to transport wafers from the track idle area 76 to the exposure idle area 76, and later transported to the exposure processing area 70 for exposure process. Similarly, the robot arm, the transporting equipment, or manual transport would transport the wafers from the exposure idle area 76 back to the track idle area 74 after the exposure process is complete.
The aforementioned isolating system and heating/cooling system could also be incorporated in this embodiment to thermally isolate wafers from heat radiated by surrounding electronic devices or functional modules or actively remove heat from the wafers. For instance, a thermal shield composed of aluminum foil, plastic or other thermal isolating material could be used to enclose the electronic rack containing circuit boards, functional modules, other wires, or enclose the wafers directly, thereby preventing evaporation of solvents within the photoresists or expansion of the wafers. It should also be noted that as a robot arm is employed in this embodiment, the heating/cooling system could also be installed directly on the robot arm. By using the heating/cooling system installed on the robot arm to contact the wafers directly, the wafers could be maintained at a constant temperature.
Referring to
A lithography process is explained herein by referring back to
The wafers are then transported to the idle and transport area 18 and a natural cooling process is performed on the wafers. It should be noted that an isolating system 38 or a heating/cooling system could be installed in the idle and transport area 18 and operators could utilize the isolating system 38 to thermally isolate wafers from heat caused by surrounding electronic devices or functional modules, or utilize the heating/cooling system to actively remove heat from the wafers such that the wafers could be maintained under a constant temperature.
The isolating system 38 could include a thermal shield 40 composed of aluminum foil, plastic or other thermal isolating materials, and the operators could cover the electronic rack 36 radiating heat with this thermal shield 40, which effectively prevents evaporation of solvents within the photoresists as the wafers are idled in the idle and transport area 18. Additionally, the thermal shield 40 could also be used to enclose the wafers themselves or even cassettes carrying the wafers, which are all within the scope of the present invention.
The heating/cooling system 44 could be installed in the electronic rack 36 or within the cassettes 48 carrying the wafers 46, thereby expelling heat around the wafer 46 and maintaining the wafer 46 under a constant temperature. Te heating/cooling system 44 could also be installed inside the electronic rack 36 for directing heat outward from the rack 36 so that evaporation of solvents within the coated photoresist or wafer deformation could be prevented. The above two approaches ensures that the wafers are transported isothermally and adiabatically between the idle and transport area 18 and the exposure processing area 20 and the wafers are also maintained under a constant temperature. According to a preferred embodiment of the present invention, the temperature is maintained at +/−5% of room temperature.
Next, the wafers are transported from the idle and transport area 18 to the exposure processing area 20. After an exposure is conducted in the exposure processing area 20, a clean dry air (CDA) process is performed by using a clean air gun to dry the surface of the wafers. A wafer measurement and wafer edge exclusion processes are then conducted and the processed wafers are transported back to the coating and developing area 16. A developing process is then performed to reveal the transferred pattern of the photoresist, and a hard baking process is conducted thereafter. The hard baking process is preferably conducted under a temperature between 100° C. to 130° C. to reduce the remaining solvents within the photoresist to a minimum amount thereby increasing the adhesion and selectivity of the photoresist for later processes. This completes the lithography process according to a preferred embodiment of the present invention.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention.
