Patent Application
20190141790
The present invention relates to a heat treatment apparatus and a heat treatment method which irradiate a thin plate-like precision electronic substrate (hereinafter referred to simply as a “substrate”) such as a semiconductor wafer with light to heat the substrate.
In the process of manufacturing a semiconductor device, impurity doping is an essential step for forming a pn junction in a semiconductor wafer. At present, it is common practice to perform impurity doping by an ion implantation process and a subsequent annealing process. The ion implantation process is a technique for causing ions of impurity elements such as boron (B), arsenic (As) and phosphorus (P) to collide against the semiconductor wafer with high acceleration voltage, thereby physically implanting the impurities into the semiconductor wafer. The implanted impurities are activated by the subsequent annealing process. When annealing time in this annealing process is approximately several seconds or longer, the implanted impurities are deeply diffused by heat. This results in a junction depth much greater than a required depth, which might constitute a hindrance to good device formation.
In recent years, attention has been given to flash lamp annealing (FLA) that is an annealing technique for heating a semiconductor wafer in an extremely short time. The flash lamp annealing is a heat treatment technique in which xenon flash lamps (the term “flash lamp” as used hereinafter refers to a “xenon flash lamp”) are used to irradiate a surface of a semiconductor wafer with a flash of light, thereby raising the temperature of only the surface of the semiconductor wafer implanted with impurities in an extremely short time (several milliseconds or less).
The xenon flash lamps have a spectral distribution of radiation ranging from ultraviolet to near-infrared regions. The wavelength of light emitted from the xenon flash lamps is shorter than that of light emitted from conventional halogen lamps, and approximately coincides with a fundamental absorption band of a silicon semiconductor wafer. Thus, when a semiconductor wafer is irradiated with a flash of light emitted from the xenon flash lamps, the temperature of the semiconductor wafer can be raised rapidly, with only a small amount of light transmitted through the semiconductor wafer. Also, it has turned out that flash irradiation, that is, the irradiation of a semiconductor wafer with a flash of light in an extremely short time of several milliseconds or less allows a selective temperature rise only near the surface of the semiconductor wafer. Therefore, the temperature rise in an extremely short time with the xenon flash lamps allows only the activation of impurities to be achieved without deep diffusion of the impurities.
A heat treatment apparatus employing such xenon flash lamps is disclosed in Japanese Patent Application Laid-Open No. 2010-225645 in which the flash lamps are disposed on the front surface side of a semiconductor wafer whereas halogen lamps are disposed on the back surface side thereof, so that a desired heat treatment is performed by the combination of the flash lamps and the halogen lamps. In the heat treatment apparatus disclosed in Japanese Patent Application Laid-Open No. 2010-225645, the semiconductor wafer is preheated to a certain degree of temperature by the halogen lamps, and the temperature of the semiconductor wafer is thereafter increased to a desired treatment temperature by flash irradiation from the flash lamps.
In general, not only heat treatment but also processing or treatment of semiconductor wafers is performed lot by lot (a group of semiconductor wafers subjected to the same processing or treatment under the same condition). In a single-wafer type substrate processing apparatus, semiconductor wafers in a lot are processed sequentially in succession. In a flash lamp annealer, semiconductor wafers in a lot are also transported one by one into a chamber and heat-treated sequentially.
When a flash lamp annealer in a nonoperational condition starts treatment of a lot, the first semiconductor wafer in the lot is transported into a chamber that is at approximately room temperature and is then heat-treated. During heating treatment, the semiconductor wafer supported by a susceptor in the chamber is preheated to a predetermined temperature, and the temperature of the front surface of the semiconductor wafer is further increased to a treatment temperature by flash heating. As a result, heat transfer occurs from the semiconductor wafer increased in temperature to in-chamber structures (structures in the chamber) including a susceptor and the like, so that the temperature of the susceptor and the like also increases. Such an increase in temperature of the susceptor and the like which results from the heating treatment of the semiconductor wafer continues during the treatment of several semiconductor wafers subsequent to the first wafer in the lot. In due time, the temperature of the susceptor reaches a constant stabilized temperature when the heating treatment is performed on approximately ten semiconductor wafers. That is, the first semiconductor wafer in the lot is treated while being held by the susceptor that is at room temperature, whereas the tenth and subsequent semiconductor wafers are treated while being held by the susceptor the temperature of which is increased to the stabilized temperature.
Thus, there arises a problem that the temperature history of the semiconductor wafers in the lot becomes non-uniform. In particular, there is a danger that the attained surface temperature of several semiconductor wafers subsequent to the first wafer in the lot at the time of the flash irradiation does not reach a target temperature because these semiconductor wafers are supported by the susceptor that is at a relatively low temperature.
To solve such a problem, it has been conventionally common practice that dummy wafers not to be treated are transported into the chamber and held by the susceptor prior to the start of the treatment of a lot, and preheating and flash heating treatment are performed on the dummy wafers under the same condition as the lot to be treated, whereby the temperature of the in-chamber structures including the susceptor and the like is increased in advance (dummy running) The temperature of the susceptor and the like reaches the stabilized temperature by performing the preheating and the flash heating treatment on approximately ten dummy wafers. Thereafter, the treatment of the first semiconductor wafer in the lot to be treated is started. This makes the temperature history of the semiconductor wafers in the lot uniform.
Unfortunately, such dummy running not only consumes the dummy wafers irrelevant to the treatment but also requires a considerable amount of time for the flash heating treatment of the approximately ten dummy wafers. Thus, the dummy running presents a problem that the efficient operation of the flash lamp annealer is hindered.
The reason why the dummy running must be performed is that the low attained temperature of a semiconductor wafer supported by the susceptor that is at a low temperature causes the temperature history of the semiconductor wafers in a lot to become non-uniform, as mentioned above. Thus, if the temperature of the semiconductor wafer supported by the susceptor that is at a low temperature is accurately measured and caused to reach the target temperature, the uniform temperature history of the semiconductor wafers in a lot is achieved without the dummy running
The present invention is intended for a heat treatment apparatus for heating a substrate by irradiating the substrate with light.
According to one aspect of the present invention, the heat treatment apparatus comprises: a chamber for receiving a substrate therein; a light irradiator for irradiating the substrate received in the chamber with light; a substrate temperature measuring part for measuring the temperature of the substrate by receiving infrared radiation emitted from the substrate; a structure temperature measuring part for measuring the temperature of a structure provided in the chamber; and a temperature correction part for correcting temperature measurement with the substrate temperature measuring part, based on the temperature of the structure measured with the structure temperature measuring part.
The temperature measurement with the substrate temperature measuring part is corrected based on the temperature of the structure provided in the chamber. Thus, the heat treatment apparatus is capable of accurately measuring the temperature of the substrate irrespective of the temperature of the structure.
The present invention is also intended for a method of heating a substrate by irradiating the substrate with light.
According to another aspect of the present invention, the method comprises the steps of: (a) irradiating a substrate received in a chamber with light from a light irradiator; and (b) receiving infrared radiation emitted from the substrate to measure the temperature of the substrate by means of a substrate temperature measuring part, wherein temperature measurement with the substrate temperature measuring part is corrected based on the temperature of a structure provided in the chamber in the step (b).
The temperature measurement with the substrate temperature measuring part is corrected based on the temperature of the structure provided in the chamber. Thus, the method is capable of accurately measuring the temperature of the substrate irrespective of the temperature of the structure.
It is therefore an object of the present invention to accurately measure the temperature of a substrate.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
A preferred embodiment according to the present invention will now be described in detail with reference to the drawings.
The heat treatment apparatus 1 includes a chamber 6 for receiving a semiconductor wafer W therein, a flash heating part 5 including a plurality of built-in flash lamps FL, and a halogen heating part 4 including a plurality of built-in halogen lamps HL. The flash heating part 5 is provided over the chamber 6, and the halogen heating part 4 is provided under the chamber 6. The heat treatment apparatus 1 further includes a holder 7 provided inside the chamber 6 and for holding a semiconductor wafer W in a horizontal attitude, and a transfer mechanism 10 provided inside the chamber 6 and for transferring a semiconductor wafer W between the holder 7 and the outside of the heat treatment apparatus 1. The heat treatment apparatus 1 further includes a controller 3 for controlling operating mechanisms provided in the halogen heating part 4, the flash heating part 5, and the chamber 6 to cause the operating mechanisms to heat-treat a semiconductor wafer W.
The chamber 6 is configured such that upper and lower chamber windows 63 and 64 made of quartz are mounted to the top and bottom, respectively, of a tubular chamber side portion 61. The chamber side portion 61 has a generally tubular shape having an open top and an open bottom. The upper chamber window 63 is mounted to block the top opening of the chamber side portion 61, and the lower chamber window 64 is mounted to block the bottom opening thereof. The upper chamber window 63 forming the ceiling of the chamber 6 is a disk-shaped member made of quartz, and serves as a quartz window (a first quartz window) that transmits flashes of light emitted from the flash heating part 5 therethrough into the chamber 6. The lower chamber window 64 forming the floor of the chamber 6 is also a disk-shaped member made of quartz, and serves as a quartz window (a second quartz window) that transmits light emitted from the halogen heating part 4 therethrough into the chamber 6.
An upper reflective ring 68 is mounted to an upper portion of the inner wall surface of the chamber side portion 61, and a lower reflective ring 69 is mounted to a lower portion thereof. Both of the upper and lower reflective rings 68 and 69 are in the form of an annular ring. The upper reflective ring 68 is mounted by being inserted downwardly from the top of the chamber side portion 61. The lower reflective ring 69, on the other hand, is mounted by being inserted upwardly from the bottom of the chamber side portion 61 and fastened with screws not shown. In other words, the upper and lower reflective rings 68 and 69 are removably mounted to the chamber side portion 61. An interior space of the chamber 6, i.e. a space surrounded by the upper chamber window 63, the lower chamber window 64, the chamber side portion 61, and the upper and lower reflective rings 68 and 69, is defined as a heat treatment space 65.
A recessed portion 62 is defined in the inner wall surface of the chamber 6 by mounting the upper and lower reflective rings 68 and 69 to the chamber side portion 61. Specifically, the recessed portion 62 is defined which is surrounded by a middle portion of the inner wall surface of the chamber side portion 61 where the reflective rings 68 and 69 are not mounted, a lower end surface of the upper reflective ring 68, and an upper end surface of the lower reflective ring 69. The recessed portion 62 is provided in the form of a horizontal annular ring in the inner wall surface of the chamber 6, and surrounds the holder 7 which holds a semiconductor wafer W. The chamber side portion 61 and the upper and lower reflective rings 68 and 69 are made of a metal material (e.g., stainless steel) with high strength and high heat resistance.
The chamber side portion 61 is provided with a transport opening (throat) 66 for the transport of a semiconductor wafer W therethrough into and out of the chamber 6. The transport opening 66 is openable and closable by a gate valve 185. The transport opening 66 is connected in communication with an outer peripheral surface of the recessed portion 62. Thus, when the transport opening 66 is opened by the gate valve 185, a semiconductor wafer W is allowed to be transported through the transport opening 66 and the recessed portion 62 into and out of the heat treatment space 65. When the transport opening 66 is closed by the gate valve 185, the heat treatment space 65 in the chamber 6 is an enclosed space.
At least one gas supply opening 81 for supplying a treatment gas therethrough into the heat treatment space 65 is provided in an upper portion of the inner wall of the chamber 6. The gas supply opening 81 is provided above the recessed portion 62, and may be provided in the upper reflective ring 68. The gas supply opening 81 is connected in communication with a gas supply pipe 83 through a buffer space 82 provided in the form of an annular ring inside the side wall of the chamber 6. The gas supply pipe 83 is connected to a treatment gas supply source 85. A valve 84 is inserted at some midpoint in the gas supply pipe 83. When the valve 84 is opened, the treatment gas is fed from the treatment gas supply source 85 to the buffer space 82. The treatment gas flowing in the buffer space 82 flows in a spreading manner within the buffer space 82 which is lower in fluid resistance than the gas supply opening 81, and is supplied through the gas supply opening 81 into the heat treatment space 65. Examples of the treatment gas usable herein include inert gases such as nitrogen gas (N2), reactive gases such as hydrogen (H2) and ammonia (NH3), and mixtures of these gases (although nitrogen gas is used in the present preferred embodiment).
At least one gas exhaust opening 86 for exhausting a gas from the heat treatment space 65 is provided in a lower portion of the inner wall of the chamber 6. The gas exhaust opening 86 is provided below the recessed portion 62, and may be provided in the lower reflective ring 69. The gas exhaust opening 86 is connected in communication with a gas exhaust pipe 88 through a buffer space 87 provided in the form of an annular ring inside the side wall of the chamber 6. The gas exhaust pipe 88 is connected to an exhaust part 190. A valve 89 is inserted at some midpoint in the gas exhaust pipe 88. When the valve 89 is opened, the gas in the heat treatment space 65 is exhausted through the gas exhaust opening 86 and the buffer space 87 to the gas exhaust pipe 88. The at least one gas supply opening 81 and the at least one gas exhaust opening 86 may include a plurality of gas supply openings 81 and a plurality of gas exhaust openings 86, respectively, arranged in a circumferential direction of the chamber 6, and may be in the form of slits. The treatment gas supply source 85 and the exhaust part 190 may be mechanisms provided in the heat treatment apparatus 1 or be utility systems in a factory in which the heat treatment apparatus 1 is installed.
A gas exhaust pipe 191 for exhausting the gas from the heat treatment space 65 is also connected to a distal end of the transport opening 66. The gas exhaust pipe 191 is connected through a valve 192 to the exhaust part 190. By opening the valve 192, the gas in the chamber 6 is exhausted through the transport opening 66.
The base ring 71 is a quartz member having an arcuate shape obtained by removing a portion from an annular shape. This removed portion is provided to prevent interference between transfer arms 11 of the transfer mechanism 10 to be described later and the base ring 71. The base ring 71 is supported by the wall surface of the chamber 6 by being placed on the bottom surface of the recessed portion 62 (with reference to
The susceptor 74 is supported by the four coupling portions 72 provided on the base ring 71.
The guide ring 76 is provided on a peripheral portion of the upper surface of the holding plate 75. The guide ring 76 is an annular member having an inner diameter greater than the diameter of the semiconductor wafer W. For example, when the diameter of the semiconductor wafer W is 300 mm, the inner diameter of the guide ring 76 is 320 mm The inner periphery of the guide ring 76 is in the form of a tapered surface which becomes wider in an upward direction from the holding plate 75. The guide ring 76 is made of quartz similar to that of the holding plate 75. The guide ring 76 may be welded to the upper surface of the holding plate 75 or fixed to the holding plate 75 with separately machined pins and the like. Alternatively, the holding plate 75 and the guide ring 76 may be machined as an integral member.
A region of the upper surface of the holding plate 75 which is inside the guide ring 76 serves as a planar holding surface 75a for holding the semiconductor wafer W. The substrate support pins 77 are provided upright on the holding surface 75a of the holding plate 75. In the present preferred embodiment, a total of 12 substrate support pins 77 are spaced at intervals of 30 degrees along the circumference of a circle concentric with the outer circumference of the holding surface 75a (the inner circumference of the guide ring 76). The diameter of the circle on which the 12 substrate support pins 77 are disposed (the distance between opposed ones of the substrate support pins 77) is smaller than the diameter of the semiconductor wafer W, and is 270 to 280 mm (in the present preferred embodiment, 270 mm) when the diameter of the semiconductor wafer W is 300 mm Each of the substrate support pins 77 is made of quartz. The substrate support pins 77 may be provided by welding on the upper surface of the holding plate 75 or machined integrally with the holding plate 75.
Referring again to
A semiconductor wafer W transported into the chamber 6 is placed and supported in a horizontal attitude on the susceptor 74 of the holder 7 mounted to the chamber 6. At this time, the semiconductor wafer W is supported by the 12 substrate support pins 77 provided upright on the holding plate 75, and is held by the susceptor 74. More strictly speaking, the 12 substrate support pins 77 have respective upper end portions coming in contact with the lower surface of the semiconductor wafer W to support the semiconductor wafer W. The semiconductor wafer W is supported in a horizontal attitude by the 12 substrate support pins 77 because the 12 substrate support pins 77 have a uniform height (distance from the upper ends of the substrate support pins 77 to the holding surface 75a of the holding plate 75).
The semiconductor wafer W supported by the substrate support pins 77 is spaced a predetermined distance apart from the holding surface 75a of the holding plate 75. The thickness of the guide ring 76 is greater than the height of the substrate support pins 77. Thus, the guide ring 76 prevents the horizontal misregistration of the semiconductor wafer W supported by the substrate support pins 77.
As shown in
The transfer arms 11 are of an arcuate configuration extending substantially along the annular recessed portion 62. Each of the transfer arms 11 includes the two lift pins 12 mounted upright thereon. The transfer arms 11 and the lift pins 12 are made of quartz. The transfer arms 11 are pivotable by a horizontal movement mechanism 13. The horizontal movement mechanism 13 moves the pair of transfer arms 11 horizontally between a transfer operation position (a position indicated by solid lines in
The transfer arms 11 are moved upwardly and downwardly together with the horizontal movement mechanism 13 by an elevating mechanism 14. As the elevating mechanism 14 moves up the pair of transfer arms 11 in their transfer operation position, the four lift pins 12 in total pass through the respective four through holes 79 (with reference to
Referring again to
The flash heating part 5 provided over the chamber 6 includes an enclosure 51, a light source provided inside the enclosure 51 and including the multiple (in the present preferred embodiment, 30) xenon flash lamps FL, and a reflector 52 provided inside the enclosure 51 so as to cover the light source from above. The flash heating part 5 further includes a lamp light radiation window 53 mounted to the bottom of the enclosure 51. The lamp light radiation window 53 forming the floor of the flash heating part 5 is a plate-like quartz window made of quartz. The flash heating part 5 is provided over the chamber 6, whereby the lamp light radiation window 53 is opposed to the upper chamber window 63. The flash lamps FL direct flashes of light from over the chamber 6 through the lamp light radiation window 53 and the upper chamber window 63 toward the heat treatment space 65.
The flash lamps FL, each of which is a rod-shaped lamp having an elongated cylindrical shape, are arranged in a plane so that the longitudinal directions of the respective flash lamps FL are in parallel with each other along a main surface of a semiconductor wafer W held by the holder 7 (that is, in a horizontal direction). Thus, a plane defined by the arrangement of the flash lamps FL is also a horizontal plane. Each of the xenon flash lamps FL includes a rod-shaped glass tube (discharge tube) containing xenon gas sealed therein and having positive and negative electrodes provided on opposite ends thereof and connected to a capacitor, and a trigger electrode attached to the outer peripheral surface of the glass tube. Because the xenon gas is electrically insulative, no current flows in the glass tube in a normal state even if electrical charge is stored in the capacitor. However, if a high voltage is applied to the trigger electrode to produce an electrical breakdown, electricity stored in the capacitor flows momentarily in the glass tube, and xenon atoms or molecules are excited at this time to cause light emission. Such a xenon flash lamp FL has the property of being capable of emitting extremely intense light as compared with a light source that stays lit continuously such as a halogen lamp HL because the electrostatic energy previously stored in the capacitor is converted into an ultrashort light pulse ranging from 0.1 to 100 milliseconds. Thus, the flash lamps FL are pulsed light emitting lamps which emit light instantaneously for an extremely short time period of less than one second. The light emission time of the flash lamps FL is adjustable by the coil constant of a lamp light source which supplies power to the flash lamps FL.
The reflector 52 is provided over the plurality of flash lamps FL so as to cover all of the flash lamps FL. A fundamental function of the reflector 52 is to reflect flashes of light emitted from the plurality of flash lamps FL toward the heat treatment space 65. The reflector 52 is a plate made of an aluminum alloy. A surface of the reflector 52 (a surface which faces the flash lamps FL) is roughened by abrasive blasting.
The halogen heating part 4 provided under the chamber 6 includes an enclosure 41 incorporating the multiple (in the present preferred embodiment, 40) halogen lamps HL. The halogen heating part 4 is a light irradiator that directs light from under the chamber 6 through the lower chamber window 64 toward the heat treatment space 65 to heat the semiconductor wafer W by means of the halogen lamps HL.
As shown in
The group of halogen lamps HL in the upper tier and the group of halogen lamps HL in the lower tier are arranged to intersect each other in a lattice pattern. In other words, the 40 halogen lamps HL in total are disposed so that the longitudinal direction of the 20 halogen lamps HL arranged in the upper tier and the longitudinal direction of the 20 halogen lamps HL arranged in the lower tier are orthogonal to each other.
Each of the halogen lamps HL is a filament-type light source which passes current through a filament disposed in a glass tube to make the filament incandescent, thereby emitting light. A gas prepared by introducing a halogen element (iodine, bromine and the like) in trace amounts into an inert gas such as nitrogen, argon and the like is sealed in the glass tube. The introduction of the halogen element allows the temperature of the filament to be set at a high temperature while suppressing a break in the filament. Thus, the halogen lamps HL have the properties of having a longer life than typical incandescent lamps and being capable of continuously emitting intense light. That is, the halogen lamps HL are continuous lighting lamps that emit light continuously for not less than one second. In addition, the halogen lamps HL, which are rod-shaped lamps, have a long life. The arrangement of the halogen lamps HL in a horizontal direction provides good efficiency of radiation toward the semiconductor wafer W provided over the halogen lamps HL.
A reflector 43 is provided also inside the enclosure 41 of the halogen heating part 4 under the halogen lamps HL arranged in two tiers (
The controller 3 controls the aforementioned various operating mechanisms provided in the heat treatment apparatus 1. The controller 3 is similar in hardware configuration to a typical computer. Specifically, the controller 3 includes a CPU that is a circuit for performing various computation processes, a ROM or read-only memory for storing a basic program therein, a RAM or readable/writable memory for storing various pieces of information therein, and a magnetic disk for storing control software, data and the like thereon. The CPU in the controller 3 executes a predetermined processing program, whereby the processes in the heat treatment apparatus 1 proceed.
The heat treatment apparatus 1 further includes, in addition to the aforementioned components, various cooling structures to prevent an excessive temperature rise in the halogen heating part 4, the flash heating part 5, and the chamber 6 because of the heat energy generated from the halogen lamps HL and the flash lamps FL during the heat treatment of a semiconductor wafer W. As an example, a water cooling tube (not shown) is provided in the walls of the chamber 6. Also, the halogen heating part 4 and the flash heating part 5 have an air cooling structure for forming a gas flow therein to exhaust heat.
Next, a treatment operation in the heat treatment apparatus 1 will be described. First, a normal procedure for the heat treatment of a semiconductor wafer W to be treated will be described. A semiconductor wafer W to be treated herein is a silicon semiconductor substrate doped with impurities (ions) by an ion implantation process. The impurities are activated by the heat treatment apparatus 1 performing the process of heating (annealing) the semiconductor wafer W by means of flash irradiation. The procedure for the treatment of the semiconductor wafer W which will be described below proceeds under the control of the controller 3 over the operating mechanisms of the heat treatment apparatus 1.
First, the valve 84 is opened for supply of gas, and the valves 89 and 192 for exhaust of gas are opened, so that the supply and exhaust of gas into and out of the chamber 6 start. When the valve 84 is opened, nitrogen gas is supplied through the gas supply opening 81 into the heat treatment space 65. When the valve 89 is opened, the gas within the chamber 6 is exhausted through the gas exhaust opening 86. This causes the nitrogen gas supplied from an upper portion of the heat treatment space 65 in the chamber 6 to flow downwardly and then to be exhausted from a lower portion of the heat treatment space 65.
The gas within the chamber 6 is exhausted also through the transport opening 66 by opening the valve 192. Further, the exhaust mechanism not shown exhausts an atmosphere near the drivers of the transfer mechanism 10. It should be noted that the nitrogen gas is continuously supplied into the heat treatment space 65 during the heat treatment of a semiconductor wafer W in the heat treatment apparatus 1. The amount of nitrogen gas supplied into the heat treatment space 65 is changed as appropriate in accordance with process steps.
Subsequently, the gate valve 185 is opened to open the transport opening 66. A transport robot outside the heat treatment apparatus 1 transports a semiconductor wafer W to be treated through the transport opening 66 into the heat treatment space 65 of the chamber 6. At this time, there is a danger that an atmosphere outside the heat treatment apparatus 1 is carried into the heat treatment space 65 as the semiconductor wafer W is transported into the heat treatment space 65. However, the nitrogen gas is continuously supplied into the chamber 6. Thus, the nitrogen gas flows outwardly through the transport opening 66 to minimize the outside atmosphere carried into the heat treatment space 65.
The semiconductor wafer W transported into the heat treatment space 65 by the transport robot is moved forward to a position lying immediately over the holder 7 and is stopped thereat. Then, the pair of transfer arms 11 of the transfer mechanism 10 is moved horizontally from the retracted position to the transfer operation position and is then moved upwardly, whereby the lift pins 12 pass through the through holes 79 and protrude from the upper surface of the holding plate 75 of the susceptor 74 to receive the semiconductor wafer W. At this time, the lift pins 12 move upwardly to above the upper ends of the substrate support pins 77.
After the semiconductor wafer W is placed on the lift pins 12, the transport robot moves out of the heat treatment space 65, and the gate valve 185 closes the transport opening 66. Then, the pair of transfer arms 11 moves downwardly to transfer the semiconductor wafer W from the transfer mechanism 10 to the susceptor 74 of the holder 7, so that the semiconductor wafer W is held in a horizontal attitude from below. The semiconductor wafer W is supported by the substrate support pins 77 provided upright on the holding plate 75, and is placed on the susceptor 74. The semiconductor wafer W is held by the holder 7 in such an attitude that the front surface thereof patterned and implanted with impurities is the upper surface. A predetermined distance is defined between the back surface (a main surface opposite from the front surface) of the semiconductor wafer W supported by the substrate support pins 77 and the holding surface 75a of the holding plate 75. The pair of transfer arms 11 moved downwardly below the susceptor 74 is moved back to the retracted position, i.e. to the inside of the recessed portion 62, by the horizontal movement mechanism 13.
After the semiconductor wafer W is supported in a horizontal attitude by the susceptor 74 of the holder 7 made of quartz, the 40 halogen lamps HL in the halogen heating part 4 turn on simultaneously to start preheating (or assist-heating). Halogen light emitted from the halogen lamps HL is transmitted through the lower chamber window 64 and the susceptor 74 both made of quartz, and impinges upon the lower surface of the semiconductor wafer W. By receiving light irradiation from the halogen lamps HL, the semiconductor wafer W is preheated, so that the temperature of the semiconductor wafer W increases. It should be noted that the transfer arms 11 of the transfer mechanism 10, which are retracted to the inside of the recessed portion 62, do not become an obstacle to the heating using the halogen lamps HL.
The temperature of the semiconductor wafer W is measured with the radiation thermometer 120 when the halogen lamps HL perform the preheating. Specifically, the radiation thermometer 120 receives infrared radiation emitted from the lower surface of the semiconductor wafer W held by the susceptor 74 through the opening 78 to measure the temperature of the semiconductor wafer W which is on the increase. The measured temperature of the semiconductor wafer W is transmitted to the controller 3. The controller 3 controls the output from the halogen lamps HL while monitoring whether the temperature of the semiconductor wafer W which is on the increase by the irradiation with light from the halogen lamps HL reaches a predetermined preheating temperature T1 or not. In other words, the controller 3 effects feedback control of the output from the halogen lamps HL so that the temperature of the semiconductor wafer W is equal to the preheating temperature T1, based on the value measured with the radiation thermometer 120. The preheating temperature T1 shall be on the order of 200° to 800° C., preferably on the order of 350° to 600° C., (in the present preferred embodiment, 600° C.) at which there is no apprehension that the impurities implanted in the semiconductor wafer W are diffused by heat.
After the temperature of the semiconductor wafer W reaches the preheating temperature T1, the controller 3 maintains the temperature of the semiconductor wafer W at the preheating temperature T1 for a short time. Specifically, at the point in time when the temperature of the semiconductor wafer W measured with the radiation thermometer 120 reaches the preheating temperature T1, the controller 3 adjusts the output from the halogen lamps HL to maintain the temperature of the semiconductor wafer W at approximately the preheating temperature T1.
The flash lamps FL in the flash heating part 5 irradiate the front surface of the semiconductor wafer W supported by the susceptor 74 with a flash of light at the point in time when a predetermined time period has elapsed since the temperature of the semiconductor wafer W reached the preheating temperature T1. At this time, part of the flash of light emitted from the flash lamps FL travels directly toward the interior of the chamber 6. The remainder of the flash of light is reflected once from the reflector 52, and then travels toward the interior of the chamber 6. The irradiation of the semiconductor wafer W with such flashes of light achieves the flash heating of the semiconductor wafer W.
The flash heating, which is achieved by the emission of a flash of light from the flash lamps FL, is capable of increasing the front surface temperature of the semiconductor wafer W in a short time. Specifically, the flash of light emitted from the flash lamps FL is an intense flash of light emitted for an extremely short period of time ranging from about 0.1 to about 100 milliseconds as a result of the conversion of the electrostatic energy previously stored in the capacitor into such an ultrashort light pulse. The front surface temperature of the semiconductor wafer W subjected to the flash heating by the flash irradiation from the flash lamps FL momentarily increases to a treatment temperature T2 of 1000° C. or higher. After the impurities implanted in the semiconductor wafer W are activated, the front surface temperature of the semiconductor wafer W decreases rapidly. Because of the capability of increasing and decreasing the front surface temperature of the semiconductor wafer W in an extremely short time, the heat treatment apparatus 1 achieves the activation of the impurities implanted in the semiconductor wafer W while suppressing the diffusion of the impurities due to heat. It should be noted that the time required for the activation of the impurities is extremely short as compared with the time required for the thermal diffusion of the impurities. Thus, the activation is completed in a short time ranging from about 0.1 to about 100 milliseconds during which no diffusion occurs.
After a predetermined time period has elapsed since the completion of the flash heating treatment, the halogen lamps HL turn off. This causes the temperature of the semiconductor wafer W to decrease rapidly from the preheating temperature T1. The radiation thermometer 120 measures the temperature of the semiconductor wafer W which is on the decrease. The result of measurement is transmitted to the controller 3. The controller 3 monitors whether the temperature of the semiconductor wafer W is decreased to a predetermined temperature or not, based on the result of measurement with the radiation thermometer 120. After the temperature of the semiconductor wafer W is decreased to the predetermined temperature or below, the pair of transfer arms 11 of the transfer mechanism 10 is moved horizontally again from the retracted position to the transfer operation position and is then moved upwardly, so that the lift pins 12 protrude from the upper surface of the susceptor 74 to receive the heat-treated semiconductor wafer W from the susceptor 74. Subsequently, the transport opening 66 which has been closed is opened by the gate valve 185, and the transport robot outside the heat treatment apparatus 1 transports the semiconductor wafer W placed on the lift pins 12 to the outside. Thus, the heat treatment apparatus 1 completes the heating treatment of the semiconductor wafer W.
Typically, the treatment of semiconductor wafers W is performed on a lot-by-lot basis. The term “lot” refers to a group of semiconductor wafers W subjected to the same treatment under the same condition. In the heat treatment apparatus 1 according to the present preferred embodiment, multiple (e.g., 25) semiconductor wafers W in a lot are sequentially transported one by one into the chamber 6 and subjected to the heating treatment.
For the start of the treatment of a lot in the heat treatment apparatus 1 that has not performed the treatment for some period of time, the first semiconductor wafer W in the lot is transported into the chamber 6 that is at approximately room temperature and is then subjected to the flash heating treatment. Examples of this case are such that the heat treatment apparatus 1 starts up after maintenance and then treats the first lot and such that a long time period has elapsed since the treatment of the preceding lot. During the heating treatment, heat transfer occurs from the semiconductor wafer W increased in temperature to in-chamber structures (structures in the chamber) including the susceptor 74 and the like. For this reason, the temperature of the susceptor 74 that is initially at room temperature increases gradually due to heat storage as the number of treated semiconductor wafers W increases. Also, part of light emitted from the halogen lamps HL is absorbed by the in-chamber structures including the lower chamber window 64 and the like. For this reason, the temperature of the lower chamber window 64 and the like increases gradually as the number of treated semiconductor wafers W increases.
When the heating treatment is performed on approximately ten semiconductor wafers W, the temperature of the structures in the chamber 6 such as the susceptor 74 reaches a constant stabilized temperature. In the susceptor 74 the temperature of which reaches the stabilized temperature, the amount of heat transferred from the semiconductor wafer W to the susceptor 74 and the amount of heat dissipated from the susceptor 74 are balanced with each other. Before the temperature of the susceptor 74 reaches the stabilized temperature, the amount of heat transferred from the semiconductor wafer W to the susceptor 74 is greater than the amount of heat dissipated from the susceptor 74, so that the temperature of the susceptor 74 increases gradually due to heat storage as the number of treated semiconductor wafers W increases. On the other hand, after the temperature of the susceptor 74 reaches the stabilized temperature, the amount of heat transferred from the semiconductor wafer W to the susceptor 74 and the amount of heat dissipated from the susceptor 74 are balanced with each other, so that the temperature of the susceptor 74 is maintained at the constant stabilized temperature.
If the treatment is started in the chamber 6 that is at room temperature in this manner, there has been a problem that a non-uniform temperature history results from a difference in temperature of the in-chamber structures including the susceptor 74 and the like between initial semiconductor wafers W in the lot and intermediate semiconductor wafers W in the lot. During the treatment of the initial semiconductor wafers W in the lot, the in-chamber structures including the susceptor 74 and the like are at a relatively low temperature, so that the wafer temperature does not reach a target temperature (the preheating temperature T1 and the treatment temperature T2) in some cases. During the treatment of the intermediate semiconductor wafers W in the lot, on the other hand, the temperature of the susceptor 74 and the like has already reached the stabilized temperature, so that the wafer temperature increases to the target temperature.
To solve the problem prior to the start of the treatment of a lot, dummy running has been hitherto performed which is a conventional technique in which approximately ten dummy wafers not to be treated are sequentially transported into the chamber 6, and the preheating and the flash heating treatment similar to those for the semiconductor wafers W to be treated are performed on the dummy wafers, whereby the temperature of the in-chamber structures including the susceptor 74 and the like is increased to the stabilized temperature, as already discussed. If the dummy running causes the temperature of the in-chamber structures including the susceptor 74 and the like to already reach the stabilized temperature at the time of the treatment of the first semiconductor wafer W in a lot, the temperature of all of the semiconductor wafers W in the lot is increased to the target temperature, so that the temperature history is made uniform. However, such dummy running not only consumes the dummy wafers irrelevant to the treatment but also requires a considerable amount of time (approximately 15 minutes for the treatment of ten dummy wafers). Thus, the dummy running hinders the efficient operation of the heat treatment apparatus 1, as already discussed. If accurately measured, the temperature of the initial semiconductor wafers W in the lot each of which is supported by the susceptor 74 that is at a relatively low temperature is increased to the previously set target temperature in the same manner as the temperature of the intermediate semiconductor wafers W in the lot by properly controlling the light emission outputs from the halogen lamps HL (and the flash lamps FL). This increases the temperature of all of the semiconductor wafers W in the lot to the target temperature to achieve a uniform temperature history without the dummy running
Unfortunately, not only infrared radiation emitted from the semiconductor wafer W held by the susceptor 74 but also infrared radiation in the form of disturbance light emitted from the in-chamber structures including the susceptor 74 and the like increased in temperature enters the radiation thermometer 120 for measuring the temperature of the semiconductor wafer W. For this reason, the radiation thermometer 120 is calibrated in consideration of the incident infrared radiation emitted from the in-chamber structures including the susceptor 74 and the like. Specifically, the radiation thermometer 120 is calibrated so as to be able to accurately measure the temperature of the semiconductor wafer W while the temperature of the in-chamber structures including the susceptor 74 and the like reaches the stabilized temperature. This causes the amount of infrared radiation emitted from the in-chamber structures including the susceptor 74 and the like and entering the radiation thermometer 120 to be smaller when the susceptor 74 and the like are at a relatively low temperature not reaching the stabilized temperature than when the calibration is performed. As a result, the radiation thermometer 120 is unable to accurately measure the temperature of the semiconductor wafer W. The most part of the disturbance light entering the radiation thermometer 120 is infrared radiation emitted from quartz structures including the upper chamber window 63, the lower chamber window 64, the susceptor 74 and the like because the chamber side portion 61 made of metal or the like is water-cooled among the in-chamber structures.
In the heat treatment technique according to the present invention, the temperature measurement of the semiconductor wafer W with the radiation thermometer 120 is hence corrected based on the temperatures of the quartz structures including the upper chamber window 63, the lower chamber window 64, and the susceptor 74.
The temperature correction part 31 corrects the temperature measurement with the radiation thermometer 120, based on the temperatures of the upper chamber window 63, the lower chamber window 64, and the susceptor 74. This achieves the accurate temperature measurement of the semiconductor wafer W irrespective of the temperature of the susceptor 74 and the like. As a result, even if the susceptor 74 and the like are at a relatively low temperature at the time of the treatment of initial semiconductor wafers W in a lot, the temperature of the semiconductor wafers W is accurately measured, and the light emission outputs from the halogen lamps HL (and the flash lamps FL) are properly controlled, whereby the wafer temperature is allowed to reach the target temperature. This increases the temperature of all of the semiconductor wafers W in the lot accurately to the target temperature without the dummy running which consumes a plurality of dummy wafers to provide a uniform temperature history and to achieve the efficient operation of the heat treatment apparatus 1.
While the preferred embodiment according to the present invention has been described hereinabove, various modifications of the present invention in addition to those described above may be made without departing from the scope and spirit of the invention. For example, the temperature measurement with the radiation thermometer 120 is corrected based on the temperatures of the upper chamber window 63, the lower chamber window 64, and the susceptor 74 in the aforementioned preferred embodiment. However, the temperature measurement of the semiconductor wafer W with the radiation thermometer 120 may be corrected based on the temperatures of other quartz structures (e.g., the transfer arms 11) in addition to the temperatures of the aforementioned structures.
Alternatively, the temperature measurement of the semiconductor wafer W with the radiation thermometer 120 may be corrected based on the temperatures of structures made of other than quartz, such as the chamber side portion 61, in addition to (or in place of) the quartz structures including the susceptor 74 and the like. In the aforementioned preferred embodiment, the chamber side portion 61 is water-cooled. However, if the chamber side portion 61 is not cooled (or positively warmed or heated), there is a danger that infrared radiation emitted from the chamber side portion 61 also enters the radiation thermometer 120 in the form of disturbance light. Thus, the temperature correction part 31 may correct the temperature measurement with the radiation thermometer 120, based on the temperatures of the structures provided in the chamber 6 including the chamber side portion 61 and the like to thereby accurately measure the temperature of the semiconductor wafer W irrespective of the temperatures of these in-chamber structures.
Although the 30 flash lamps FL are provided in the flash heating part 5 according to the aforementioned preferred embodiment, the present invention is not limited to this. Any number of flash lamps FL may be provided. The flash lamps FL are not limited to the xenon flash lamps, but may be krypton flash lamps. Also, the number of halogen lamps HL provided in the halogen heating part 4 is not limited to 40. Any number of halogen lamps HL may be provided.
In the aforementioned preferred embodiment, the filament-type halogen lamps HL are used as continuous lighting lamps that emit light continuously for not less than one second to preheat the semiconductor wafer W. The present invention, however, is not limited to this. In place of the halogen lamps HL, discharge type arc lamps may be used as the continuous lighting lamps.
Moreover, a substrate to be treated by the heat treatment apparatus 1 is not limited to a semiconductor wafer, but may be a glass substrate for use in a flat panel display for a liquid crystal display apparatus and the like, and a substrate for a solar cell. Also, the technique according to the present invention may be applied to the heat treatment of high dielectric constant gate insulator films (high-k films), to the joining of metal and silicon, and to the crystallization of polysilicon.
Further, the heat treatment technique according to the present invention is not limited to the flash lamp annealer, but may be applied to apparatuses including heat sources other than flash lamps such as single-wafer type lamp annealers employing continuous lighting lamps or CVD apparatuses. For example, the technique according to the present invention is excellently applicable to a backside annealer which performs heat treatment by irradiating the back surface of a semiconductor wafer with light from continuous lighting lamps disposed under a chamber.
While the invention has been described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is understood that numerous other modifications and variations can be devised without departing from the scope of the invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2017-214654 | Nov 2017 | JP | national |
