Claims
- 1. A low impedance VDMOS semiconductor component having a planar gate structure, comprising:
a semiconductor body of a first conductivity type having two main surfaces, including a first main surface and a second main surface disposed substantially opposite to one another; a highly doped first zone of the first conductivity type disposed in an area of said first main surface; a second zone of a second conductivity type separating said first zone from said semiconductor body, said first zone and said second zone having a trench with a bottom formed therein reaching down to said semiconductor body; an insulating material filling said trench at least beyond an edge of said second zone facing said semiconductor body; and a region of the second conductivity type surrounding an area of said bottom of said trench.
- 2. The low impedance VDMOS semiconductor component according to claim 1, wherein said region of the second conductivity type reaches up to said second zone and said trench is filled with said insulating material at least up to said edge of said second zone facing said first main surface.
- 3. The low impedance VDMOS semiconductor component according to claim 1, including at least one further region of the second conductivity type disposed in said semiconductor body below said region of the second conductivity type.
- 4. The low impedance VDMOS semiconductor component according to claim 1, wherein said trench is completely filled with said insulating material.
- 5. The low impedance VDMOS semiconductor component according to claim 1, wherein said insulating material is glass.
- 6. The low impedance VDMOS semiconductor component according to claim 1, wherein said semiconductor body has an epitaxy layer disposed adjacent to said first main surface and further epitaxy layers lying below said epitaxy layer, said epitaxy layer being doped higher than said further epitaxy layers.
- 7. The low impedance VDMOS semiconductor component according to claim 1, wherein said region of the second conductivity type is doped with boron.
- 8. A method for producing a low impedance VDMOS semiconductor component, which comprises the steps of:
providing a semiconductor body of a first conductivity type having two main surfaces, including a first main surface and a second main surface disposed substantially opposite to one another; providing a highly doped first zone having the first conductivity type disposed in an area of the first main surface in a second zone of a second conductivity type separating the first zone from the semiconductor body; forming a trench having a bottom extending through the first zone, the second zone and reaching down to the semiconductor body; filling the trench with an insulating material at least beyond an edge of the second zone facing the semiconductor body; and forming a region of the second conductivity type to surround an area of the bottom of the trench, the region being produced by out-diffusion of a dopant of the second conductivity type from the area of the bottom of the trench.
- 9. The method according to claim 8, which comprises out-diffusing the boron from the area of the bottom of the trench.
- 10. The method according to claim 8, which comprises introducing the dopant of the second conductivity type by ion implantation into the area of the bottom of the trench.
Priority Claims (1)
Number |
Date |
Country |
Kind |
199 22 187.1 |
May 1999 |
DE |
|
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is a continuation of copending International Application No. PCT/DE00/01155, filed Apr. 13, 2000, which designated the United States.
Continuations (1)
|
Number |
Date |
Country |
Parent |
PCT/DE00/01155 |
Apr 2000 |
US |
Child |
10011131 |
Nov 2001 |
US |