Claims
- 1. An integrated circuit comprising:
a substrate; an isolation layer positioned on the substrate wherein the opening is formed in the isolation layer; a conductive barrier layer formed in the opening, wherein the barrier layer is formed of a material selected so as to inhibit diffusion of conductive species into the isolation layer; a copper conductor formed in the opening wherein the conductor adheres to the conductive barrier layer; a non-conductive barrier layer formed on the copper conductor wherein the resistance of the copper conductor measured before the formation of the non-conductive barrier layer is substantially the same as the resistance measured after the formation of the non-conductive barrier.
- 2. The non-conductive barrier layer of claim 1 comprises a silicon nitride film.
- 3. The non-conductive barrier layer of claim 1 comprises an amorphous silicon carbide film.
- 4. The formation of the silicon nitride film of claim 2 wherein the silicon nitride is deposited onto the copper conductor using a plasma enhanced chemical vapor deposition process (PECVD).
- 5. The PECVD process of claim 4 wherein the process temperature is between approximately 150C -300C.
- 6. The PECVD process of claim 4 wherein the process comprises the use of silane gas.
- 7. A method of depositing a layer of silicon nitride onto a copper surface comprising using a plasma enhanced chemical vapor deposition process (PECVD) to deposit silicon nitride in a manner such that the line resistance of the copper remains substantially the same before and after the silicon nitride is deposited.
- 8. The method of claim 7, wherein the deposition process is conducted in a temperature range of approximately 150C -300C.
- 9. A method of forming a conductor in an isolation region of an integrated circuit comprising:
forming an opening in the isolation region; depositing a conductive material into the opening; forming a barrier layer on the conductive material so that the barrier layer inhibits diffusion of the conductive material into the isolation region wherein the barrier layer is formed in a manner that reduces any increase in the resistivity of the conductive material as a result of forming the barrier layer.
- 10. The method of claim 9, wherein the barrier layer is formed in a manner that inhibits silicide formation in the conductive material during formation of the barrier layer.
- 11. The method of claim 10, wherein depositing the conductive material comprises depositing copper material in the opening.
- 12. The method of claim 10, wherein depositing the conductive material comprises depositing copper material in a conductive trench.
- 13. The method of claim 10, wherein depositing the conductive material comprises depositing copper material into a contact via.
- 14. The method of claim 10, wherein forming the barrier layer comprises forming a silicon nitride film layer on an upper surface of the copper conductive material.
- 15. The method of claim 14, wherein the silicon nitride barrier layer is formed by plasma enhanced chemical vapor deposition at a process temperature of between approximately 150C.-300C.
- 16. The method of claim 9, wherein forming the barrier layer occurs in a manner such that the resistivity of the conductive material is substantially the same following the formation of the barrier layer as it was before the formation of the barrier layer.
RELATED APPLICATIONS
[0001] This application is a divisional of prior U.S. patent application Ser. No. 09/503,105, filed Feb. 11, 2000, which is hereby incorporated by reference in its entirety.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09503105 |
Feb 2000 |
US |
Child |
10303585 |
Nov 2002 |
US |