With the development of the semiconductor industry, three-dimensional (3D) semiconductor devices (e.g., 3D NAND memory devices) are widely explored. However, the structures of the 3D semiconductor devices that include multiple stacked tiers (e.g., layers) and high aspect ratio openings (e.g., holes) extending into the tiers, as well as the techniques of fabricating such 3D semiconductor devices, may present some implementation challenges.
The following detailed description refers to the accompanying drawings which show, by way of illustration, specific aspects and embodiments in which the present subject matter may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the present subject matter.
The term “horizontal” as used in this application is defined as a plane parallel to the conventional plane or surface of a wafer, such as a substrate, regardless of the actual orientation of the wafer or substrate. The term “vertical” refers to a direction perpendicular to the horizontal as defined above. Prepositions, such as “on”, “side”, “higher”, “lower”, “over” and “under” are defined with respect to the conventional plane or surface being on the top surface of the wafer or substrate, regardless of the actual orientation of the wafer or substrate.
The terms “wafer” and “substrate” are used herein to refer generally to any structure on which integrated circuits are formed, and also to such structures during various stages of integrated circuit fabrication. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined only by the appended claims, along with the full scope of equivalents to which such claims are entitled.
A NAND array architecture is an array of memories (e.g., memory cells) arranged such that the memories of the array are coupled in logical rows to access lines (which are coupled to, and in some cases are at least partially formed by, the Control Gates (CGs) of the memories, which are conventionally referred to as word lines. Some memories of the array are coupled together in series between a source line and the data line, which is conventionally referred to as a bit line.
Memory cells in NAND array architecture can be programmed to a desired data state. For example, electric charge can be accumulated (e.g., placed) on, or removed from, a FG of a memory cell to program the cell into a desired one of a number of data states. A memory cell conventionally referred to as a single level cell (SLC) can be programmed to a desired one of two data states, e.g., a “1” or a “0” state. Memory cells conventionally referred to as multilevel cells (MLCs) can be programmed to a desired one of more than two data states.
Discussed herein are vertical memories, memory arrays, and methods of making the same.
In some embodiments, as shown in
In some embodiments, as shown in
In some embodiments, as shown in
A vertical memory 200 may include elements similar to or identical to those of the vertical memory 100. For simplicity, similar or identical elements of the vertical memory 200 are given the same designation numbers as given to vertical memory 100. As shown in
In some embodiments, as shown in
In some embodiments, an IPD (not shown in the figures) may exist as a gap filled within the blocking dielectric (e.g., oxide) 118 and ALOX portions of the Etch Stop layer 108. During the making process, the IPD has been removed by a large amount, but not fully removed in the gaps between ALOX and Oxide layers, where ALOX has been recessed more than the sandwich oxide.
In some embodiments, a film 160 (e.g., nitride) may be formed on a top dielectric tier of the dielectric tiers 110 as a Chemical Mechanical Polish (CMP) stop tier.
In some embodiments, not shown in
A vertical memory 100 as shown in
The disclosure relates to an integration of methodologies of IPD (e.g., ONO) sidewall removal from a channel and ALOX-like High K (HiK) etch stop tiers that are resistant to dry etch but easily soluble in wet etch process. IPD (e.g., IPD2 as shown in the figures) nitride removal from a channel is generally needed for reliability and cycling data retention. Etch stop tiers (e.g., ALOX) generally do not allow sidewall nitride removal from a channel because ALOX of the etch stop tiers are sensitive to Hot Phosphoric Acid and Hydrofluoric Acid. In some embodiments, the etch stop tier (e.g., ALOX) may include a blocking dielectric (e.g., a backfill oxide such as silicon oxide) adjacent to a pillar (e.g., poly) to block the etch stop tier from e.g., the Hot Phosphoric Acid and Hydrofluoric Acid.
In other embodiments, the etch stop tier may comprise a backfill oxide adjacent to the pillar, and a plurality of dielectric films (e.g., oxide) that horizontally extend (or insert) from the backfill oxide into the etch stop tier. The backfill oxide may allow the trap-up nitride removal from a sidewall of the channel.
Other processes of forming the vertical memory 200 may be similar to or identical to the processes of forming the vertical memory 100 as shown in
As shown in
The above description and the drawings illustrate some embodiments of the invention to enable those skilled in the art to practice the embodiments of the invention. Other embodiments may incorporate structural, logical, electrical, process, and other changes. Examples merely typify possible variations. Portions and features of some embodiments may be included in, or substituted for, those of others. Many other embodiments will be apparent to those of skill in the art upon reading and understanding the above description.
This patent application is a divisional of U.S. application Ser. No. 15/410,469, filed Jan. 19, 2017, which is a continuation of U.S. application Ser. No. 14/746,515, filed Jun. 22, 2015, now issued as U.S. Pat. No. 9,559,109, which is a divisional of U.S. application Ser. No. 13/864,794, filed Apr. 17, 2013, now issued as U.S. Pat. No. 9,064,970, which claims the benefit of priority to U.S. Provisional Patent Application Ser. No. 61/792,005, filed on Mar. 15, 2013, all which are hereby incorporated by reference herein in their entirety.
Number | Name | Date | Kind |
---|---|---|---|
5053840 | Yoshikawa | Oct 1991 | A |
5838039 | Sato et al. | Nov 1998 | A |
6159797 | Lee | Dec 2000 | A |
6445029 | Lam et al. | Sep 2002 | B1 |
6583009 | Hui et al. | Jun 2003 | B1 |
6689658 | Wu | Feb 2004 | B2 |
7369436 | Forbes | May 2008 | B2 |
7682902 | Hsiao et al. | Mar 2010 | B2 |
7910446 | Ma et al. | Mar 2011 | B2 |
8124478 | Park et al. | Feb 2012 | B2 |
8187936 | Alsmeier et al. | May 2012 | B2 |
8258034 | Ramaswamy et al. | Sep 2012 | B2 |
8581321 | Son et al. | Nov 2013 | B2 |
8680605 | Jeon et al. | Mar 2014 | B2 |
8754466 | Yun et al. | Jun 2014 | B2 |
8946807 | Hopkins et al. | Feb 2015 | B2 |
8954466 | Rajput | Feb 2015 | B2 |
9064970 | Simsek-Ege et al. | Jun 2015 | B2 |
9171863 | Wang | Oct 2015 | B2 |
9184175 | Dennison et al. | Nov 2015 | B2 |
9230986 | Hopkins et al. | Jan 2016 | B2 |
9231086 | Khoueir et al. | Jan 2016 | B2 |
9559109 | Simsek-Ege et al. | Jan 2017 | B2 |
9608000 | Hopkins et al. | Mar 2017 | B2 |
9627213 | Hee et al. | Apr 2017 | B2 |
10170481 | Wang | Jan 2019 | B2 |
10170491 | Simsek-Ege et al. | Jan 2019 | B2 |
10170639 | Hopkins et al. | Jan 2019 | B2 |
10573721 | Hopkins et al. | Feb 2020 | B2 |
20030155582 | Mahajani et al. | Aug 2003 | A1 |
20050006697 | Hsieh | Jan 2005 | A1 |
20050026382 | Akatsu et al. | Feb 2005 | A1 |
20050133851 | Forbes | Jun 2005 | A1 |
20060134846 | Wang | Jun 2006 | A1 |
20060237768 | Forbes et al. | Oct 2006 | A1 |
20070047304 | Lee et al. | Mar 2007 | A1 |
20080012061 | Ichige et al. | Jan 2008 | A1 |
20080064225 | Yau et al. | Mar 2008 | A1 |
20080067583 | Kidoh et al. | Mar 2008 | A1 |
20080173928 | Arai et al. | Jul 2008 | A1 |
20080253183 | Mizukami et al. | Oct 2008 | A1 |
20080277720 | Youn et al. | Nov 2008 | A1 |
20080315330 | Walker et al. | Dec 2008 | A1 |
20090026460 | Ou et al. | Jan 2009 | A1 |
20090121271 | Son et al. | May 2009 | A1 |
20090184360 | Jin | Jul 2009 | A1 |
20090283813 | Ishii et al. | Nov 2009 | A1 |
20090283819 | Ishikawa et al. | Nov 2009 | A1 |
20100003795 | Park et al. | Jan 2010 | A1 |
20100163968 | Kim et al. | Jul 2010 | A1 |
20100181612 | Kito et al. | Jul 2010 | A1 |
20100187592 | Chen et al. | Jul 2010 | A1 |
20100200908 | Lee et al. | Aug 2010 | A1 |
20100240205 | Son et al. | Sep 2010 | A1 |
20100323505 | Ishikawa et al. | Dec 2010 | A1 |
20110201167 | Satonaka et al. | Aug 2011 | A1 |
20110220987 | Tanaka et al. | Sep 2011 | A1 |
20110248334 | Sandhu et al. | Oct 2011 | A1 |
20110294290 | Nakanishi | Dec 2011 | A1 |
20120001247 | Alsmeier | Jan 2012 | A1 |
20120001249 | Alsmeier et al. | Jan 2012 | A1 |
20120058629 | You et al. | Mar 2012 | A1 |
20120132981 | Imamura et al. | May 2012 | A1 |
20120217564 | Tang et al. | Aug 2012 | A1 |
20120231593 | Joo | Sep 2012 | A1 |
20120326221 | Sinha | Dec 2012 | A1 |
20130049095 | Whang et al. | Feb 2013 | A1 |
20130171788 | Yang et al. | Jul 2013 | A1 |
20140131784 | Davis | May 2014 | A1 |
20140203344 | Hopkins et al. | Jul 2014 | A1 |
20140264532 | Dennison et al. | Sep 2014 | A1 |
20140264542 | Simsek-ege et al. | Sep 2014 | A1 |
20150140797 | Hopkins et al. | May 2015 | A1 |
20150287734 | Simsek-Ege et al. | Oct 2015 | A1 |
20160049417 | Dennison et al. | Feb 2016 | A1 |
20160093626 | Izumi et al. | Mar 2016 | A1 |
20160133752 | Hopkins et al. | May 2016 | A1 |
20160351580 | Hopkins et al. | Dec 2016 | A1 |
20170133392 | Simsek-ege et al. | May 2017 | A1 |
20170200801 | Hopkins et al. | Jul 2017 | A1 |
Number | Date | Country |
---|---|---|
1791974 | Jun 2006 | CN |
101118910 | Feb 2008 | CN |
101292351 | Oct 2008 | CN |
101364614 | Feb 2009 | CN |
101847602 | Sep 2010 | CN |
105027285 | Nov 2015 | CN |
105164808 | Dec 2015 | CN |
105027285 | Jun 2017 | CN |
107256867 | Oct 2017 | CN |
2973710 | Jan 2016 | EP |
2007005814 | Jan 2007 | JP |
2007294595 | Nov 2007 | JP |
2009295617 | Dec 2009 | JP |
2012094694 | May 2012 | JP |
2012119445 | Jun 2012 | JP |
2012146773 | Aug 2012 | JP |
2012227326 | Nov 2012 | JP |
2016514371 | May 2016 | JP |
5965091 | Aug 2016 | JP |
6434424 | Nov 2018 | JP |
1020100104908 | Sep 2010 | KR |
1020110130916 | Dec 2011 | KR |
1020120101818 | Sep 2012 | KR |
201442211 | Nov 2014 | TW |
201507168 | Feb 2015 | TW |
201526207 | Jul 2015 | TW |
I548065 | Sep 2016 | TW |
I575716 | Mar 2017 | TW |
201737472 | Oct 2017 | TW |
WO-2006132158 | Dec 2006 | WO |
WO-2012009140 | Jan 2012 | WO |
WO-2014116864 | Jul 2014 | WO |
WO-2014149740 | Sep 2014 | WO |
Entry |
---|
“Chinese Application Serial No. 201480013075.1, Office Action dated Sep. 19, 2016”, w/English Translation, 10 pgs. |
“Chinese Application Serial No. 201480013075.1, Preliminary Amendmentfiled May 30, 2016”, W/ English Claims, 48 pgs. |
“Chinese Application Serial No. 201480013075.1, Response filed Feb. 3, 2017 to Office Action dated Sep. 19, 2016”, w/English Claims, 30 pgs. |
“European Application Serial No. 14743125.8, Communication Pursuant to Article 94(3) EPC dated May 22, 2017”, 6 pgs. |
“European Application Serial No. 14743125.8, Extended European Search Report dated Jun. 21, 2016”, 8 pgs. |
“European Application Serial No. 14743125.8, Prelimi nary Amendment filed Mar. 9, 2016”, 13 pgs. |
“European Application Serial No. 14743125.8, Response filed Dec. 1, 2017 to Communication Pursuant to Article 94(3) EPC dated May 22, 2017”, 11 pgs. |
“European Application Serial No. 14770149.4, Extended European Search Report dated Nov. 25, 2016”, 9 pgs. |
“European Application Serial No. 14770149.4, Invitation Pursuant to Rule 62a(1) EPC dated Aug. 30, 2016”, 2 pgs. |
“European Application Serial No. 14770149.4, Preliminary Amendment filed Apr. 28, 2016”, 22 pgs. |
“International Application Serial No. PCT/US2014/012798, International Preliminary Report on Patentability dated Aug. 6, 2015”, 13 pgs. |
“International Application Serial No. PCT/US2014/012798, International Search Report dated May 19, 2014”, 3 pgs. |
- “International Application Serial No. PCT/US2014/012798, Written Opinion dated May 19, 2014”, 11 pgs. |
“International Application Serial No. PCT/US2014/020658, International Preliminary Report on Patentability dated Sep. 24, 2015”, 6 pgs. |
“International Application Serial No. PCT/US2014/020658, International Search Report dated Jun. 26, 2014”, 3 pgs. |
“International Application Serial No. PCT/US2014/020658, Written Opinion dated Jun. 26, 2014”, 4 pgs. |
“Japanese Application Serial No. 2015-555280, Office Action dated Feb. 27, 2018”, w/English Translation, 31 pgs. |
“Japanese Application Serial No. 2015-555280, Office Action dated Jul. 4, 2017”, w/English Translation, 27 pgs. |
“Japanese Application Serial No. 2015-555280, Response filed May 25, 2018 to Office Action dated Feb. 27, 2018”, W/ English Claims, 22 pgs. |
“Japanese Application Serial No. 2015-555280, Response filed Oct. 12, 2017 to Office Action dated Jul. 4, 2017”, w/English Claims, 17 pgs. |
“Japanese Application Serial No. 2016-500651, Notice of Rejection dated Mar. 1, 2016”, W/ English Translation, 4 pgs. |
“Japanese Application Serial No. 2016-500651, Response filed May 20, 2016 to Notice of Rejection dated Mar. 1, 2016”, W/ English Claims, 6 pgs. |
“Korean Application Serial No. 10-2015-7029545, Office Action dated Oct. 18, 2016”, (With English Translation), 13 pgs. |
“Korean Application Serial No. 10-2015-7029545, Response filed Dec. 18, 2016 to Office Action dated Oct. 18, 2016”, w/English Claims, 19 pgs. |
“Protrusion”, Merriam-Webster Dictionary, 2 pgs. |
“Taiwanese Application Serial No. 103102815, Amendment filed Nov. 10, 2014”, W/ English Claims, 52 pgs. |
“Taiwanese Application Serial No. 104110136, Office Action dated Jan. 26, 2016”, W/ English Translation, 3 pgs. |
“Taiwanese Application Serial No. 104110136, Response filed Apr. 28, 2016 to Office Action dated Jan. 26, 2016”, W/ English Claims, 7 pgs. |
Hang-Ting, Lue, et al., “A Novel Planar Floating-Gate (FG)/ Charge Trapping (CT) NAND Device Using BE-SONOS Inter-Poly Dielectric (IPD)”, In proceeding of: Electron Devices Meeting (IEDM), (2009), 34.3:1-4. |
Kitamura, Takuya, et al., “A Low Voltage Operating Flash Memory Cell with High Coupling Ratio”, (1998), 2 pgs. |
Kuppurao, Satheesh, et al., “EQuipment Frontiers: Thermal Processing: In situ steam generation: A new rapid thermal oxidation technique”, Solid State Technology, (Jul. 2000), Cover, Index, 233-239. |
Seo, Moon-Sik, et al., “The 3 dimensional Vertical FG NAND Flash Memory Cell Arrays with the Novel Electrical S/D/ Technique using the Extending Sidewall Contral Gate (ESCG)”, 4 pages. |
Number | Date | Country | |
---|---|---|---|
20190214399 A1 | Jul 2019 | US |
Number | Date | Country | |
---|---|---|---|
61792005 | Mar 2013 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 15410469 | Jan 2017 | US |
Child | 16237287 | US | |
Parent | 13864794 | Apr 2013 | US |
Child | 14746515 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 14746515 | Jun 2015 | US |
Child | 15410469 | US |