METAL THIN FILM FOR INTERCONNECTION OF SEMICONDUCTOR DEVICE, INTERCONNECTION FOR SEMICONDUCTOR DEVICE, AND THEIR FABRICATION METHOD

Abstract
A metal thin film used in fabricating a damascene interconnection of a semiconductor device which exhibits excellent high temperature fluidity during high pressure annealing, and which can fabricate an interconnection for a semiconductor device which has a low electric resistance and stable high quality is provided. Also provided is an interconnection for a semiconductor device.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a schematic view illustrating the formation of the interconnection according to the present invention.



FIG. 2 is a graph showing N2 concentration in the thin film of Cu—N alloy in relation to the volume ratio of N2 in the gas mixture of (Ar+N2) in Example 1.



FIG. 3 is a schematic cross-sectional view illustrating the formation of a part of a semiconductor device in sequential order of the fabrication.



FIG. 4 is a graph showing Cu filling ratio in relation to the temperature of the high pressure annealing process in Example 2.



FIG. 5 is a graph showing Cu filling ratio in relation to the temperature of the high pressure annealing process in Example 3.



FIG. 6 is a graph showing Cu filling ratio in relation to the nitrogen concentration in the C-N alloy thin film in Example 4.



FIG. 7 is a graph showing electric resistance in relation to the nitrogen concentration in the C-N alloy thin film in Example 5.



FIG. 8 is a graph showing electric resistance in relation to the temperature of the high pressure annealing process in Example 6.



FIG. 9 is a graph showing the initial stress (residual stress in the as-deposited state) in relation to concentration of nitrogen in the Cu—N alloy thin film in Example 7.



FIG. 10 is a graph showing stress after heating to 500° C. and cooling in relation to concentration of nitrogen in the Cu—N alloy thin film in Example 7.


Claims
  • 1. A metal thin film for use as an interconnection of a semiconductor device, wherein the metal thin film is used in fabricating a damascene interconnection of a semiconductor device by a high pressure annealing process, and the metal thin film comprises a Cu alloy containing N at a content of not less than 0.4 at % to not more than 2.0 at %.
  • 2. The metal thin film according to claim 1, wherein metal thin film exhibits a residual strength of −400 to −600 MPa.
  • 3. An interconnection for a semiconductor device fabricated by forming the metal thin film of claim 1 or 2 over an insulator film which is formed over a semiconductor substrate and which has grooves formed therein; and filling the metal thin film in the interior of the grooves by a high pressure annealing process.
  • 4. The interconnection for a semiconductor device according to claim 3, wherein the groove of claim 3 is the one covered with a TaN film.
  • 5. The interconnection for a semiconductor device according to claim 3, wherein the metal thin film exhibits a residual stress of 0 to +200 MPa.
  • 6. The interconnection for a semiconductor device according to claim 4, wherein the metal thin film exhibits a residual stress of 0 to +200 MPa.
  • 7. A method for fabricating a metal thin film for uses as an interconnection of a semiconductor device, wherein the metal thin film of claim 1 or 2 is deposited by sputtering, and the sputtering gas used is a gas mixture of Ar and N2 having a volume ratio (at 25° C., 1 atm) of Ar to N2 of 97.5:2.5 to 82.5:17.5.
  • 8. A method for fabricating the interconnection of a semiconductor device according to claim 3, wherein in the formation of the metal thin film according to claim 1 or 2 over an insulator film which is formed over a semiconductor substrate and which has grooves formed therein and filling of the metal thin film in the interior of the groove, the high pressure annealing process is conducted under the conditions including a temperature of 200 to 650° C. and a pressure of 50 to 250 MPa.
  • 9. The method according to claim 8, wherein the insulator film is the one having a groove whose surface is coated with TaN film.
  • 10. The method according to claim 8, wherein the insulator film according to claim 8 has a groove having a minimum width of not more than 0.15 μm and a depth of not less than 0.15 μm.
  • 11. The method according to claim 9, wherein the insulator film according to claim 9 has a groove having a minimum width of not more than 0.15 μm and a depth of not less than 0.15 μm.
  • 12. The method for fabricating an interconnection of a semiconductor device according to claim 7, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 4.
  • 13. The method for fabricating an interconnection of a semiconductor device according to claim 7, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 5.
  • 14. The method for fabricating an interconnection of a semiconductor device according to claim 7, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 6.
  • 15. The method for fabricating an interconnection of a semiconductor device according to claim 8, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 4.
  • 16. The method for fabricating an interconnection of a semiconductor device according to claim 8, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 5.
  • 17. The method for fabricating an interconnection of a semiconductor device according to claim 8, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 6.
  • 18. The method for fabricating an interconnection of a semiconductor device according to claim 9, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 4.
  • 19. The method for fabricating an interconnection of a semiconductor device according to claim 9, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 5.
  • 20. The method for fabricating an interconnection of a semiconductor device according to claim 9, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 6.
  • 21. The A method for fabricating an interconnection of a semiconductor device according to claim 10, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 4.
  • 22. The method for fabricating an interconnection of a semiconductor device according to claim 10, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 5.
  • 23. The method for fabricating an interconnection of a semiconductor device according to claim 10, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 6.
  • 24. The A method for fabricating an interconnection of a semiconductor device according to claim 11, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 4.
  • 25. The method for fabricating an interconnection of a semiconductor device according to claim 11, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 5.
  • 26. The method for fabricating an interconnection of a semiconductor device according to claim 11, wherein the interconnection fabricated is the interconnection of a semiconductor device according to claim 6.
Priority Claims (1)
Number Date Country Kind
2005-375237 Dec 2005 JP national