This invention relates to junction formation and, more particularly, to junction formation using ion implantation prior to deposition.
Ion implantation is a standard technique for introducing conductivity-altering impurities into a workpiece. A desired impurity material is ionized in an ion source, the ions are accelerated to form an ion beam of prescribed energy, and the ion beam is directed at the surface of the workpiece. The energetic ions in the beam penetrate into the bulk of the workpiece material and are embedded into the crystalline lattice of the workpiece material to form a region of desired conductivity.
In a silicon workpiece, one silicon atom is usually tetrahedrally bonded to four neighboring silicon atoms to form a well-ordered lattice across the workpiece. This may be referred to as a diamond cubic crystal structure. In contrast, this order does not exist in amorphous silicon. Instead, the silicon atoms in amorphous silicon form a random network and the silicon atoms may not be tetrahedrally bonded to four other silicon atoms. In fact, some silicon atoms may have dangling bonds.
Amorphizing implants, such as a pre-amorphizing implant (PAI), are used to amorphize the crystal lattice of a workpiece. Prior to the amorphizing implant, the workpiece usually has a crystal lattice with a long-range order, such as the tetrahedrally-bonded crystal structure. This ordered crystal lattice may allow implanted ions to move through the crystal lattice or channel substantially between the atoms of the crystal lattice. By amorphizing the workpiece, channeling of dopants during later implantation may be prevented or reduced because the workpiece will lack the long-range order. Thus, the dopant implant profile may be shallower because ions will not channel deeper into the workpiece.
Forming a damage-free, highly-activated, an abrupt electrical junction becomes more challenging as semiconductor devices are scaled down. This is especially true for extremely thin silicon-on-insulator (ETSOI) or FinFet devices. While deposition systems and diffusion furnaces have been used, it is difficult to control diffusion of dopants into the device to a precise depth. Thus, there is a need in the art for an improved method of precise implantation and, more particularly, improved junction formation.
According to a first aspect of the invention, a doping method is provided. The method comprises implanting a noble gas into a workpiece to a first depth. A dopant is deposited on a surface of the workpiece. The workpiece is annealed such that the dopant diffuses to the first depth.
According to a second aspect of the invention, a doping method is provided. The method comprises implanting a noble gas to a first depth into a plurality of non-planar surfaces of a workpiece. A dopant is deposited on the plurality of non-planar surfaces. The workpiece is annealed such that the dopant diffuses to the first depth of the plurality of non-planar surfaces.
According to a third aspect of the invention, a doping method is provided. The method comprises placing a workpiece into a process chamber. A vacuum is formed in the process chamber. A noble gas plasma is formed in the process chamber. Noble gas ions are implanted into the workpiece to a first depth. The process chamber is filled with a dopant species and the dopant species is deposited on the workpiece. The workpiece is removed from the process chamber and the vacuum is broken. The workpiece is annealed such that the dopant diffuses to the first depth of the workpiece.
For a better understanding of the present disclosure, reference is made to the accompanying drawings, which are incorporated herein by reference and in which:
The embodiments of this process are described herein in connection with a plasma doping ion implanter. However, these embodiments can be used with other systems and processes involved in semiconductor manufacturing or other systems that use implantation or deposition. For example, in an alternate embodiment, a beamline ion implanter is used with a deposition system. Thus, the invention is not limited to the specific embodiments described below.
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The plasma doping system 100 further includes a source 101 configured to generate a plasma 106 from an implant gas within the process chamber 102. The source 101 may be an RF source or other sources known to those skilled in the art. The platen 104 may be biased. This bias may be provided by a DC or RF power supply. The plasma doping system 100 may further include a shield ring, a Faraday sensor, or other components. In some embodiments, the plasma doping system 100 is part of a cluster tool, or operatively-linked process chambers 102 within a single plasma doping system 100. Thus, numerous process chambers 102 may be linked in vacuum. Some process chambers 102 may implant while others deposit in these embodiments.
During operation, the source 101 is configured to generate the plasma 106 within the process chamber 102. In one embodiment, the source 101 is an RF source that resonates RF currents in at least one RF antenna to produce an oscillating magnetic field. The oscillating magnetic field induces RF currents in the process chamber 102. The RF currents in the process chamber 102 excite and ionize the implant gas to generate the plasma 106. The bias provided to the platen 104 and, hence, the workpiece 105 will accelerate ions from the plasma 106 toward the workpiece 105 during bias pulse on periods. The frequency of the pulsed platen signal and/or the duty cycle of the pulses may be selected to provide a desired dose rate. The amplitude of the pulsed platen signal may be selected to provide a desired energy. With all other parameters being equal, a greater energy will result in a greater implanted depth.
As stated above, silicon is typically a crystalline structure, where each silicon atom is tetrahedrally bonded to four neighboring silicon atoms. Ion implantation may be used to form an amorphous structure in the silicon. In one instance, a partially or fully amorphized crystal structure may be formed using a PAI. By bombarding this crystalline structure of the workpiece with atoms or ions, such as helium, the crystalline structure of the silicon may be altered. An amorphous crystal structure lacks a long-range order and includes some atoms with dangling bonds. Since this crystal lattice lacks a long-range order, the channels within the crystal lattice do not exist. Thus, ions are unable to channel between the crystal lattice of the workpiece.
While PAI eliminates the channeling issue, it causes other problems. The implantation of ions, specifically heavier species such as germanium and silicon, causes residual damage at end of range (EOR). The end of range is the lowest depth within the workpiece where implanted ions reach. These EOR defects cause subsequent leakage in a CMOS transistor. Ultra shallow junctions also require annealing techniques capable of millisecond (MS) thermal budgets near the target temperature. Two drawbacks of the MS anneal are the inability to completely remove the implant damage from heavier species, specifically the EOR defects described above, and the lack of lateral diffusion of the dopant, which causes overlap capacitance issues within the device.
A helium implant may not only prevent channeling of ions, but also may enable a millisecond (MS) anneal. A helium implant has the ability to partially or fully amorphize a workpiece so that channeling of ions is prevented. In addition, it has been found that a helium implants result in no or low residual damage after annealing. A helium PAI also will fully repair with a solid phase epitaxy (SPE) anneal or MS anneal. Furthermore, because there is no residual damage, a helium PAI also will not cause substantial leakage, unlike a germanium PAI.
Additionally, during the anneal process after a helium implant, some implanted dopant ions, such as boron, arsenic, phosphorus, or others, will transport to the original amorphous-crystalline interface that was created by the helium implant. Tests have shown that these implanted ions do not diffuse past the original amorphous-crystalline interface, and instead stop at this interface. This transport phenomenon gives helium the ability to tailor junction depth (Xj) and/or lateral diffusion (Yj). A helium PAI may, thus, enable an MS anneal by overcoming issues associated with lateral diffusion. While helium is specifically named herein, other species, such as noble gases, may have the same effect.
In
A dopant 205 is deposited on the workpiece 105 in
The PAI is used to control diffusion of the dopant 205. The dopant 205 will only diffuse to the amorphous-crystalline interface at the first depth 204. Use of helium or other noble gases for the PAI also reduces implant damage and enables use of an MS anneal. Helium or other noble gases also enhances activation and enables for Xj and Yj control during annealing.
The workpiece 105 in
In
A dopant 205 is deposited on the workpiece 105 in
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The embodiments of
In
A plasma of an implant species 202, such as helium or another noble gas, is formed in
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In an alternate embodiment, the plasma doping system 100 may be used to remove any oxide coating from the workpiece 105. The plasma doping system 100 may form a plasma of, for example, argon, which is used to sputter the workpiece 105. This also may occur without breaking vacuum around the workpiece 105. In one instance, the workpiece 105 may be moved to the load lock 107 after the sputtering but prior to the implant species 202 filling the process chamber 102. In another instance the workpiece 105 remains on the platen 104 after sputtering while the implant species 202 fills the process chamber.
By not breaking vacuum during processing, oxide layer growth on the workpiece 105 is prevented or reduced. A sputtering step to remove the oxide layer on the surface of the workpiece 105 may be prevented because oxide growth is minimized if the workpiece 105 is in a vacuum environment. In another instance, an initial oxide layer is sputtered off the workpiece 105 and the vacuum in the plasma doping system 100 prevents subsequent oxide growth. Thus, use of multiple sputtering steps can be avoided.
The present disclosure is not to be limited in scope by the specific embodiments described herein. Indeed, other various embodiments of and modifications to the present disclosure, in addition to those described herein, will be apparent to those of ordinary skill in the art from the foregoing description and accompanying drawings. Thus, such other embodiments and modifications are intended to fall within the scope of the present disclosure. Furthermore, although the present disclosure has been described herein in the context of a particular implementation in a particular environment for a particular purpose, those of ordinary skill in the art will recognize that its usefulness is not limited thereto and that the present disclosure may be beneficially implemented in any number of environments for any number of purposes. Accordingly, the claims set forth below should be construed in view of the full breadth and spirit of the present disclosure as described herein.