Claims
- 1. A method of plasma etching a silicon oxynitride-comprising layer in a semiconductor film stack, said method comprising: using an etchant gas mixture comprising chlorine and at least one compound comprising fluorine and carbon, wherein the atomic ratio of fluorine to chlorine in said etchant gas ranges between about 3:1 and about 0.01:1.
- 2. The method of claim 1, wherein said silicon oxynitride-comprising layer includes an oxide capping layer.
- 3. The method of claim 1, wherein s aid atomic ratio of fluorine to chlorine in said etchant gas ranges between about 0.5:1 and about 0.01:1.
- 4. The method of claim 3, wherein said atomic ratio of fluorine to chlorine in said etchant gas ranges between about 0.25:1 and about 0.1:1.
- 5. The method of claim 1 or claim 2 or claim 3, wherein said etchant gas forms a fluorine-comprising polymer or species which deposits on exposed surfaces adjacent to said silicon oxynitride-comprising layer in an amount sufficient to reduce the etch rate of said adjacent material while permitting the etching of said silicon oxynitride-comprising layer.
- 6. The method of claim 5, wherein a material having an exposed surface adjacent said silicon oxynitride-comprising layer comprises a photoresist.
- 7. The method of claim 6, wherein said photoresist is a DUV photoresist.
- 8. The method of claim 5, wherein said plasma etching is carried out in an apparatus which enables independent control of a plasma density and an ion bombardment energy of a substrate surface.
- 9. The method of claim 5, wherein said etchant gas mixture does not contain free oxygen.
- 10. The method of claim 1 or claim 2 or claim 3, wherein said etchant gas compound comprising fluorine and carbon is selected from the group consisting of CHF3, CF4, CF3Cl, C2F4, C2F6, and combinations thereof.
- 11. The method of claim 10, wherein said etchant gas includes an assisting gas which is used to increase the rate of etching by controlling the rate of deposition of said fluorine-comprising polymer or species on said stack surface, wherein said assisting gas is selected from the group consisting of F2, HF, HCl, NF3, SF6, and combinations thereof.
- 12. The method of claim 1 or claim 2 or claim 3, wherein said plasma etching is performed using a process chamber pressure within the range of about 2 mTorr and about 20 mTorr.
- 13. The method of claim 12, wherein said process chamber pressure is within the range of about 2 mTorr and about 12 mTorr.
- 14. The method of claim 13, wherein said process chamber pressure is within the range of about 2 mTorr and about 8 mTorr.
- 15. The method of claim 1 or claim 2 or claim 3, wherein said plasma etching is carried out in an apparatus which enables independent control of a plasma density and an ion bombardment energy of a substrate surface.
Parent Case Info
This application is a continuation application of application Ser. No. 09/317,655, filed May 24, 1999, now U.S. Pat. No. 6,291,356, which is a continuation-in-part of application Ser. No. 08/986,911, filed Dec. 8, 1997, now U.S. Pat. No. 6,013,582.
US Referenced Citations (31)
Foreign Referenced Citations (2)
Number |
Date |
Country |
0470707 |
Feb 1992 |
EP |
0644582 |
Mar 1995 |
EP |
Non-Patent Literature Citations (3)
Entry |
S. Arai et al., “Deposition in Dry-Etching Gas Plasmas”, Jpn. J. Appl. Phys., vol. 31, Pt. 1, No. 6B, pp. 2011-2019 (1992). |
W. Lee et al., “Fabrication of 0.06 μm Poly-Si Gate using DUV Lithography with a Designed SiON Film as an ARC and Hardmask”, 1997 Symposium on VLSI Technology Digest of Technical Papers, XP-002096577, pp. 131-132 (1997). |
Y. Ye et al., “0.35-Micron and Sub-0.35-Micron Metal Stack Etch in a DPS Chamber—DPS Chamber and Process Characterization”, Electrochemical Society Proceedings, vol. 96-12, pp. 222-233 (1996). |
Continuations (1)
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Number |
Date |
Country |
Parent |
09/317655 |
May 1999 |
US |
Child |
09/920251 |
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US |
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
08/986911 |
Dec 1997 |
US |
Child |
09/317655 |
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US |