This invention relates generally to a method for fabricating semiconductor structures and devices and more specifically to a method for fabricating semiconductor structures and devices on vicinal substrates using a low temperature, low pressure, alkaline earth metal-rich process.
Semiconductor devices often include multiple layers of conductive, insulating, and semiconductive layers. Often, the desirable properties of such layers improve with the crystallinity of the layer. For example, the electron mobility and electron lifetime of semiconductive layers improve as the crystallinity of the layer increases. Similarly, the free electron concentration of conductive layers and the electron charge displacement and electron energy recoverability of insulative or dielectric films improve as the crystallinity of these layers increases.
For many years, attempts have been made to grow various monolithic thin films on a foreign substrate such as silicon (Si). To achieve optimal characteristics of the various monolithic layers, however, a monocrystalline film of high crystalline quality is desired. Attempts have been made, for example, to grow various monocrystalline layers on a substrate such as germanium, silicon, and various insulators. These attempts have generally been unsuccessful because lattice mismatches between the host crystal and the grown crystal have caused the resulting layer of monocrystalline material to be of low crystalline quality.
If a large area thin film of high quality monocrystalline material were available at low cost, a variety of semiconductor devices could advantageously be fabricated in or using that film at a low cost compared to the cost of fabricating such devices beginning with a bulk wafer of semiconductor material or in an epitaxial film of such material on a bulk wafer of semiconductor material. In addition, if a thin film of high quality monocrystalline material could be realized beginning with a bulk wafer such as a silicon wafer, an integrated device structure could be achieved that took advantage of the best properties of both the silicon and the high quality monocrystalline material.
Epitaxial growth of monocrystalline oxide thin films on silicon has numerous potential device applications, such as, for example, ferroelectric devices, high density memory devices, and next-generation MOS devices. Some of these oxides, such as BaO and BaTiO3, were formed on silicon (100) using a BaSi2 (cubic) template by depositing one fourth monolayer of Ba on silicon (100) using molecular beam epitaxy at temperatures greater than 850° C. See, e.g., R. McKee et al., Appl. Phys. Lett. 59(7), p. 782–784 (12 Aug. 1991); R. McKee et al., Appl. Phys. Lett. 63(20), p. 2818–2820 (15 Nov. 1993); R. McKee et al., Mat. Res. Soc. Symp. Proc., Vol. 21, p. 131–135 (1991); U.S. Pat. No. 5,225,031, issued Jul. 6, 1993, entitled “PROCESS FOR DEPOSITING AN OXIDE EPITAXIALLY ONTO A SILICON SUBSTRATE AND STRUCTURES PREPARED WITH THE PROCESS”; and U.S. Pat. No. 5,482,003, issued Jan. 9, 1996, entitled “PROCESS FOR DEPOSITING EPITAXIAL ALKALINE EARTH OXIDE ONTO A SUBSTRATE AND STRUCTURES PREPARED WITH THE PROCESS.” A strontium silicide (SrSi2) interface model with a c(4×2) structure was proposed. See, e.g., R. McKee et al., Phys. Rev. Lett. 81(14), 3014 (5 Oct. 1998).
Growth of SrTiO3 on silicon (100) using an SrO buffer layer has been accomplished. See, e.g., T. Tambo et al., Jpn. J. Appl. Phys., Vol. 37, p. 4454–4459 (1998). However, the SrO buffer layer was thick (100 Å), and crystallinity was not maintained throughout the growth. Furthermore, SrTiO3 has been grown on silicon using thick oxide layers (60–120 Å) of SrO or TiO. See, e.g., B. K. Moon et al., Jpn. J. Appl. Phys., Vol. 33, p. 1472–1477 (1994). These thick buffer layers, however, would limit the application for transistors.
Accordingly, a need exists for a semiconductor structure that provides a high quality monocrystalline film or layer over another monocrystalline material and for a process for making such a structure.
The present invention is illustrated by way of example and not limitation in the accompanying figures, in which like references indicate similar elements, and in which:
Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.
In accordance with one embodiment of the invention, structure 20 also includes an amorphous interface layer 28 positioned between substrate 22 and accommodating buffer layer 24. Structure 20 may also include a template layer 30 between the accommodating buffer layer and monocrystalline material layer 26. When present, the template layer helps to initiate the growth of the monocrystalline material layer on the accommodating buffer layer. The amorphous interface layer helps to decouple the buffer layer from the substrate.
Substrate 22, in accordance with an embodiment of the invention, is a monocrystalline semiconductor or compound semiconductor wafer, preferably of large diameter. The wafer can be of, for example, a material from Group IV of the periodic table. Examples of Group IV semiconductor materials include silicon, germanium, mixed silicon and germanium, mixed silicon and carbon, mixed silicon, germanium and carbon, and the like. Preferably substrate 22 is a wafer containing silicon or germanium, and most preferably is a high quality monocrystalline silicon wafer as used in the semiconductor industry. Accommodating buffer layer 24 is preferably a monocrystalline oxide or nitride material epitaxially grown on the underlying substrate. In accordance with one embodiment of the invention, amorphous interface layer 28 is grown on substrate 22 at the interface between substrate 22 and the growing accommodating buffer layer by the oxidation of substrate 22 either during or after the growth of layer 24. The amorphous interface layer 28 serves as a decoupling layer between the substrate and the buffer layer. As used herein, lattice constant refers to the distance between atoms of a cell measured in the plane of the surface.
Accommodating buffer layer 24 is preferably a monocrystalline oxide or nitride material selected for its crystalline compatibility with the underlying substrate and with any overlying material layer. For example, the material could be an oxide or nitride having a lattice structure closely matched to the substrate and to the subsequently applied monocrystalline material layer. Materials that are suitable for the accommodating buffer layer include metal oxides such as the alkaline earth metal titanates, alkaline earth metal zirconates, alkaline earth metal hafnates, alkaline earth metal tantalates, alkaline earth metal ruthenates, alkaline earth metal niobates, alkaline earth metal vanadates, alkaline earth metal tin-based perovskites, lanthanum aluminate, lanthanum scandium oxide, and other perovskite oxide materials, and gadolinium oxide. Additionally, various nitrides such as gallium nitride, aluminum nitride, and boron nitride may also be used for the accommodating buffer layer. Most of these materials are insulators, although strontium ruthenate, for example, is a conductor. Generally, these materials are metal oxides or metal nitrides, and more particularly, these metal oxides or nitrides typically include at least two different metallic elements. In some specific applications, the metal oxides or nitrides may include three or more different metallic elements.
Amorphous interface layer 28 is preferably an oxide formed by the oxidation of the surface of substrate 22, and more preferably is composed of a silicon oxide, silicate or the combination of the two. The thickness of layer 28 is sufficient to decouple the substrate 22 from the buffer layer 24. Because if its desirable chemically stability, low dielectric constant, and amorphous phase, the amorphous interfacial layer serves to decouple the buffer layer from the substrate crystal-graphically, chemically, and dielectrically.
When structure 20 includes a monocrystalline layer 26, the material for monocrystalline material layer 26 can be selected, as desired, for a particular structure or application. For example, the monocrystalline material of layer 26 may comprise a another monocrystalline oxide or nitride layer. Monocrystalline material layer 26 may also comprise other semiconductor materials, metals, or non-metal materials which are used in the formation of semiconductor structures, devices and/or integrated circuits.
Suitable template materials chemically bond to the surface of the accommodating buffer layer 24 at selected sites and provide sites for the nucleation of the epitaxial growth of monocrystalline material layer 26. When used, template layer 30 has a thickness ranging from about 1 to about 10 monolayers.
As explained in greater detail below, amorphous layer 36 may be formed by first forming an accommodating buffer layer and an amorphous interface layer in a similar manner to that described above. Monocrystalline layer 38 is then formed (by epitaxial growth) overlying the monocrystalline accommodating buffer layer. The accommodating buffer layer may then be optionally exposed to an anneal process to convert at least a portion of the monocrystalline accommodating buffer layer to an amorphous layer. Amorphous layer 36 formed in this manner comprises materials from both the accommodating buffer and interface layers, which amorphous layers may or may not amalgamate. Thus, layer 36 may comprise one or two amorphous layers. The processes previously described above in connection with
In accordance with one embodiment of the present invention, additional monocrystalline layer 38 serves as an anneal cap during layer 36 formation and as a template for subsequent monocrystalline layer 26 formation. Accordingly, layer 38 is preferably thick enough to provide a suitable template for layer 26 growth (at least one monolayer) and thin enough to allow layer 38 to form as a substantially defect free monocrystalline material.
In accordance with another embodiment of the invention, additional monocrystalline layer 38 comprises monocrystalline material (e.g., a material discussed above in connection with monocrystalline layer 26) and does not include monocrystalline material layer 26. In other words, the semiconductor structure in accordance with this embodiment only includes one monocrystalline layer disposed above amorphous oxide layer 36.
The following non-limiting, illustrative examples illustrate various combinations of materials useful in structures 20, 40, and 34 in accordance with various alternative embodiments of the invention. These examples are merely illustrative, and it is not intended that the invention be limited to these illustrative examples.
In accordance with one embodiment of the invention, monocrystalline substrate 22 is a silicon substrate typically (001) oriented. The silicon substrate can be, for example, a silicon substrate as is commonly used in making complementary metal oxide semiconductor (CMOS) integrated circuits having a diameter of about 200–300 mm. In accordance with this embodiment of the invention, accommodating buffer layer 24 is a monocrystalline layer of SrzBa1−zTiO3 where z ranges from 0 to 1 and the amorphous intermediate layer is a layer of silicon oxide (SiOx) formed at the interface between the silicon substrate and the accommodating buffer layer. The value of z is selected to obtain one or more lattice constants closely matched to corresponding lattice constants of the substrate and any subsequently formed layer 26. The lattice structure of the resulting crystalline oxide exhibits a substantially 45° rotation with respect to the substrate silicon lattice structure. The accommodating buffer layer can have a thickness of about 2 to about 200 nanometers (nm). In general, it is desired to have an accommodating buffer layer thick enough to isolate the monocrystalline material layer 26 from the substrate to obtain the desired electrical and optical properties. Layers thicker than 200 nm usually provide little additional benefit while increasing cost unnecessarily; however, thicker layers may be fabricated if needed. The amorphous interface layer 28 of silicon oxide can have a thickness of about 0.5–500 nm.
This example provides exemplary materials useful in structure 34, as illustrated in
Amorphous layer 36 is an amorphous oxide layer which is suitably formed of a combination of amorphous interface layer materials (e.g., layer 28 materials as described above) and accommodating buffer layer materials (e.g., layer 24 materials as described above). For example, amorphous layer 36 may include a combination of SiOx and SrzBa1−zTiO3 (where z ranges from 0 to 1), which combine or mix, at least partially, during an anneal process to form amorphous oxide layer 36.
The thickness of amorphous layer 36 may vary from application to application and may depend on such factors as desired insulating properties of layer 36, type of monocrystalline material comprising layer 26, and the like. In accordance with one exemplary aspect of the present embodiment, layer 36 thickness is about 1 nm to about 500 nm.
Layer 38 comprises a monocrystalline material that can be grown epitaxially over a monocrystalline oxide material such as material used to form accommodating buffer layer 24. In accordance with one embodiment of the invention, layer 38 includes the same materials as those comprising layer 26. However, in accordance with other embodiments of the present invention, layer 38 may include materials different from those used to form layer 26. In accordance with one exemplary embodiment of the invention, layer 38 is about 1 nm to about 500 nm thick.
Referring again to
In accordance with one embodiment of the invention, substrate 22 is typically a (001) oriented monocrystalline silicon wafer and accommodating buffer layer 24 is a layer of strontium barium titanate. Substantial (i.e., effective) matching of lattice constants between these two materials is achieved by rotating the crystal orientation of the titanate material by approximately 45° with respect to the crystal orientation of the silicon substrate wafer. The inclusion in the structure of amorphous interface layer 28, a silicon oxide layer in this example, if it is of sufficient thickness, serves to reduce strain in the titanate monocrystalline layer that might result from any mismatch in the lattice constants of the host silicon wafer and the grown titanate layer. As a result, in accordance with an embodiment of the invention, a high quality, thick, monocrystalline titanate layer is achievable.
Still referring to
The following example illustrates a process, in accordance with one embodiment of the invention, for fabricating a semiconductor structure such as the structures depicted in
It is understood that precise measurement of actual temperatures in MBE equipment, as well as other processing equipment, is difficult, and is commonly accomplished by the use of a pyrometer or by means of a thermocouple placed in close proximity to the substrate. Calibrations can be performed to correlate the pyrometer temperature reading to that of the thermocouple. However, neither temperature reading is necessarily a precise indication of actual substrate temperature. Furthermore, variations may exist when measuring temperatures from one MBE system to another MBE system. For the purpose of this description, typical pyrometer temperatures will be used, and it should be understood that variations may exist in practice due to these measurement difficulties.
In accordance with an alternate embodiment of the invention, the native silicon oxide can be converted and the substrate surface can be prepared for the growth of a monocrystalline oxide layer by depositing an alkaline earth metal oxide, such as strontium oxide, strontium barium oxide, or barium oxide, onto the substrate surface by MBE at a low temperature and by subsequently heating the structure to a temperature of above 720° C. At this temperature a solid state reaction takes place between the strontium oxide and the native silicon oxide causing the reduction of the native silicon oxide and leaving an ordered (2×1) structure on the substrate surface. If an ordered (2×1) structure has not been achieved at this stage of the process, the structure may be exposed to additional strontium until an ordered (2×1) structure is obtained. Again, this forms a template for the subsequent growth of an ordered monocrystalline oxide layer.
Following the removal of the silicon oxide from the surface of the substrate, in accordance with one embodiment of the invention, the substrate is cooled to a temperature in the range of about 200–600° C., preferably 350°–550° C., and a layer of strontium titanate is grown on the template layer by molecular beam epitaxy. The MBE process is initiated by opening shutters in the MBE apparatus to expose strontium, titanium and oxygen sources. The partial pressure of oxygen is initially set at a minimum value to grow stoichiometric strontium titanate at a growth rate of about 0.1–0.8 nm per minute, preferably 0.3–0.5 nm per minute. After initiating growth of the strontium titanate, the partial pressure of oxygen is increased above the initial minimum value. The stoichiometry of the film can be controlled during growth by monitoring RHEED patterns and adjusting the titanium and strontium fluxes. The overpressure of oxygen causes the growth of an amorphous silicon oxide layer at the interface between the underlying substrate and the strontium titanate layer. This step may be applied either during or after the growth of the strontium titanate layer. The growth of the amorphous silicon oxide layer results from the diffusion of oxygen through the strontium titanate layer to the interface where the oxygen reacts with silicon at the surface of the underlying substrate. The strontium titanate grows as an ordered (100) monocrystal with the (100) crystalline orientation rotated by 45° with respect to the underlying substrate.
The structure illustrated in
Structure 34, illustrated in
In accordance with one aspect of this embodiment, layer 36 is formed by exposing substrate 22, the accommodating buffer layer 24, the amorphous oxide layer 28, and monocrystalline layer 38 to a rapid thermal anneal process with a peak temperature of about 700° C. to about 1000° C. (actual temperature) and a process time of about 5 seconds to about 20 minutes. However, other suitable anneal processes may be employed to convert the accommodating buffer layer to an amorphous layer in accordance with the present invention. For example, laser annealing, electron beam annealing, or “conventional” thermal annealing processes (in the proper environment) may be used to form layer 36. When conventional thermal annealing is employed to form layer 36, an overpressure of one or more constituents of layer 38 may be required to prevent degradation of layer 38 during the anneal process. Alternately, an appropriate anneal cap, such as silicon nitride, may be utilized to prevent the degradation of layer 38 during the anneal process with the anneal cap being removed after the annealing process.
As noted above, layer 38 of structure 34 may include any materials suitable for either of layers 32 or 26. Accordingly, any deposition or growth methods described in connection with either layer 32 or 26 may be employed to deposit layer 38.
In accordance with another exemplary embodiment of the invention, high quality epitaxial metal oxide layers, such as accommodating buffer layer 24 illustrated in
The process in accordance with various embodiments of the present invention may be illustrated according to the following example. In this example, metal oxide layer 104 has at least one alkaline earth metal A and at least one metal B and can be represented by the general formula ABO3, although it will be appreciated that the process is not intended to be limited to this particular material.
Referring to
Following the removal of the silicon oxide from the surface of the substrate, in accordance with one embodiment of the invention, the temperature of the substrate is adjusted to be within the range of about 200–600° C., more preferably within the range of about 250–450° C., and most preferably within the range of about 300–400° C. (30) and a layer of ABO3 is grown on the template layer by MBE. The MBE process is initiated by first introducing oxygen, then opening shutters in the MBE apparatus to expose the alkaline earth metal A and the metal B (co deposition). The initial ratio of the alkaline earth metal A to the metal B is greater than 1 (40). In addition, growing the metal oxide layer under alkaline earth metal-rich conditions avoids the formation of metal B-rich reconstruction, a surface phase that is less favorable for initial metal oxide film growth on semiconductors. The partial pressure of oxygen is initially set in the range of from about 1×10−9 to about 8×10−8 Torr, preferably in the range of from about 5×10−9 to about 5×10−8 Torr (50). The partial pressure of oxygen however depends on the growth rate of the film—if the growth rate increases, the oxygen partial pressure should be increased accordingly. The low oxygen pressure may significantly reduce, if not eliminate, the formation of disordered substrate-oxide surface phases at early stages of the metal oxide growth. This low pressure, low temperature process significantly limits the substrate oxidation and allows high quality metal oxide films to be grown on vicinal substrates before they are oxidized.
Once the film reaches an adequate thickness, for example, at least 20 Å thick, preferably greater than 40 Å, the film is sufficiently stable and the oxidation of the underneath Si will not degrade the film quality. At this point, the ratio of the alkaline earth metal A to the metal B can be adjusted to approximately 1:1 so that the rest of the ABO3 film can be grown stoichiometrically. Additionally, the partial pressure of oxygen and the growth temperature can be increased to ensure that the film is fully oxidized and the film crystallinity remains satisfactory.
It will be appreciated that this low pressure, low temperature method may also be used to grow epitaxial metal oxides layers (26, 106) overlying other monocrystalline metal oxide layers on monocrystalline substrates. For example, this process can be used to grow SrTiO3 overlying a layer of SrxBa1−xTiO3, where x ranges from 0 to 1. Various combinations of these metal oxides can be used to form, for example, high-k materials suitable for use in microelectronic device formation.
In another embodiment, the partial pressure of oxygen may be increased above the initial minimum value after initiating the growth of the ABO3 layer. The stoichiometry of the metal oxide film can be controlled during growth by monitoring RHEED patterns and adjusting the metal fluxes. The overpressure of oxygen causes the growth of an amorphous oxide layer at the interface between the underlying substrate and the ABO3 layer (60). This step may be applied either during or after the growth of the ABO3 layer. The growth of the amorphous oxide layer results from the diffusion of oxygen through the ABO3 layer to the interface where the oxygen reacts with the substrate at the surface of the underlying substrate. The ABO3 layer grows as an ordered (100) monocrystal with the (100) crystalline orientation rotated by 45°.
After the ABO3 layer has been grown to a desired thickness, the process may proceed as previously described for formation of semiconductor devices. The monocrystalline ABO3 layer may be capped by a template layer that is conducive to the subsequent growth of an epitaxial layer of a desired monocrystalline material (70).
A structure, such as structure 34 illustrated in
It will be appreciated that, while the above example illustrates an embodiment of the process of the present invention using a metal oxide formed of an alkaline earth metal A and a metal B, the process of the present invention may be used to grow a variety of other metal oxide layers on vicinal substrates. To grow metal oxides that do not comprise an alkaline earth metal, it may be desirable to expose the substrate to an alkaline earth metal source during formation of the metal oxide to facilitate oxidation of the metal. The following example illustrates a process, in accordance with one embodiment of the invention, for forming an epitaxial layer of LaAlO3 overlying a vicinal substrate in the presence of a small amount of alkaline earth metal.
The process starts by providing a monocrystalline semiconductor substrate comprising silicon or germanium (10). In accordance with a preferred embodiment of the invention, the semiconductor substrate is a silicon wafer having a (100) orientation. The substrate is oriented on axis or, at most, about 6° off axis, and preferably is misoriented 1–3° off axis toward the [110] direction. The process previously described for removal of any native oxide on the surface of silicon substrate 22 using strontium, barium, a combination of strontium and barium or other alkaline earth metals or a combination of alkaline earth metals and the preparation of silicon substrate 22 for growth of a monocrystalline oxide layer with reference to
Following the removal of the silicon oxide from the surface of the substrate, in accordance with one embodiment of the invention, the temperature of the substrate is adjusted to be within the range of about 200–600° C., more preferably within the range of about 250–450° C., and most preferably within the range of about 300–400° C., and a layer of LaAlO3 is grown on the template layer by MBE. The MBE process is initiated by first introducing oxygen, then opening shutters in the MBE apparatus to expose the lanthanum and the aluminum sources. In addition, the substrate should also be exposed to a source of alkaline earth metal, such as, for example, magnesium, strontium or barium, to facilitation oxidation of the aluminum. The alkaline earth metal may comprise approximately 0.1% to 10% of the total flux to the substrate.
After initiating growth of the alkaline earth doped LaAlO3 layer, the partial pressure of oxygen may be increased above the initial minimum value. The overpressure of oxygen causes the growth of an amorphous interface layer at the interface between the underlying substrate and the doped LaAlO3 layer. This step may be applied either during or after the growth of the LaAlO3 layer. The growth of the amorphous interface layer results from the diffusion of oxygen through the doped LaAlO3 layer to the interface where the oxygen reacts with the silicon at the surface of the underlying substrate. The LaAlO3 layer grows as an ordered (100) monocrystal with the (100) crystalline orientation rotated by 45°.
After the alkaline earth doped LaAlO3 layer has been grown to a desired thickness, the process may proceed as previously described. The monocrystalline LaAlO3 layer may be capped by a template layer that is conducive to the subsequent growth of an epitaxial layer of a desired monocrystalline material.
The processes described above illustrate processes for forming layers on vicinal surfaces using MBE. However, the processes can also be carried out using CVD, MOCVD, MEE, ALE, PVD, CSD, PLD and the like. Further, it will be appreciated that, by similar processes, a variety of monocrystalline accommodating buffer layers such as alkaline earth metal titanates, zirconates, hafnates, tantalates, vanadates, ruthenates, niobates, alkaline earth metal tin-based perovskites, lanthanum aluminate, lanthanum scandium oxide, and gadolinium oxide can also be grown. In addition, by similar processes, other monocrystalline material layers comprising other III-V, II-VI, and IV-VI monocrystalline compound semiconductors, semiconductors, metals and non-metals can be deposited overlying the monocrystalline metal oxide accommodating buffer layer.
As should now be appreciated, semiconductor structures and devices in accordance with various embodiments of the present invention may be fabricated using a low temperature, low pressure, alkaline earth metal-rich process for growing high quality epitaxial metal oxide layers overlying monocrystalline substrates, including vicinal substrates.
In the foregoing specification, the invention has been described with reference to specific embodiments. However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of present invention.
Benefits, other advantages, and solutions to problems have been described above with regard to specific embodiments. However, the benefits, advantages, solutions to problems, and any element(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential features or elements of any or all the claims. As used herein, the terms “comprises,” “comprising,” or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
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0 964 453 | Dec 1999 | EP |
0 993 027 | Apr 2000 | EP |
0 999 600 | May 2000 | EP |
1 001 468 | May 2000 | EP |
1 035 759 | Sep 2000 | EP |
1 037 272 | Sep 2000 | EP |
1 043 426 | Oct 2000 | EP |
1 043 427 | Oct 2000 | EP |
1 043 765 | Oct 2000 | EP |
1 064 442 | Nov 2000 | EP |
1 069 605 | Jan 2001 | EP |
1 069 606 | Jan 2001 | EP |
1 085 319 | Mar 2001 | EP |
1 089 338 | Apr 2001 | EP |
1 109 212 | Jun 2001 | EP |
1 176 230 | Jan 2002 | EP |
2 779 843 | Dec 1999 | FR |
1 319 311 | Jun 1970 | GB |
2 152 315 | Jul 1985 | GB |
2 335 792 | Sep 1999 | GB |
52-88354 | Jul 1977 | JP |
52-89070 | Jul 1977 | JP |
52-135684 | Nov 1977 | JP |
54-134554 | Oct 1979 | JP |
55-87424 | Jul 1980 | JP |
58-075868 | May 1983 | JP |
58-213412 | Dec 1983 | JP |
59-044004 | Mar 1984 | JP |
59-073498 | Apr 1984 | JP |
59066183 | Apr 1984 | JP |
60-161635 | Aug 1985 | JP |
60-210018 | Oct 1985 | JP |
60-212018 | Oct 1985 | JP |
61-36981 | Feb 1986 | JP |
61-63015 | Apr 1986 | JP |
61-108187 | May 1986 | JP |
62-245205 | Oct 1987 | JP |
63-34994 | Feb 1988 | JP |
63-131104 | Jun 1988 | JP |
63-198365 | Aug 1988 | JP |
63-289812 | Nov 1988 | JP |
64-50575 | Feb 1989 | JP |
64-52329 | Feb 1989 | JP |
1-102435 | Apr 1989 | JP |
1-179411 | Jul 1989 | JP |
01-196809 | Aug 1989 | JP |
03-149882 | Nov 1989 | JP |
HEI 2-391 | Jan 1990 | JP |
02051220 | Feb 1990 | JP |
3-41783 | Feb 1991 | JP |
03046384 | Feb 1991 | JP |
3-171617 | Jul 1991 | JP |
03-188619 | Aug 1991 | JP |
5-48072 | Feb 1993 | JP |
5-086477 | Apr 1993 | JP |
5-152529 | Jun 1993 | JP |
05150143 | Jun 1993 | JP |
05 221800 | Aug 1993 | JP |
5-232307 | Sep 1993 | JP |
5-238894 | Sep 1993 | JP |
5-243525 | Sep 1993 | JP |
5-291299 | Nov 1993 | JP |
06-069490 | Mar 1994 | JP |
6-232126 | Aug 1994 | JP |
6-291299 | Oct 1994 | JP |
6-334168 | Dec 1994 | JP |
0812494 | Jan 1996 | JP |
9-67193 | Mar 1997 | JP |
9-82913 | Mar 1997 | JP |
10-256154 | Sep 1998 | JP |
10-269842 | Oct 1998 | JP |
10-303396 | Nov 1998 | JP |
10-321943 | Dec 1998 | JP |
11135614 | May 1999 | JP |
11-238683 | Aug 1999 | JP |
11-260835 | Sep 1999 | JP |
01 294594 | Nov 1999 | JP |
11340542 | Dec 1999 | JP |
2000-068466 | Mar 2000 | JP |
2 000 1645 | Jun 2000 | JP |
2000-278085 | Oct 2000 | JP |
2000-349278 | Dec 2000 | JP |
2000-351692 | Dec 2000 | JP |
2001-196892 | Jul 2001 | JP |
2002-9366 | Jan 2002 | JP |
WO 9210875 | Jun 1992 | WO |
WO 9307647 | Apr 1993 | WO |
WO 9403908 | Feb 1994 | WO |
WO 9502904 | Jan 1995 | WO |
WO 9745827 | Dec 1997 | WO |
WO 9805807 | Jan 1998 | WO |
WO 9820606 | May 1998 | WO |
WO 9914797 | Mar 1999 | WO |
WO 9914804 | Mar 1999 | WO |
WO 9919546 | Apr 1999 | WO |
WO 9963580 | Dec 1999 | WO |
WO 9967882 | Dec 1999 | WO |
WO 0006812 | Feb 2000 | WO |
WO 0016378 | Mar 2000 | WO |
WO 0033363 | Jun 2000 | WO |
WO 0048239 | Aug 2000 | WO |
WO 0104943 | Jan 2001 | WO |
WO 0116395 | Mar 2001 | WO |
WO 0133585 | May 2001 | WO |
WO 0137330 | May 2001 | WO |
WO 0159814 | Aug 2001 | WO |
WO 0159820 | Aug 2001 | WO |
WO 0159821 | Aug 2001 | WO |
WO 0159837 | Aug 2001 | WO |
WO 02 01648 | Jan 2002 | WO |
WO 0203113 | Jan 2002 | WO |
WO 0203467 | Jan 2002 | WO |
WO 0203480 | Jan 2002 | WO |
WO 0208806 | Jan 2002 | WO |
WO 02009150 | Jan 2002 | WO |
WO 0209160 | Jan 2002 | WO |
WO 0211254 | Feb 2002 | WO |
WO 0233385 | Apr 2002 | WO |
WO 0247127 | Jun 2002 | WO |
WO 0250879 | Jun 2002 | WO |
WO 02099885 | Dec 2002 | WO |
WO 03012874 | Feb 2003 | WO |
Number | Date | Country | |
---|---|---|---|
20040097096 A1 | May 2004 | US |