BRIEF DESCRIPTION OF THE DRAWINGS
The present invention may be better understood, and its numerous objects, features, and advantages made apparent to those skilled in the art by referencing the accompanying drawings.
FIG. 1 is a partial side view of one embodiment of a semiconductor device during a processing stage, consistent with one embodiment of the invention;
FIG. 2 is a drawing illustrating exemplary micro-structural defects in a deposited oxide layer, consistent with one embodiment of the invention;
FIG. 3 is a partial side view of one embodiment of a semiconductor device during a processing stage, consistent with one embodiment of the invention;
FIG. 4 is a drawing illustrating exemplary removal of micro-structural defects in a deposited oxide layer, consistent with one embodiment of the invention;
FIG. 5 is a partial side view of one embodiment of a nanocluster device during a processing stage, consistent with one embodiment of the invention;
FIG. 6 is a partial side view of one embodiment of a nanocluster device during a processing stage, consistent with one embodiment of the invention;
FIG. 7 is a partial side view of one embodiment of a nanocluster device during a processing stage, consistent with one embodiment of the invention;
FIG. 8 is a partial side view of one embodiment of a nanocluster device during a processing stage, consistent with one embodiment of the invention; and
FIG. 9 is a partial side view of one embodiment of a nanocluster device during a processing stage, consistent with one embodiment of the invention.
FIG. 10 is a partial side view of one embodiment of a semiconductor device during a processing stage, consistent with one embodiment of the invention.
FIG. 11 is a partial side view of one embodiment of a semiconductor device during a processing stage, consistent with one embodiment of the invention.
FIG. 12 is a partial side view of one embodiment of a semiconductor device during a processing stage, consistent with one embodiment of the invention.
FIG. 13 is a partial side view of one embodiment of a semiconductor device during a processing stage, consistent with one embodiment of the invention.
FIG. 14 is a partial side view of one embodiment of a semiconductor device during a processing stage, consistent with one embodiment of the invention.
FIG. 15 is a partial side view of one embodiment of a semiconductor device during a processing stage, consistent with one embodiment of the invention.