The present invention relates to a method for forming a contact window.
In the manufacturing process of integrated circuits, it is often required to form contact windows for electrical connection after most of the main elements have been formed on the substrate. One of the conventional methods for forming the contact windows is shown in
As more and more elements are integrated on the substrate, the size of the pattern 106 is getting smaller and smaller. Consequently, the vertical anisotropy of the etched space, i.e. the contact window, gets higher and higher. In other words, it inevitably increases the “aspect ratio.”
High aspect ratio raises the risk of over-etching, which in turn increases the risk of exposing and short-circuiting the elements 101 on substrate 100. In addition, the shoulders of the elements are apt to be damaged, which results in defects 108. Therefore, there is a need for an alternative solution for forming contact windows.
One of the main aspects of the present invention provides a method for forming a contact window. A low leakage dielectric isolation layer is formed on the sidewalls of previously formed openings to prevent the elements on the substrate from short-circuits due to over-etching.
Another aspect of the present invention provides a method for forming a contact window. A low leakage dielectric isolation layer is formed on the sidewalls of previously formed openings to prevent the shoulders of the elements on the substrate from being damaged due to over-etching.
The present invention therefore discloses a method for forming a contact window, comprising the steps of:
a to 1d illustrate conventional steps of prior art;
a to 2f illustrate a preferred embodiment of the present invention.
The present invention generally relates to a method of forming contact windows on a substrate. These and other aspects, features, and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings. It should be understood, however, that the scope of the present invention is not limited by the illustration of the examples.
The elements on the substrate can be formed via various methods, such as deposition, chemical vapor deposition or atomic layer deposition (ALD), which are known to persons skilled in the art. In addition, Chemical Mechanical Planarization (CMP) may be employed to carry out possible planarization step(s).
A preferred embodiment of the present invention is illustrated in
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As stated above, by means of the steps illustrated in
By means of the detailed descriptions of what is presently considered to be the most practical and preferred embodiments of the subject invention, it is the expectation that the features and the gist thereof are plainly revealed. Nevertheless, these above-mentioned illustrations are not intended to be construed in a limiting sense. Instead, it should be well understood that any analogous variation and equivalent arrangement is supposed to be covered within the spirit and scope to be protected and that the interpretation of the scope of the subject invention would therefore as much as broadly apply.