Patent Application
20080076236
Referring to
Then, a high-temperature SEG process is conducted, consuming about 1% to 20% of the total process time for forming the entire SiGe epitaxial layer. In one embodiment, the high-temperature SEG process consumes about 1% to 15%, preferably about 1% to 10% and more preferably about 3% to 6%, of the total process time. In one embodiment, the high-temperature SEG process is conducted for about 30 seconds.
The high-temperature SEG process is performed at about 700-900° C., preferably about 750-850° C. and more preferably about 780° C.
In the above high-temperature SEG process, the reactant gas includes at least a Si-containing gas and a Ge-containing gas. The Si-containing gas may include silane, disilane or dichlorosilane, in a flow rate of about 50-500 sccm, preferably about 80-150 sccm. The Ge-containing gas may include germane, in a flow rate of about 100-300 sccm, preferably about 130-180 sccm.
Further, the reactant gas can also include a hydrogen chloride gas to enhance the uniformity of the epitaxial layer and lower the loading effect. The flow rate of the hydrogen chloride gas may be about 50-200 sccm, preferably about 110-150 sccm.
Aftet this, a low-temperature SEG process is performed in step 140, consuming about 99% to 80% of the total process time for forming the entire SiGe epitaxial layer. In one embodiment, the low-temperature SEG process consumes about 99% to 85%, preferably about 99% to 90% and more preferably about 97% to 94%, of the total process time, and may be conducted for about 700-800 seconds.
The low-temperature SEG process is conducted at about 500-700° C., preferably about 600° C. to 700° C. and more preferably about 650°.
The reactant gas for the low-temperature SEG process includes at least a Si-containing gas and a Ge-containing gas. The Si-containing gas may include silane, disilane or dichlorosilane, in a flow rate of about 50-500 sccm, preferably about 80-150 sccm. The Ge-containing gas may include germane, in a flow rate of about 100-300 sccm, preferably about 130-180 sccm.
The reactant gas can further include a hydrogen chloride gas to enhance the uniformity of the epitaxial layer and lower the loading effect. The flow rate of the hydrogen chloride gas may be about 50-200 sccm, preferably about 110-150 sccm.
It is particularly noted that the high-temperature SEG process and the low-temperature SEG process can use the same reactant gas or different reactant gases.
It is also noted that the pre-annealing process (Step 110) and the step of forming a pad layer (Step 120) are optional according to the process requirements.
The above Steps 130 and 140 are specified based on the process time of the SEG process. In another embodiment, the two SEG processes are specified based on the thickness of the epitaxial layer formed. Specifically, a high-temperature SEG process is performed to form a lower part of the SiGe epitaxial layer with a thickness of about 23% to 50% of the overall thickness of the same. A low-temperature SEG process is then performed to form an upper part of the SiGe epitaxial layer with a thickness of about 77% to 50% of the overall thickness of the same.
In the above method for forming a SiGe epitaxial layer, a high-temperature SEG process is performed to form the lower part of the same over a substrate, followed by a low-temperature SEG process for forming the upper part of the same. As a result, the selectivity window of the SEG process is increased, and the throughput of the process is also improved. Moreover, the above method of this invention can preserve a good interface for the insulating spacer, while the uniformity of the SiGe layer is maintained lowering the pattern loading effect.
Referring to
In one embodiment, the sidewall of the gate structure 210 is formed with an insulating spacer 215 thereon, which may be a single layer of an insulating material like silicon oxide, or be a multi-layered insulator. In an embodiment, the insulating spacer 25 includes, starting from the sidewall of the gate structure 210, a silicon oxide layer 215a, a silicon nitride layer 215b and a silicon oxide layer 215c, as shown in
Referring to
After forming the gate structure 210, a cavity 220 is formed in the substrate 200 beside the gate structure 205, as shown in
A pre-annealing process is then performed, possibly at about 800° C. for about 120 seconds. A pad layer (not shown) is then formed on the substrate, wherein the pad layer and the substrate 200 can be formed with the same material, for example, silicon. The pad layer is formed through CVD for about 20-30 seconds.
However, the pre-annealing process and the step of forming the pad layer are optional, depending on the requirements of the process.
Referring to
In the high-temperature SEG process, the reactant gas includes at least a Si-containing gas and a Ge-containing gas. In an embodiment, the Si-containing gas may include silane, disilane or dichlorosilane, in a flow rate of about 50-500 sccm, preferably about 80-150 sccm. The Ge-containing gas may include germane, in a flow rate of about 100-300 sccm, preferably about 130-180 sccm.
The reactant gas may further include a hydrogen chloride gas to enhance the uniformity of the epitaxial layer and lower the loading effect, which may have a flow rate of about 50-200 sccm, preferably about 110-150 sccm.
In one embodiment, the Si-containing gas used in the high-temperature SEG process includes dichlorosilane in a flow rate of about 120 sccm. The Ge-containing gas includes germane in a flow rate is about 160 sccm. The flow rate of the hydrogen chloride gas is about 140 sccm. The pressure is about 15 Torr, for example.
Still referring to
The reactant gas used in the low-temperature SEG process includes at least a Si-containing gas and a Ge-containing gas. In some cases, the Si-containing gas includes silane, disilane or dichlorosilane in a flow rate of about 50-500 sccm, preferably about 80-150 sccm. The Ge-containing gas includes germane in a flow rate of about 100-300 sccm, preferably about 130-180 sccm.
The reactant gas may further include a hydrogen chloride gas to enhance the uniformity of the epitaxial layer and lower the loading effect. The flow rate of the hydrogen chloride gas may be about 50-200 sccm, preferably about 110-150 sccm.
In one embodiment, the Si-containing gas is silane in a flow rate of about 136 sccm, and the Ge-containing gas is germane in a flow rate of about 265 sccm. The flow rate of the HCl gas is about 115 sccm. The pressure is about 10 Torr.
The above SEG processes are specified by the thickness of the SiGe sub-layer formed. In another embodiment, the above SEG processes may be specified by the process time. Similar to the first embodiment, the high-temperature SEG consumes about 1% to 20% of the total process time for forming the entire SiGe epitaxial layer, while the low-temperature SEG process consumes about 99% to 80% of the same.
The overall process time for forming the entire SiGe epitaxial layer is related to the predetermined thickness. With the introduction of processes of new generations, the thicknesses of the SiGe epitaxial layer 230 and the sub-layers 230a and 230b each can be varied according to the design and requirements of the device.
Further, it is also noted that the high-temperature SEG process and the low-temperature SEG process can use the same reactant gas or different reactant gases.
After forming the SiGe epitaxial layer 230, the SiGe epitaxial layer 230 can be doped with a P-dopant like boron or indium to form a PMOS transistor. An etch-stop layer 240 may be further formed on the substrate 200, possibly including silicon nitride and formed through CVD, for the subsequent contact opening etching. The etch-stop layer 240 may have a high compressive stress to raise the driving current of the PMOS.
Since the high-temperature SEG process has a larger selectivity window and higher growth rate, the lower SiGe sub-layer 230a is formed rapidly increasing the throughput. Furthermore, the high-temperature SEG process can prevent the interface of the insulation spacer 215 from being damaged.
Moreover, since the upper SiGe sub-layer 230b is formed with low-temperature SEG, the uniformity of the SiGe epitaxial layer 230 is improved reducing the pattern loading effect. Thus, the later processes are controlled more easily improving the yield.
Referring to
In next step (430), a high-pressure SEG process is performed, consuming about 1% to 20%, preferably about 8% to 17%, of the total process time for forming the entire SiGe epitaxial layer.
The high-pressure SEG process may be performed under a pressure of about 10 Torr or higher at about 650° C. The reactant gas used includes at least a Si-containing gas and a Ge-containing gas. The Si-containing gas may include silane, disilane or dichlorosilane in a flow rate of about 50-500 sccm, preferably about 50-150 sccm. The Ge-containing gas may be germane in a flow rate of about 100-300 sccm, preferably about 150-250 sccm.
The reactant gas can also include a hydrogen chloride gas, which may have a flow rate of about 50-200 sccm, preferably about 100-200 sccm.
In next step (440), a low-pressure SEG process is performed, which consumes about 99% to 80%, preferably about 92% to 83%, of the total process time.
The low-pressure SEG process may be performed under a pressure of about 5 Torr or lower at about 650° C. The reactant gas used includes at least a Si-containing gas and a Ge-containing gas. The Si-containing gas may include silane, disilane or dichlorosilane in a flow rate of about 50-500 sccm, preferably about 50-150 sccm. The Ge-containing gas may be germane in a flow rate of about 100-300 sccm, preferably about 150-250 sccm.
The reactant gas used in the low-pressure SEG may also include an HCl gas, which may have a flow rate of about 50-200 sccm, preferably about 100-200 sccm.
In an embodiment, the high-pressure SEG process forms a SiGe epitaxial layer of 100-200 angstroms thick, while the low-pressure one forms a SiGe epitaxial layer of 1000-1100 angstroms thick.
Because the high-pressure SEG process has a large selectivity window and has a lower sensitivity to the quality of the surface for epitaxy, a lower SiGe sub-layer is formed rapidly. In addition, the subsequent low-pressure SEG process can reduce the pattern loading effect and thereby improve the uniformity of the SiGe epitaxial layer.
The cross-sectional view of the SiGe epitaxial layer formed in this embodiment is similar to that shown in
It is also noted that in an embodiment where the substrate surface is clean, a low-pressure SEG process can be directly performed, possibly under a pressure of about 5 Torr or lower, to form a SiGe epitaxial layer. This method can also reduce the pattern loading effect.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of this invention without departing from the scope or spirit of the invention. In view of the foregoing descriptions, it is intended that this invention covers modifications and variations of this invention if they fall within the scope of the following claims and their equivalents.
