The disclosure relates to a method for making a semiconductor substrate, and a method for making a semiconductor device using the semiconductor substrate.
In a manufacturing process of semiconductor devices, a substrate is usually necessary for growing an epitaxial layer, and thus, manufacturing the substrate are particularly important. Generally, the steps of manufacturing a substrate include: crystal growth, cutting, abrasing, annealing, and polishing. The hardness of a substrate is a significant factor affecting the processing quality thereof. At present, most of the substrates used for preparing semiconductor devices are made of a material having a relatively high Mohs hardness. For example, sapphire has a Mohs hardness of 9. Materials with great hardness would cause difficulties during manufacturing of the substrate. For example, cutting and abrasing of the substrate made from a material having great hardness is difficult and time-consuming, and damages to the operating machines might occur, which increases the processing cost of such substrate. In addition, a material having great hardness directly affects the quality of the substrate, e.g., poor substrate quality, which might adversely affect the performance of the resultant semiconductor devices.
Therefore, an object of the disclosure is to provide a method for making a semiconductor substrate and a method for making a semiconductor device that can alleviate at least one of the drawbacks of the prior art.
According to a first aspect of the disclosure, the method for making the semiconductor substrate includes: cutting an ingot to obtain a plurality of substrates, each of the substrates including a first surface and a second surface opposite to the first surface; performing a surface treatment on at least one of the first surface and the second surface of each of the substrates using a surface-treating agent;
annealing the substrates so that the substrates react with the surface-treating agent to obtain annealed substrates, each of the annealed substrates having a base and a modified layer formed by a reaction between a corresponding one of the substrates and the surface-treating agent; and abrasing each of the annealed substrates to remove at least a part of the modified layer.
According to a second aspect of the disclosure, a method for making a semiconductor device, includes: providing a semiconductor substrate which is processed by the steps of: cutting an ingot to obtain a plurality of substrates, each of the substrates including a first surface and a second surface opposite to the first surface, performing a surface treatment on at least one of the first surface and the second surface of each of the substrates using a surface-treating agent, annealing the substrates so that the substrates react with the surface-treating agent to obtain annealed substrates, each of the annealed substrates having a base and a modified layer formed by a reaction between a corresponding one of the substrates and the surface-treating agent, and abrasing each of the annealed substrates to remove at least a part of the modified layer; forming at least one semiconductor layer on the semiconductor substrate; and etching the at least one semiconductor layer.
Other features and advantages of the disclosure will become apparent in the following detailed description of the embodiments with reference to the accompanying drawings, of which:
Before the disclosure is described in greater detail, it should be noted that where considered appropriate, reference numerals or terminal portions of reference numerals have been repeated among the figures to indicate corresponding or analogous elements, which may optionally have similar characteristics.
Referring to
Step S01: cutting an ingot to obtain a plurality of substrates 100, each of the substrates 100 including a first surface 101 and a second surface 102 opposite to the first surface 101;
Step S02: performing a surface treatment on at least one of the first surface 101 and the second surface 102 of each of the substrates 100 using a surface-treating agent 200;
Step S03: annealing the substrates 100 so that the substrates 100 react with the surface-treating agent 200 to obtain annealed substrates 110, each of the annealed substrates 110 having a base 1101 and a modified layer 1102, the modified layer 1102 being formed by the reaction between a corresponding one of the substrates 100 and the surface-treating agent 200 (see
Step S04: abrasing each of the annealed substrates 110 to remove at least a part of the modified layer 1102.
In step S01, the substrates 100 may be any substrate that can be used to make a semiconductor device. For example, the substrates 100 may be made of, but not limited to, glass, elemental semiconductors (e.g., Group IV), compound semiconductors (e.g., Group IV compound semiconductors, III-V compounds, or II-VI compounds), metals, alloys, oxides, nitrides, halides, silicates, carbonates, etc.
In certain embodiments, the substrates 100 may be made of sapphire. A crystal growth procedure for sapphire substrates 100 is disclosed hereinafter. First, aluminum oxide (Al2O3) is placed in a crucible, followed by heating the crucible to a temperature of not less than 2000° C. such that the aluminum oxide in the crucible is in a molten state. Thereafter, the temperature of a molten surface of the aluminum oxide is maintained between 2050° C. and 2060° C. A sapphire seed crystal is placed into the molten aluminum oxide from the molten surface, so that the sapphire seed crystal is in contact with the molten surface. Next, the sapphire seed crystal is slowly pulled so that sapphire crystal is grown to have desired diameter and length. The sapphire crystal is pulled out of the molten aluminum oxide at a constant speed, so that the sapphire crystal grows uniformly and that the diameter thereof remains constant. Then, the sapphire crystal is continuously pulled such that the diameter of an end portion of the sapphire crystal is gradually reduced until the sapphire crystal is completely separated from the molten aluminum oxide. After being separated from the molten aluminum oxide, the sapphire crystal is cooled and a sapphire ingot is thus obtained. The sapphire ingot is then cut using a multi-wire cutting machine to obtain a plurality of sapphire substrates 100.
In step S02, a single-sided surface treatment or a double-sided surface treatment may be adopted for each of the substrates 100. The single-sided surface treatment mainly includes applying the surface-treating agent 200 on one of the first surface 101 and the second surface 102 of each of the substrates 100. The surface-treating agent 200 may include a softening agent and a catalyst. In some embodiments, the surface-treating agent 200 may further include an anti-sticking agent. The softening agent includes at least one of an aluminate, a silicate, a carbonate, a hydroxide, an oxide or a halide, etc. The catalyst includes at least one of a reducing agent, an oxidizing agent, an acid, a base, or an ionic salt. The reducing agent may be, but not limited to, an element or a compound with low valence, such as carbon, silicon, sulfide, metal, iodide, or a ferrous salt. The oxidizing agent may be, but not limited to, a high-valence compound such as potassium permanganate, dichromate, chlorate, nitrate, a ferric salt, or a cupric salt. The anti-sticking agent may include e.g., an oxide, or the like. The oxide of the anti-sticking agent may have a melting point greater than that of the oxide of the softening agent. In certain embodiments, the melting point of the oxide of the anti-sticking agent may be greater than about 2000° C., and the melting point of the oxide of the softening agent may be less than about 1000° C. The softening agent, the catalyst and the optional anti-sticking agent are uniformly mixed to obtain the surface-treating agent 200. The thickness of the surface-treating agent 200 applied on each of the substrates 100 may be determined according to the annealing parameters and the desired removal rate in subsequent abrasing and polishing steps.
In some embodiments, the step S02 of performing the surface treatment includes applying the surface-treating agent 200 on the at least one of the first surface 101 and the second surface 102 of each of the substrates 100. After applying the surface-treating agent 200, the substrates 100 are heated and then stacked.
To be specific, after the surface-treating agent 200 is applied on the substrates 100, the substrates are heated (e.g., baked). In some embodiments, the substrates 100 are heated at a temperature ranging from 100° C. to 200° C. for a time period not greater than 2 hours. During this heating step, the surface-treating agent 200 is partially dried so as to be closely attached to the substrates 100, which facilitates reaction of the surface-treating agent 200 with the substrates 100 in the subsequent step. In the heating step, the surface-treating agent 200 only slightly reacts with or does not react with the substrates 100.
After the heating step, the substrates 100 are stacked to obtain a laminate structure (as shown in
After obtaining the laminate structure, the step S03 of annealing the substrates 100 is performed. In this embodiment, the step S03 of annealing the substrates includes: placing the laminate structure of the substrates 100 subjected to the surface treatment into a heating furnace; and annealing the substrates so as to obtain the annealed substrates 110. In some embodiments, the annealing temperature ranges from 30° C. to 3000° C., and the annealing time ranges from about 0.1 hour to about 30 days.
In some embodiments, annealing the substrates 100 mainly includes a heating stage, a holding stage, and a cooling stage. In the heating stage, the heating furnace is heated to a temperature ranging from 100° C. to 2000° C. at a heating rate of 0.5° C./min to 200° C./min. In the holding stage, the temperature of the heating furnace is maintained between 100° C. and 2000° C. for 0.1 hour to 500 hours. In the cooling stage, the heating furnace is cooled to room temperature at a cooling rate ranging between 0.5° C./min and 200° C./min. In this embodiment, the heating furnace is heated to a temperature that ranges between 1300° C. and 1800° C. at a heating rate of 1° C./min to 20° C./min, is maintained at a temperature between 1300° C. and 1800° C. for 1 to 100 hours, and is then cooled to room temperature at the cooling rate of 1° C./min to 20° C./min.
During the aforementioned holding stage, the surface-treating agent 200 reacts with the substrates 100. In some embodiments, when the softening agent of the surface-treating agent 200 is calcium carbonate (CaCO3), the softening agent (CaCO3) undergoes a decomposition reaction (CaCO3→CaO+CO2) during the holding stage. The reaction product, CaO, has high reactivity and is likely to react with the substrates 100 under high temperature. In some embodiments, when the substrates 100 are sapphire substrates, the following reaction occurs during the holding stage: CaO+Al2O3→xCaO.yAl2O3. In this reaction, x and y are both greater than zero, and different combinations of x and y values represent different reaction products. Under the high temperature of the holding stage, multiple reaction products may be obtained.
During step S03, the softening agent in the surface-treating agent 200 reacts with the substrates 100 at the first surfaces 101 and/or the second surfaces 102 of the substrates 100 in the presence of the catalyst so as to form a modified layer 1102 (see
Compared to the untreated sapphire substrates, the modified layer 1102 containing the aforementioned reaction products has a Mohs hardness of about 6 to 7, which is relatively low. In addition, as shown in
After annealing the substrates 100, each of the annealed substrates 110 undergoes an abrasing step (step S4). In order to verify the importance of the surface treatment and annealing steps in improving the removal rate of the annealed substrates 110, the annealed substrates 110 and untreated substrates (i.e., control group not subjected to the surface treatment and annealing steps) were abrased using the same parameters. The results are shown in
In this embodiment, after the abrasing step, the method for making the semiconductor substrate of the present disclosure further includes: cleaning each of the annealed substrates 110 to remove impurities remaining on the surface of each of the annealed substrates 110 and polishing each of the annealed substrates 110 after cleaning.
The removal rates of the two groups of substrates (i.e., the annealed substrates 110 and the untreated substrates) at different times during the polishing step and the total removal rates of the two groups of substrates after polishing are shown in
It should be noted that, the step of abrasing the annealed substrates 110 may be conducted to partly remove the modified layer 1102 from each of the annealed substrates 110 so as to leave a portion of the modified layer 1102 on the base 1101 of each of the annealed substrates 110. Similarly, polishing the annealed substrates 110 may be conducted to partly remove the modified layer 1102 from each of the annealed substrates 110 so as to leave a portion of the modified layer 1102 on the base 1101 of each of the annealed substrates 110.
The results in
In some embodiments, as shown in
A method for making a semiconductor device using the annealed substrates 110 is disclosed hereinafter. As shown in
Step S001: providing the aforesaid annealed substrate 110;
Step S002: forming at least one semiconductor layer on the annealed substrate 110; and
Step S003: etching the at least one semiconductor layer.
As disclosed in the embodiments above, the annealed substrate 110 of the present disclosure has been subjected to the surface treatment step, the annealing step, and the abrasing step. In some embodiments, the annealed substrate 110 of the present disclosure may be the one further subjected to cleaning and polishing steps after the abrasing step.
The material of the annealed substrate 110 is described above. In this embodiment, the substrate 100 is a sapphire substrate. In step S002, forming the at least one semiconductor layer includes the sub-steps of: first, forming a first semiconductor layer on the annealed substrate 110, and then forming an active layer on the first semiconductor layer, followed by forming a second semiconductor layer on the active layer. The second semiconductor layer has a conductivity opposite to that of the first semiconductor layer. In addition, in some embodiments, formation of the at least one semiconductor layer further includes forming a first electrode and a second electrode that are electrically connected to the first semiconductor layer and the second semiconductor layer, respectively.
In certain embodiments, the first semiconductor layer may be an N-type semiconductor layer, and the second semiconductor layer may be a P-type semiconductor layer. In certain embodiments, the first semiconductor layer may be a P-type semiconductor layer, and the second semiconductor layer may be an N-type semiconductor layer. The active layer may be a multiple quantum well. In certain embodiments, the at least one semiconductor layer may be etched so as to form a semiconductor light-emitting structure.
In the method for making the semiconductor device and the method for making the semiconductor substrate of the present disclosure, after the substrates 100 are cut from the ingot, the substrates 100 are subjected to surface treatment and annealing. The surface-treating agent 200 may include the softening agent and the catalyst. In some embodiments, the surface-treating agent further includes the anti-sticking agent. During annealing, in the presence of the catalyst, the softening agent in the surface-treating agent 200 reacts with the substrates 100 to form the modified layer 1102. The loose structure of the modified layer 1102 reduces the strength/hardness of the annealed substrate 110 so as to significantly improve abrasing and polishing efficiency, and to reduce the processing difficulty of the annealed substrates 110. Taking the sapphire substrate as an example, after performing the abovementioned surface treatment and annealing, the total removal rate thereof in the abrasing step can reach 6.20 μm/min, and the total removal rate in the polishing step can reach 15.67 μm/hr. The improved removal rates is conducive to improving production efficiency and reducing costs.
In addition, by adjusting the temperature and time in the annealing step, the degree of reaction between the surface-treating agent 200 and the substrates 100 can be controlled so as to control the thickness of the modified layer 1102.
Moreover, as mentioned above, the modified layer 1102 may not be completely removed and can remain on the base layer 1101 of the annealed substrate 110 to adjust the lattice structure of the annealed substrates 110 and the thermal stress in epitaxial growth, so as to reduce lattice mismatch and thermal mismatch. At the same time, by selecting a suitable surface-treating agent 200, the modified layer 1102 may have properties similar to those of the epitaxial layer.
In the description above, for the purposes of explanation, numerous specific details have been set forth in order to provide a thorough understanding of the embodiments. It will be apparent, however, to one skilled in the art, that one or more other embodiments may be practiced without some of these specific details. It should also be appreciated that reference throughout this specification to “one embodiment,” “an embodiment,” an embodiment with an indication of an ordinal number and so forth means that a particular feature, structure, or characteristic may be included in the practice of the disclosure. It should be further appreciated that in the description, various features are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of various inventive aspects, and that one or more features or specific details from one embodiment may be practiced together with one or more features or specific details from another embodiment, where appropriate, in the practice of the disclosure.
While the disclosure has been described in connection with what are considered the exemplary embodiments, it is understood that this disclosure is not limited to the disclosed embodiments but is intended to cover various arrangements included within the spirit and scope of the broadest interpretation so as to encompass all such modifications and equivalent arrangements.
Number | Date | Country | Kind |
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202010547979.X | Jun 2020 | CN | national |
This application is a bypass continuation-in-part (CIP) application of PCT International Application No. PCT/CN2020/101293, filed on Jul. 10, 2020, which claims priority of Chinese Invention Patent Application No. 202010547979.X, filed on Jun. 16, 2020. The entire content of the international patent application is incorporated herein by reference.
Number | Date | Country | |
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Parent | PCT/CN2020/101293 | Jul 2020 | US |
Child | 17494191 | US |