Claims
- 1. A process for packaging a chip mounted on a circuit substrate with a resin material which avoids the formation of resin burrs on the chip comprising the steps of:
- retaining the circuit substrate on a major surface of a one-piece cavity block so that the chip is disposed in a recessed portion formed in the major surface, and surrounded by a continuous wall of said cavity, the cavity block having formed in a surface opposite the major surface a tapered groove communicating with the bottom of the recessed portion said groove having tapered side walls which widen towards the bottom of said recessed portion;
- pressing the circuit substrate against the major surface of the cavity block;
- injecting a melted resin material into the recessed portion formed in the cavity block through the groove to package the chip said resin being contained within said continuous wall inhibiting the formation of burrs on said chip package wherein said resin material hardens forming said chip package and said tapered groove facilitating removal of hardened resin,
- removing the hardened resin out of the groove for separation from said chip package; and
- removing said chip package out of the recessed portion.
- 2. The process for packaging a chip according to claim 1, wherein said step of retaining the chip and circuit substrate in a recess portion of a cavity block includes positioning said chip and substrate between an upper die-member and a lower die-member which supports said cavity block; and said step of pressing includes applying a clamping force between said upper and lower die-members.
- 3. The process for packaging a chip according to claim 2, further comprising separating said upper and lower dies following hardening of said resin material; and forcing said chip and substrate away from said cavity block.
Priority Claims (1)
Number |
Date |
Country |
Kind |
5-324628 |
Dec 1993 |
JPX |
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Parent Case Info
This application is a contination of U.S. patent application Ser. No. 08/360,052, filed Dec. 20, 1994, now abandoned.
US Referenced Citations (7)
Foreign Referenced Citations (5)
Number |
Date |
Country |
59-95194 |
Jun 1984 |
JPX |
60-110488 |
Jun 1985 |
JPX |
61-46049 |
Oct 1986 |
JPX |
62-197183 |
Aug 1987 |
JPX |
63-77758 |
Apr 1988 |
JPX |
Continuations (1)
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Number |
Date |
Country |
Parent |
360052 |
Dec 1994 |
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