"Isolation Technology for Scaled MOS VLSI", by W. G. Oldham, IEDM 82; CH1832-5/82/0000-02161; 1982 IEEE; pp. 216-219. |
"The Swami--A Defect Free and Near--Zero Bird's--Beak Local Oxidation Process and its Application in VLSI Technology", by K. Y. Chiu, R. Fang, J. Lin; J. L. Moll, C. Lage, S. Angelos, and R. Tillman; IEDM 82; CH1832-5/82/0000-0224; 1982 IEEE: 224-227. |
"Scaling Limitations of Submicron Local Oxidation Technology", by John Jui, Paul Vande Voorde, and John Moll, IEDM 85; CH2252-5/85/0000-0392; 1985 IEEE. |
"Electrical Properties of MOS Devices Made With Silo Technology", by J. Hui, T. U. Chiu, S. Wong, and W. G. Oldham; IEDM 82; CH1832-5/82/0000-0220; 1982 IEEE. |
"Trench Isolation Prospects for Application in CMOS VLSI", by R. D. Rung; IEDM 84; CH2099-0/84/0000-0574; 1984 IEDM; pp. 574-577. |
"CMOS Technology Using SEG Isolation Technique", by N. Endo, N. Kasai, A. Ishitani, and Y. Kurogi; IEDM 83; CH1973-7/83/0000-0031; 1983 IEEE; pp. 31-34. |