Claims
- 1. A method of moving wafer cassettes in an integrated-circuit factory comprising:
determining a target tool for a wafer cassette; determining whether an older cassette having been waiting for positioning in the target tool exists; if the older cassette doesn't exist, then moving the wafer cassette into the target tool; if the older cassette does exist, postponing the movement of the wafer cassette into the target tool.
- 2. The method of claim 1 wherein the older cassette has a higher priority than the wafer cassette.
- 3. A method of detecting deadlocks in an integrated-circuit factory comprising:
a) initialize a variable to a first location in a semiconductor wafer processing system; b) determining a successor location to the first location; c) determining if the successor location for a wafer cassette is empty or is a stocker, then a deadlock is not detected; if the successor location for a cassette is not empty or a stocker and the successor location is a location already identified in a schedule, then identify the existence of a circular wait; d) save the location in a schedule; e) equate the first location equal the successor location; f) repeat steps b), c), d), e) and f) until all successor locations are found.
- 4. A method of moving wafer cassettes in an integrated-circuit factory comprising a plurality of possible cassette placement locations comprising:
generating a bid from at least one cassette placement location in a plurality of cassette placement locations, where each bid contains a request for a wafer cassette; transmitting the bids to a central computer; comparing bids from a plurality of cassette placement locations; assigning wafer cassettes to cassette placement locations in response to said bid comparison; and moving the wafer cassettes to the cassette placement locations in accordance with the assignments.
- 5. The method of claim 4 wherein said cassette placement locations are tools for processing wafers.
- 6. The method of claim 4 wherein said cassette placement locations are stockers for storing wafer cassettes.
- 7. The method of claim 4 wherein said cassette placement locations are tools for processing wafers and stockers for storing wafer cassettes.
- 8. The method of claim 5 wherein said bid comprises one or more parameters selected from the following parameters: a maintenance schedule for a tool, a capacity for a tool, a backlog for a tool, a cassette priority for at least one cassette being processed in the tool, and a processing completion time for a cassette in the tool.
- 9. The method of claim 4 wherein the bids are periodically transmitted to the computer as status messages without containing a specific request for a wafer cassette and the computer assigns cassettes in response to information contained in the status messages.
- 10. The method of claim 9 wherein the cassette placement locations are tools for processing wafers and the status messages comprise one or more parameters selected from the following parameters: process times, tool configuration, tool throughput, tool availability, tool stage number, load values, and idle information.
- 11. A method for providing stocker overflow protection in an integrated-circuit factory comprising:
sending a transfer request from a first stocker to a second stocker, where said transfer request comprises a window size defining a number of wafer cassettes that the first stocker desires to send to the second stocker; comparing the window size to the available space in the second stocker; if the window size is greater than the available space in second stocker, rejecting the transfer request; and if the window size is less than or equal to the available space in the second stocker, accepting the transfer request and transferring said number of wafer cassettes from the first stocker to the second stocker.
- 12. The method of claim 11 further comprising updating a status database in said first stocker and second stocker to reflect the transfer of the number of wafer cassettes.
Parent Case Info
[0001] This application is a divisional of co-pending U.S. patent application Ser. No. 09/893,037, filed Jun. 26, 2001, which is incorporated herein by reference.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09893037 |
Jun 2001 |
US |
Child |
10424330 |
Jan 2004 |
US |