Patent Application
20110097904
1. Field of the Invention
The invention relates to a method of obtaining a structure on a semiconductor wafer by etching through a low-k silicon based organic dielectric layer.
2. Description of the Related Art
In semiconductor plasma etching applications, a plasma etcher is usually used to transfer an organic mask pattern, such as a photoresist mask pattern, into a circuit and line pattern of a desired thin film and/or filmstack (conductors or dielectric insulators) on a Si wafer. This is achieved by etching away the films (and filmstacks) underneath the photoresist materials in the opened areas of the mask pattern. This etching reaction is initiated by the chemically active species and electrically charged particles (ions) generated by exciting an electric discharge in a reactant mixture contained in a vacuum enclosure, also referred to as a reactor chamber. Additionally, the ions are also accelerated towards the wafer materials through an electric field created between the gas mixture and the wafer materials, generating a directional removal of the etching materials along the direction of the ion trajectory in a manner referred to as anisotropic etching. At the finish of the etching sequence, the masking materials are removed by stripping it away, leaving in its place a replica of the lateral pattern of the original intended mask patterns.
To achieve the foregoing and in accordance with the purpose of the present invention, a method for repairing damage to a silicon based low-k dielectric layer with organic compounds, where damage replaces a methyl attached to silicon with a hydroxyl attached to silicon is provided. A repair gas comprising CH4 gas is provided. The repair gas is formed into a plasma, while maintaining a pressure below 50 mTorr. Hydroxyl attached to silicon is replaced with methyl from the plasma formed by the repair gas.
In another manifestation of the invention, a method for forming features in a silicon based low-k dielectric layer with organic compounds over a wafer is provided. The wafer is placed in a plasma etch chamber. The wafer is chucked to a wafer support. Features are etched into the silicon based low-k dielectric layer with organic compounds. Damage to a silicon based low-k dielectric layer with organic compounds is repaired by providing a repair gas comprising CH4 gas and forming the repair gas into a plasma, while maintaining a pressure below 50 mTorr. Hydroxyl attached to silicon is replaced with methyl from the plasma formed by the repair gas. The wafer is only dechucked after the repairing is completed.
In another manifestation of the invention, an apparatus for forming features in a silicon based low-k dielectric layer with organic compounds over a wafer and under a mask is provided. A plasma processing chamber comprising a chamber wall forming a plasma processing chamber enclosure, a substrate support for supporting a wafer within the plasma processing chamber enclosure, a pressure regulator for regulating the pressure in the plasma processing chamber enclosure, at least one electrode for providing power to the plasma processing chamber enclosure for sustaining a plasma, a gas inlet for providing gas into the plasma processing chamber enclosure, and a gas outlet for exhausting gas from the plasma processing chamber enclosure is provided. A gas source is in fluid connection with the gas inlet and comprises a CH4 containing gas source, an etching gas source, and a stripping gas source. A controller is controllably connected to the gas source and the at least one electrode and comprises at least one processor and computer readable media. The computer readable media comprises computer readable code for chucking the wafer to the substrate support; computer readable media for etching features into the silicon based low-k dielectric layer with organic compounds, computer readable code for stripping the mask, computer readable code repairing damage to a silicon based low-k dielectric layer with organic compounds, comprising computer readable code for providing a repair gas comprising CH4 gas from the CH4 containing gas source and computer readable code for forming the repair gas into a plasma, while maintaining a pressure below 50 mTorr, and computer readable code for replacing hydroxyl attached to silicon with methyl from the plasma formed by the repair gas, and computer readable code for dechucking the wafer, only after repairing damage.
These and other features of the present invention will be described in more details below in the detailed description of the invention and in conjunction with the following figures.
The present invention is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
The present invention will now be described in detail with reference to a few preferred embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present invention.
As dimensions of integrated circuit devices continue to decrease, propagation delay must be decreased, which may be done by lowering the capacitance of surrounding dielectric material. In the specification and claims, a low-k material is defined as having a dielectric constant k<3.0. Such low-k dielectric materials may be silicon based, such as silicon oxide, with organic compounds, to lower the dielectric constant, such as organosilicate glass (OSG). For silicon based low-k dielectric materials, such material may be formed to be an ultra low-k (k<2.8) by forming nanopores in the low-k dielectric material, which is referred to as nanoporous ultra low-k dielectric material.
In semiconductor via first trench last (VFTL) dual damascene (DD) processing, silicon oxide based low dielectric constant (low-k) materials with added organic components to provide a lower dielectric constant are exposed to various reactants during etch and resist strip process. The exposed low-k dielectric materials are often damaged by etch/strip plasmas and chemicals. In general, low-k damage includes changes in material composition (e.g., carbon depletion), morphology (density or porosity), and/or surface property (e.g., hydrophobic to hydrophilic). The damaged layer no longer possesses the intended dielectric properties, and can lead to device yield loss and/or reliability failures. Therefore, reducing damage during low-k dielectric etch/strip has become one of the most critical challenges in semiconductor processing. Unlike the pristine (undamaged) low-k materials, the damaged layer can be readily removed by dilute HF solution. It is a common practice to quantify low-k material damage after etch and strip by measuring the material loss after dipping the sample in dilute HF solution. For nanoporous ultra low-k dielectric material, such damage may be increased because the pores provide an increased surface area over which the damage may occur and they may lead to enhanced diffusion of damaging radicals within the dielectric film.
Efforts have been made to reduce damage during low-k dielectric etch and strip processes. The prior art methods of the optimization of etch and strip processes by optimizing process chemistry, hardware configuration, and/or plasma sources (e.g. RF vs. microwave) etc. have resulted in only limited success. As the dielectric constant (k value) continues to reduce, and the material becomes more porous, and the critical dimension becomes smaller, damage becomes a more severe issue in the most advanced integrated circuit processing.
The substrate 210 is placed in a processing tool (step 108).
In this embodiment, the substrate 210 is placed in the transport module 312 of the processing tool 300, where a vacuum is created. The transport module 312 moves the substrate 210 into an etcher 308. In the etcher 308, an etch is performed to form features into the low-k dielectric layer (step 112). In this embodiment, the organic mask is then stripped (step 116).
The transport module 312 then moves the substrate 210 to the repair chamber 304. Preferably, a single plasma processing chamber with a single electrostatic chuck holds the substrate 210 during the etching, stripping and repairing, which are done in the single plasma processing chamber.
In the repair chamber 304, a CH4 containing repair gas is provided (step 120). Preferably, the CH4 containing gas is at least 5% CH4 by molar flow rate with the balance being an inert gas such as N2 or Ar. More preferably, the repair gas is at least 50% CH4 by molar flow. Most preferably, the repair gas consists essentially of CH4. The CH4 containing repair gas is formed into a low pressure plasma (step 124). Preferably, the low pressure plasma is maintained at a pressure of less than 50 mTorr. Preferably the plasma is formed with a bias voltage of between 0 V and −100V. Preferably, the plasma is maintained sufficiently long enough to provide a repair layer with a thickness of less than 5 Å. The substrate may then be removed from the processing tool 300 (step 128).
A more specific example of an embodiment of the invention provides a substrate 210 where the low-k dielectric layer 208 is a nanoporous organosilicate glass. The organic mask 204 is a multi-layer photoresist mask comprising 193 nm photoresist, an organic antireflective coating, and an organic planarization layer (step 104).
The substrate 210 is placed in a the processing tool 300 (step 108). In this example, the substrate 210 is placed in the transport module 312 of the processing tool 300. The transport module 312 moves the substrate 210 to an etcher 308. In this example features 212 (
In this example, the transport module 312 moves the substrate 210 to the repair chamber 304.
CPU 522 may be also coupled to a variety of input/output devices, such as display 504, keyboard 510, mouse 512, and speakers 530. In general, an input/output device may be any of: video displays, track balls, mice, keyboards, microphones, touch-sensitive displays, transducer card readers, magnetic or paper tape readers, tablets, styluses, voice or handwriting recognizers, biometrics readers, or other computers. CPU 522 optionally may be coupled to another computer or telecommunications network using network interface 540. With such a network interface, it is contemplated that the CPU might receive information from the network, or might output information to the network in the course of performing the above-described method steps. Furthermore, method embodiments of the present invention may execute solely upon CPU 522 or may execute over a network such as the Internet in conjunction with a remote CPU that shares a portion of the processing.
In addition, embodiments of the present invention further relate to computer storage products with a computer-readable medium that have computer code thereon for performing various computer-implemented operations. The media and computer code may be those specially designed and constructed for the purposes of the present invention, or they may be of the kind well known and available to those having skill in the computer software arts. Examples of tangible computer-readable media include, but are not limited to: magnetic media such as hard disks, floppy disks, and magnetic tape; optical media such as CD-ROMs and holographic devices; magneto-optical media such as floptical disks; and hardware devices that are specially configured to store and execute program code, such as application-specific integrated circuits (ASICs), programmable logic devices (PLDs) and ROM and RAM devices. Examples of computer code include machine code, such as produced by a compiler, and files containing higher level code that are executed by a computer using an interpreter. Computer readable media may also be computer code transmitted by a computer data signal embodied in a carrier wave and representing a sequence of instructions that are executable by a processor.
In this example, a plasma is generated by supplying RF power of 50 watts at 60 MHz to a gas flow of 100 sccm of CH4 at a pressure of 50 mTorr for 15 seconds. The wafer temperature is maintained at 20 C. Preferably, the RF power frequency of at least 27 MHz has a power between 5 to 50 watts.
The transport module 312 moves the substrate 210 from the repair chamber 304 out of the processing tool 300 (step 128).
In another preferred embodiment, a single plasma processing chamber, such as the processing chamber 400 may be used for etching, stripping, and repair, wherein the substrate 210 is electrostatically bound to the lower electrode 408 during the etching, stripping, and repair.
In an embodiment of the invention, a plasma tuning may be provided after the repair process and before the substrate is removed from the processing tool. Such tuning is described in U.S. Pat. Application No. ______, entitled METHOD FOR TUNABLY REPAIRING LOW-K DIELECTRIC DAMAGE, by Stephen Sirard et al., filed on the same date as the present application, with Attorney Docket Number LAM1P291/P1972, and incorporated by reference for all purposes.
An advantage of the inventive process is that the inventive process provides a cleaner deposition. Other polymer ingredients are believed to provide too much polymerization. It is also believed that the low bias reduces faceting.
In an experiment comparing damage without the inventive process with damage using the inventive process using an above recipe on a 55 nm half pitch trench structures, the following results were found: The etched features without the inventive CH4 recovery process was found to have 7 nm of physical sidewall damage after a 45 second 100:1 HF dip, where etched features with the inventive CH4 recovery process was found to have less than 3 nm of physical sidewall damage after a 45 second 100:1 HF dip. Normalized line-to-line capacitance for features without the inventive CH4 recover was found to be 1, wherein the normalized line-to-line capacitance for features with the inventive CH4 recover was found to be 0.9. Therefore, it can be seen that the CH4 recovery reduces the physical sidewall damage.
In another experiment, analysis was performed on an ultra low-k dielectric layer (ULK) before damage was done on the ULK, after damage was done on the ULK, and after the inventive repair was performed on the damaged ULK.
While this invention has been described in terms of several preferred embodiments, there are alterations, permutations, and substitute equivalents, which fall within the scope of this invention. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present invention. It is therefore intended that the following appended claims be interpreted as including all such alterations, permutations, and substitute equivalents as fall within the true spirit and scope of the present invention.
