Patent Application
20200321228
The present technology relates to a technology of a lead frame used in an electronic apparatus such as an electronic component or an electronic circuit.
A lead frame used in a QFN (Quad flat non-leaded) type package (electronic apparatus) is disclosed in Patent Literature 1. The electronic apparatus includes a lead frame including a plurality of lead terminals and an island (die pad) made of a different material or having different thickness from the lead frame. In addition, before a process of sealing with resin, a tape member is attached to the bottom surface (rear surface) of the lead frame, and the lead frame and the island are fixed in a single body via the tape member (described in paragraphs [0036] and [0047] of the specification).
A technology of forming a lead frame including terminals by the photolithography and etching technology is disclosed in Patent Literature 2. For example, half-etching is performed as etching. As a result, the density of terminals may be increased. Specifically, terminals are formed in a plurality of rows in a diameter direction such that the terminals surround a semiconductor element arranged on the center (refer to paragraphs [0020] and [0022] of the specification).
Patent Literature 1: Japanese Patent No. 4311294
Patent Literature 2: Japanese Patent Application Laid-open No. 2013-62549
In the technology of the above-mentioned Patent Literature 1, lead terminals are arranged in one outer circular row. Thus, as the number of the lead terminals increases, the package size is increased. When the package size is increased, the reliability of mounting on a board of the electronic apparatus becomes lower.
In the technology of the above-mentioned Patent Literature 2, a complex manufacturing process of photolithography and etching is needed. In addition, the number of processes and cost increase.
It is an object of the present disclosure to provide a method of manufacturing a lead frame capable of forming connection terminals in a plurality of rows around a circuit chip without requiring a complex manufacturing process and many processes.
In addition, it is an object of the present disclosure to provide a thinner electronic apparatus using a lead frame.
In order to attain the above-mentioned objects, a method of manufacturing a lead frame according to an embodiment includes attaching a tape member to a lead frame member including at least a lead frame rim.
A lead frame part including at least one of a die pad or a connection terminal is mounted on the tape member in the lead frame rim.
In other words, the process of attaching the tape member to the lead frame member is separated from the process of attaching the lead frame part to the tape member. Due to this, a connection terminal may be arranged in a plurality of rows without requiring a complex manufacturing process and many processes.
The method of manufacturing a lead frame may further include forming the lead frame part by at least die-cutting a metal plate before the step of mounting the lead frame part on the tape member.
The step of forming the lead frame part may include forming a recess part on the metal plate by stamping. The die-cutting may be performed after forming the recess part so that the lead frame part includes the recess part.
The lead frame part may have a specific shape such as the recess part, and a lead frame high-resistant to heat process may be realized.
The lead frame member may include the die pad and a first connection terminal group provided around the die pad. The step of mounting the lead frame part on the tape member may include mounting a second connection terminal group on the tape member so that the second connection terminal group is arranged between the die pad and the first connection terminal group.
As a result, the lead frame including the connection terminals in a plurality of rows is manufactured.
The lead frame member may include a first connection terminal group provided around the die pad.
The step of mounting the lead frame part on the tape member may include mounting the die pad on a first position of the tape member and mounting a second connection terminal group on a second position of the tape member, the second position being around the first position and inside the first connection terminal group.
A method of manufacturing an electronic apparatus according to an embodiment includes attaching a tape member to a lead frame member including at least a lead frame rim.
A lead frame part including a die pad and a connection terminal is mounted on the tape member in the lead frame rim.
A circuit chip is mounted on the die pad.
The circuit chip is connected to the connection terminal by a wire.
The circuit chip and the wire are sealed with resin.
The lead frame member may include the die pad, and a connection terminal group provided around the die pad. The method of manufacturing an electronic apparatus may further include mounting an electronic element component between the die pad and the connection terminal group.
The lead frame member may include a connection terminal group provided around the die pad. The method of manufacturing an electronic apparatus may further include mounting the die pad on a first position of the tape member and mounting an electronic element component on a second position of the tape member, the second position being around the first position and inside the first connection terminal group.
In the present technology, mounting an electronic element component on the second position of the connection terminal groups in a plurality of rows may allow a miniaturized electronic apparatus to be manufactured.
An electronic apparatus according to an embodiment includes a die pad, connection terminal groups, a circuit chip, wires, and resin.
The die pad includes a bottom surface.
The connection terminal groups respectively include bottom surfaces, the bottom surfaces being arranged on a plane same as a reference plane, the reference plane including the bottom surface of the die pad, the connection terminal groups being arranged in a plurality of rows around the die pad.
The circuit chip is provided on the die pad.
The wires connect the circuit chip to a plurality of predetermined connection terminals of the connection terminal groups respectively.
The resin includes a bottom surface arranged on the reference plane and seals the circuit chip and the wires.
Since the respective bottom surfaces of the elements are arranged on the same reference plane, an electronic apparatus including connection terminals in a plurality of rows may be made thinner.
The plurality of circuit chips may be provided in a layered state. A first circuit chip of the plurality of circuit chips and a connection terminal group in a first row of the connection terminal groups may be connected respectively by the wires. A second circuit chip of the plurality of circuit chips and a connection terminal group in a second row of the connection terminal groups may be connected respectively by the wires, height of the connection terminal group in the second row being different from height of the connection terminals in the first row.
The respective components of the electronic apparatus are arranged in a dense state since the circuit chips have a layered state and the connection terminals have a plurality of rows, and miniaturization of the electronic apparatus may be realized.
As described above, according to the method of manufacturing of the present technology, it is possible to form connection terminals in a plurality of rows around a circuit chip without requiring a complex manufacturing process and many processes.
According to an electronic apparatus of the present technology, the electronic apparatus including connection terminals arranged in a plurality of rows around a die pad can be made thinner.
Note that the effects described above are not limitative, but any effect described in the present disclosure may be produced.
Hereinafter, embodiments according to the present technology will be described with reference to the drawings.
1. 1) Configuration of Electronic Apparatus
The electronic apparatus 1 is a QFN (Quad flat non-leaded) packaged apparatus, which is a single-sided mold type package manufactured by using a lead frame described below.
The electronic apparatus 1 has a die pad (also called island) 15, a connection terminal group 10 arranged around the die pad 15 in a plurality of rows, and hanging parts 17. As described below, the die pad 15, the connection terminal group 10, and the hanging parts 17 are structured as a part of a lead frame member 20 in a process of manufacturing the electronic apparatus 1.
The connection terminal group 10 includes, for example, an outer-circular-row connection terminal group 11 (first connection terminal group), and an inner-circular-row connection terminal group 12 (second connection terminal group) provided between the outer peripheral rows and the die pad 15. The outer-circular-row connection terminal group 11 includes a plurality of connection terminals 11a. The inner-circular-row connection terminal group 12 includes a plurality of connection terminals 12a.
In addition, the electronic apparatus 1 includes a circuit chip 30 mounted via die bond 31 on the die pad 15 and wires (bonding wires) 33 connecting the circuit chip 30 to a plurality of predetermined connection terminals of the connection terminal group 10 respectively. In the present embodiment, all of the connection terminals 11a and the connection terminals 12a are connected to the circuit chip 30 by the wires 33. At least one of the connection terminals 11a or the connection terminals 12a may not be connected to the circuit chip 30.
Copper, copper alloy, 42Alloy, or the like is used as a material of the lead frame member 20 including the die pad 15, the connection terminals 11a, and the connection terminals 12a. Gold, copper, silver, or the like is used as a material of the wires 33.
The circuit chip 30 and the wires 33 are sealed by sealing resin 35. Note that the sealing resin 35 is not shown in
Here, in the method of manufacturing a semiconductor apparatus described in Patent Literature 2, not only the upper surface side of the lead frame but also the under surface (bottom surface) side are half-etched as mentioned above. The upper side of the lead frame is sealed with resin, but the bottom surface side is exposed from sealing resin so that a conductor is protruded.
On the other hand, in the present embodiment, the bottom surface 15b of the die pad 15, the bottom surfaces 11b and 12b of the connection terminal group 10, and the bottom surfaces 35b of the sealing resin 35 are arranged on the same plane (reference plane) substantially. Thus, the whole thickness of the electronic apparatus may be made smaller than that of the semiconductor apparatus of Patent Literature 2. In other words, the electronic apparatus 1 including the connection terminal group 10 arranged in a plurality of rows around the die pad 15 may be made thinner.
1. 2) Method of Manufacturing Electronic Apparatus
As shown in
As shown in
Chip-mounting machines, which mount and tile minimum IC chips or parts of several hundreds of μm such as WL-CSP (Wafer level Chip Size Package) rapidly on substrates with accuracy down to units of several μm, and manufacture pseudo wafers, have appeared in recent years. The machines are manufactured by JUKI Corporation (the former Sony Corporation), Yamaha Motor Co., Ltd., or the like. For example, a mount machine having a rotary head (mount head including a plurality of absorption nozzles arranged in circular shape) can mount the inner-circular-row connection terminal group 12 on the tape member 28 rapidly.
In the process of
As shown in
As shown in
As shown in
As shown in
As described above, in the present embodiment, the process of attaching the tape member 28 to the lead frame member 20 is separated from the process of attaching the lead frame part to the tape member 28. Thus, the manufacturing method according to the present embodiment does not require complex and costly manufacturing processes such as photolithography or half-etching of Patent Literature 2. Besides, the inner-circular-row connection terminal group 12 and the outer-circular-row connection terminal group 11 can be formed in fewer processes. That is, the connection terminal group 10 can be arranged in a plurality of rows. Thus, cost reduction may be attained.
In addition, a mounting machine can mount connection terminals, and the degree of freedom to which the connection terminals are arranged improves. Thus, the inner-circular-row connection terminal group 12 may not be arranged in a straight line but, for example, staggered (for example, in a zigzag line).
1. 3) Method of Manufacturing Lead Frame Part
1. 3. 1) Method of Manufacturing Example 1
Thus, according to the present embodiment, more lead frame parts may be manufactured by die-cutting more cheaply than the manufacturing method of Patent Literature 2 in which a lead frame is manufactured by half-etching.
1. 3. 2) Method of Manufacturing Example 2
After forming the recess parts 26, the plurality of connection terminals 12a having the recess parts 26 are formed by the die-cutting with the metal mold punch 51 and the metal mold die 52.
The connection terminal 12a has the recess part 26, and solder enters into the recess part 26 when the connection terminal 12a is mounted by soldering. This alleviates stress by heat cycle or the like in the manufacturing processes and improves mounting certainty and reliability. Specifically, when surface to be soldered is flat, crack could be formed on the connecting solder due to the stress by the heat cycle. However, the recess part 26 may reduce the possibility of cracking. In addition, a plating material cheaper than the plating material of the connection terminals 12a shown in
In the above-mentioned manufacturing method examples 1 and 2, the structures and the manufacturing methods for the connection terminals 12a as the lead frame part are taken as an example. The structures and the manufacturing methods can be applied, as described below, to the die pad 15 and/or the connection terminals 11a of the outer-circular-row connection terminal group 11 as the lead frame part.
The different point between an electronic apparatus 2 according to the second embodiment and that of the first embodiment is that some of the plurality of connection terminals 12a are replaced with an electronic element component, for example, a passive component 60. Typically, the passive component 60 is a laminated capacitor, but not limited. Resistance or other component may be used.
An electronic apparatus 3 according to the third embodiment has a passive component 70, of which structure is different from that of the electrode parts 63 of the passive components 60 of the second embodiment. The contents of
Each electrode part 73 provided on the both ends of a body 71 of the passive component 70 has a base electrode 73a and a plated film 73b. The plated film 73b is a film formed by electroplating and is composed of Ni/Au, for example. The structure of the electrode part 73 is suitable for both the wire bonding and connecting to the pad electrodes 41 on the mount board 40 by solder.
Thus, the electronic element components such as the passive components 60, 70, or the like are arranged between the die pad 15 and the outer-circular-row connection terminal group 11. Due to this, complex processes are not needed, and the miniaturized electronic apparatuses 2 and 3 can be manufactured at low cost.
An electronic apparatus 4 according to the fourth embodiment has a passive component 80, of which structure is different from that of the electrode parts 63 of the passive component 60 of the second embodiment.
The area of the electrode part 83 of the passive component 80 to be connected is larger than each area of the electrode part 63 of the passive component 60 and the electrode part 73 of the passive component 70. Thus, wire bonding and mounting may be performed easily and certainly, and the reliability of connection may improve.
In addition, the electronic apparatus 5 includes the outer-circular-row connection terminal group 11 arranged in a first row and the inner-circular-row connection terminal group 12 arranged in a second row (inside the outer-circular-row connection terminal group 11). The height of the connection terminal 11a of the outer-circular-row connection terminal group 11 is higher than the height of the connection terminal 12a of the inner-circular-row connection terminal group 12.
The first circuit chip 36 is connected to the outer-circular-row connection terminal group 11 by the wires 33 respectively. The second circuit chip 37 is connected to the inner-circular-row connection terminal group 12 by the wires 33 respectively.
For example, the inner-circular-row connection terminal group 12 is mounted in another process (post process) as shown in
Thus, the respective components of the electronic apparatus 5 are arranged in a dense state since the circuit chips 30 have a layered state and the connection terminal group 10 has a plurality of rows, and miniaturization of the electronic apparatus 5 may be realized.
Note that the height of the connection terminal 11a of the outer-circular-row connection terminal group 11 may be smaller than the height of the connection terminal 12a of the inner-circular-row connection terminal group 12.
The present technology is not limited to the embodiments described above, and various other embodiments may be realized.
As for each of the electronic apparatuses 1 to 5 according to the above respective embodiments, the example of the connection terminal group 10 (outer-circular-row connection terminal group 11 and inner-circular-row connection terminal group 12) mounted in two rows around the circuit chip 30 is shown. However, the connection terminal group 10 may be mounted in three or more rows around the circuit chip 30. In such a case, for example, the connection terminal groups other than the most-outer-circular-row connection terminal group of the connection terminal group 10 in three or more rows may be mounted on the tape member 28 in a process different from the process in which the tape member 28 is attached to the lead frame member 20.
In the above respective embodiments, the connection terminal is taken as the example of the lead frame part mounted in another process. However, in addition to the connection terminal, or in place of the connection terminal, the die pad 15 may be the lead frame part mounted in another process (post process). Due to this, the degree of freedom to which the die pad 15 is arranged may increase. When both of the die pad 15 and the inner-circular-row connection terminal group 12 are mounted in another process (post process), the die pad 15 arranged on a center position (first position) may be mounted earlier than the connection terminal 12a arranged around the center position (second position), and the order may be opposite.
Similarly, the connection terminal 11a of the outer-circular-row connection terminal group 11 may be the lead frame part mounted on the tape member 28 in another process (post process).
Similarly, both of the die pad 15 and electronic element components (for example, the passive components 60, 70, and 80) may be mounted on the first position and the second position of the tape member 28 respectively in another process (post process).
When the die pad 15 is the lead frame part mounted in another process, the hanging part 17 hanging the die pad 15 is not also needed.
As the above electronic element component, the passive components 60, 70, and 80 are taken as the example. However, a component having a function of an active component or another component may be used.
The technology is applied to a QFN packaged type apparatus. In addition, the technology may also be applied to a DFN (Dual flat non-leaded) packaged apparatus or another similar packaged apparatus.
Among the characteristic parts according to the respective embodiments described above, it is also possible to combine at least two of the characteristic parts together.
Note that the present technology may also employ the following configurations.
(3) The method of manufacturing a lead frame according to (2), in which
| Number | Date | Country | Kind |
|---|---|---|---|
| 2016-106002 | May 2016 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2017/016571 | 4/26/2017 | WO | 00 |
