Method of manufacturing semiconductor device

Abstract

In the present invention, a connection plug region where a connection plug is disposed has a long shape comprising a first length direction and a first width direction, an open region that is exposed by an open portion disposed in an insulation layer on the connection plug has a long shape comprising a second length direction and a second width direction, and during etching when disposing the open portion, the first length direction of the connection plug region and the second length direction of the open region are disposed such that they intersect so as to form a predetermined angle. Thus, it becomes possible to improve the reliability of the electrical connection between the connection plug and the conductive film deposited inside the open portion.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

Preferred exemplary embodiments of the present invention will be described in detail based on the following figures, wherein:

FIG. 1 is a cross-sectional diagram showing a semiconductor device manufacturing method pertaining to a first exemplary embodiment of the invention;

FIG. 2 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 3 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 4 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 5 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 6 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 7 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 8 is a plan diagram describing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 9 is a plan diagram describing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 10 is a plan diagram describing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 11 is a plan diagram describing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 12 is a plan diagram describing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 13 is a plan diagram describing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 14 is a plan diagram describing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 15 is a plan diagram describing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 16 is a plan diagram describing the semiconductor device manufacturing method pertaining to the first exemplary embodiment of the invention;

FIG. 17 is a cross-sectional diagram showing a semiconductor device manufacturing method pertaining to a second exemplary embodiment of the invention;

FIG. 18 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the second exemplary embodiment of the invention;

FIG. 19 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the second exemplary embodiment of the invention;

FIG. 20 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the second exemplary embodiment of the invention;

FIG. 21 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the second exemplary embodiment of the invention;

FIG. 22 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the second exemplary embodiment of the invention;

FIG. 23 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the second exemplary embodiment of the invention;

FIG. 24 is a cross-sectional diagram showing the semiconductor device manufacturing method pertaining to the second exemplary embodiment of the invention;

FIG. 25 is a plan diagram describing the semiconductor device manufacturing method pertaining to the second exemplary embodiment of the invention; and

FIG. 26 is a cross-sectional diagram describing an open defect in the description of the first exemplary embodiment of the invention.

Claims

1. A semiconductor device manufacturing method comprising: forming, in a first insulation layer formed on a foundation layer, a conductive connection plug whose surface is exposed from the first insulation layer and which penetrates the first insulation layer and is electrically connected to the foundation layer;forming a second insulation layer on the surface of the connection plug and on the first insulation layer;etching to dispose in the second insulation layer an open portion that exposes the connection plug and the first insulation layer;depositing a conductive film on the second insulation layer and inside the open portion; andpatterning the deposited conductive film to form on the second insulation layer a wiring layer electrically connected to the connection plug,whereina connection plug region that is the surface of the connection plug has a long shape comprising a first length direction and a first width direction,an open region that is exposed by the open portion has a long shape comprising a second length direction and a second width direction, andduring the etching, the open portion is positioned such that the first length direction of the connection plug region and the second length direction of the open region intersect so as to form a predetermined angle.

2. The semiconductor device manufacturing method of claim 1, wherein the connection plug region and the open region are mutually disposed such that both edge portions in the first length direction of the connection plug region protrude from the open region and such that both edge portions in the second length direction of the open region protrude from the connection plug region.

3. The semiconductor device manufacturing method of claim 1, wherein the shapes of the connection plug region and the open region are rectangular.

4. The semiconductor device manufacturing method of claim 1, wherein the shapes of the connection plug region and the open region are oval.

5. The semiconductor device manufacturing method of claim 1, wherein the angle formed by the first length direction and the second length direction is 90 degrees.

6. The semiconductor device manufacturing method of claim 1, wherein the conductive film deposited on the second insulation layer and inside the open portion is deposited by sputtering.

7. The semiconductor device manufacturing method of claim 1, wherein the material of the conductive film is titanium nitride.

8. The semiconductor device manufacturing method of claim 1, wherein the material of the conductive film is titanium aluminum nitride.

9. The semiconductor device manufacturing method of claim 1, further comprising forming a third insulation layer on the second insulation layer and inside the open portion so as to cover the wiring layer.

10. The semiconductor device manufacturing method of claim 1, wherein the length in the first length direction of the connection plug region and the length in the second length direction of the open region are different.

11. The semiconductor device manufacturing method of claim 1, wherein the wiring layer is a wiring layer electrically connected to an upper electrode of a capacitor that is formed by laminating a lower electrode and the upper electrode via a ferroelectric film,the second insulation layer covers the capacitor so as to expose part of the surface of the upper electrode, andthe conductive film is deposited on the exposed surface of the upper electrode of the capacitor.

12. The semiconductor device manufacturing method of claim 1, wherein during the etching, the first insulation layer is over-etched such that part of the connection plug protrudes from the first insulation layer.

13. A semiconductor device manufacturing method comprising: forming, on a semiconductor substrate including a surface disposed with an impurity diffusion layer, a capacitor that is formed by laminating a lower electrode and an upper electrode via a ferroelectric film and a connection plug that is electrically connected to the impurity diffusion layer;forming an insulation layer on the semiconductor substrate so as to cover the capacitor and a connection plug region where the connection plug is disposed;etching so as to dispose in the insulation layer an open portion that exposes the connection plug region and a capacitor-use open portion that exposes part of the surface of the upper electrode of the capacitor;depositing a conductive film on the insulation layer, inside the open portion, and inside the capacitor-use open portion; andpatterning the deposited conductive film to form on the second insulation layer a wiring layer that electrically connects the connection plug and the upper electrode of the capacitor,whereinthe connection plug region has a long shape comprising a first length direction and a first width direction,an open region that is exposed by the open portion has a long shape comprising a second length direction and a second width direction, andduring the etching, the open portion is positioned such that the first length direction of the connection plug region and the second length direction of the open region intersect so as to form a predetermined angle.

14. The semiconductor device manufacturing method of claim 13, wherein the connection plug region and the open region are mutually disposed such that both edge portions in the first length direction of the connection plug region protrude from the open region and such that both edge portions in the second length direction of the open region protrude from the connection plug region.

15. The semiconductor device manufacturing method of claim 13, wherein the shapes of the connection plug region and the open region are rectangular.

16. The semiconductor device manufacturing method of claim 13, wherein the shapes of the connection plug region and the open region are oval.

17. The semiconductor device manufacturing method of claim 13, wherein the angle formed by the first length direction and the second length direction is 90 degrees.

18. The semiconductor device manufacturing method of claim 13, wherein the conductive film deposited on the second insulation layer, inside the open portion, and inside the capacitor-use open portion is deposited by sputtering.

19. The semiconductor device manufacturing method of claim 13, wherein the material of the conductive film is titanium nitride.

20. The semiconductor device manufacturing method of claim 13, wherein the material of the conductive film is titanium aluminum nitride.

21. The semiconductor device manufacturing method of claim 13, wherein the length in the first length direction of the connection plug region and the length in the second length direction of the open region are different.