The invention relates to a method of producing bipolar transistor structures in a semiconductor process, in particular transistor structures in BICOM (bipolar complementary) technology.
In a typical sequence of a BICOM fabricating process the window for a transistor base is usually structured by means of an anisotropic plasma etching step. The window defined by a patterned resist layer is thus structured with straight side walls that extend through a polycrystalline silicon layer (hereinafter “poly”) covered with an oxide layer. For epitaxial (“EPI”) growing of a silicon layer in the base window an advanced trisilane (Si3H8) epitaxial process is a preferred option due to the low cost and high yield of that process. With shrinking component dimensions and increasing thickness of the polycrystalline silicon layer, however, the trisilane epitaxial process is not applicable due to the forming of residual poly stringers after structuring that epitaxial layer by etching, as will be explained in more detail with reference to the appending drawings. These stringers affect operation of the resulting circuit component.
In one aspect of the invention a method of producing bipolar transistor structures in a semiconductor process is provided, wherein an advanced epitaxial trisilane process can be used without the risk of poly stringers being formed. In accordance with the invention, the method of producing bipolar transistor structures in a semiconductor process comprises the step of structuring, by plasma etching, a base window in a polycrystalline silicon layer covered with an oxide layer, and the further step of epitaxial growing a silicon layer in the base window from trisilane. The plasma etching is performed in a sequence of anisotropic etch and isotropic ash steps, thereby creating stepped and inwardly sloping window edges. Due to the inwardly sloping side walls of the window, the epitaxially grown silicon layer is formed without inwardly overhanging structures, and the cause of poly stringers forming is thus eliminated.
a to 1e are schematic sectional views illustrating successive semiconductor process steps in the formation of a bipolar transistor base window that would result in the occurrence of poly stringers; and
a and 2b are schematic sectional views illustrating alternative semiconductor process steps in the formation of a bipolar transistor base window that avoid the occurrence of poly stringers.
In
If, as illustrated in
In a subsequent process step, as illustrated in
In a further subsequent process step, as illustrated in
When the EPI layer 20 is then structured, as illustrated in
Turning now to
When the EPI layer is then grown over the base window using a trisilane epitaxial process, as shown in
Although the invention has been described hereinabove with reference to a specific embodiment, it is not limited to this embodiment and no doubt further alternatives will occur to the skilled person that lie within the scope of the invention as claimed.
Number | Date | Country | Kind |
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10 2009 032 854 | Jul 2009 | DE | national |
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