The present invention concerns the field of machine learning and more specifically the use of Markov Chain Monte Carlo (MCMC) sampling for machine learning. The invention also relates to the field of resistive Random Access Memories (RRAMs).
Classification is a common problem within machine learning. Basically, classifying amounts to predicting a qualitative response for an observation i.e. assigning the observation to a category or a class. Many classification techniques are available to predict a qualitative response. A very popular supervised classification method is logistic regression.
Consider an example of dataset as illustrated in
The data elements of the dataset can be represented by vectors xn, the size of which being the number M of attributes (here M=2). These vectors can be stacked in a matrix X=(x1T, x2T, . . . , xNT)T where N is the number of elements in the dataset, thereby representing the whole dataset. Similarly, the responses of the elements of the dataset can be stacked in a vector t=(t1, t2, . . . , tN)T.
We look for a linear model which would allow us to classify the data elements of the dataset according to their known responses and predict the class of a new observation xnew. More specifically, we assume that for any data element xn of the dataset the probability that it belongs to the first class (Tn=0) decreases with the dot product wTxn where w is a vector, hereinafter referred to as parameter vector capturing the parameters of the model. Conversely, we assume that the probability that data element xn belongs to the second class (Tn=1) increases with the dot product. A simple way to convert the dot product into a probability value is to squash the dot product into the range [0,1] with a sigmoid function (a.k.a. standard logistic function), according to the log it model:
and therefore:
Following a Bayesian approach, we now consider the parameter vector as a random vector and are interested in finding the posterior probability density (also called posterior density or, simply, posterior) knowing the dataset elements and their respective classes, that is p(w|t, X). The posterior can be obtained from the prior probability density, p(w), (also called prior density or, simply, prior), the likelihood p(t|X, w) and the marginal likelihood, p(t|X), according to Bayes' rule:
where the marginal likelihood is obtained by p(t|X)=∫p(t|X, w)p(w)dw.
In the following, the posterior p(w|t, X) will simply be denoted π(w) and the likelihood of parameter vector w, p(t|X, w), will be denoted (w). Since p(t|X) is a constant depending only upon the dataset, the posterior is proportional to the product of the likelihood with the prior:
π(w)=Z(w)·p(w) (3)
where Z is a constant.
It should be noted that the terms posterior and prior always refer to the available observations (the dataset X) and their respective responses (t).
Assuming that the elements of t are conditionally independent, the likelihood (w) can be expressed as follows:
and therefore, substituting expressions (1-1) and (1-2) into (4):
Even assuming a known distribution e.g. a Gaussian distribution for the prior π(w), it is generally impossible to compute the denominator Z−1 of (2) because the integration of the likelihood p(t|X, w) for obtaining the marginal likelihood p(t|X) is not analytically tractable.
Several options are available at this stage. According to a first option, one may look for the parameter vector, ŵMAP (where MAP stands for Maximum A Posteriori) achieving the maximum value of the posterior, π(w) and predict the class of a new observation according to (1-1) and (1-2) with the MAP parameter vector, ŵMAP. According to a second option, referred to as Laplace approximation, one may try to approximate the posterior around its maximum value by a gaussian distribution. A third option, which better captures the distribution of the parameter vector is to sample the posterior π(w) knowing the likelihood (w) and the prior p(w) and availing of the proportionality relationship (3). Sampling means drawing samples of the parameter vector w according to the posterior π(w). Once Ns samples of the posterior have been obtained, ws, s=1, . . . , Ns, namely once we have got Ns models we can predict the class of a new observation xnew (unseen data point) by calculating the average:
and therefore:
Each instance of ws capturing the model parameters is associated with a linear decision boundary in the space of attributes as shown in
It follows from expression (6-1) and (6-2) that we can train a logistic regression classifier on the data set X with known labels t provided we are able to sample the posterior π(w).
The sampling of π(w) can be achieved by a so-called MCMC (Markov Chain Monte Carlo) technique allowing to explore the parameter space according to a Markov stochastic process. A popular sampling algorithm using this technique is the Metropolis-Hastings algorithm which is outlined further below. A detailed presentation of the Metropolis-Hastings algorithm and its application to machine learning can be found for instance in the book by Simon Rogers and Mark Girolami entitled “First course in Machine Learning”, Chapter IV, second edition, Chapman & Hall/CRC Press, 2017, or in the article of C. Andrieu et al. entitled “An introduction to MCMC for machine learning” published in Machine Learning, vol. 5, pages 5-43, 2003.
A flowchart of the Metropolis-Hastings algorithm is illustrated in
It assumes that a conditional probability density for moving from a parameter vector to a next one is defined beforehand.
The algorithm starts at step 310 with an arbitrary parameter vector w0, and by initialising an iteration counter s=0.
At step 320, the iteration counter is incremented by one, that is s=s+1.
At step 330, a new candidate parameter vector, {tilde over (w)}s, is generated by using the conditional probability density p({tilde over (w)}s|ws−1) mentioned above. Without prejudice to generality, this conditional probability density can be chosen Gaussian, i.e. p({tilde over (w)}s|ws−1)□N(ws−1, Σ) where Σ is a predetermined covariance matrix. Σ is chosen diagonal and its eigenvalues are chosen commensurate with the parameter space to explore. It should be noted that the conditional probability density is simply here to define a random walk through the parameter space and is not related to the posterior π(w).
Returning to the flowchart of
since the Gaussian distribution is symmetrical. The acceptance ratio r appraises the suitability of the candidate vector {tilde over (w)}s to better classify the data of the dataset than vector ws−1 output by the previous iteration.
Although the posteriors cannot be calculated due to the presence of the constant Z, their ratio can be easily obtained from expression (3) as the product of the ratio of the priors with the ratio of likelihoods:
in which we will assume that the priors are all Gaussian i.e. p({tilde over (w)}s)□N(0, σIM) and p(ws−1)□N(0, σIM), where IM is the identity matrix of size M×M, M being the size of the data elements, that is the number of attributes.
It is checked at step 350 whether the acceptance ratio is greater than or equal to 1. In the affirmative, the algorithm jumps to step 353 where the candidate vector is accepted that is ws={tilde over (w)}s. In the negative, the algorithm proceeds further with step 360 where a sample value, u, of a random variable U having a uniform probability density on the interval [0,1] is drawn.
It is then checked at step 370 whether the sample value, u, is lower than or equal than the acceptance ratio, r. In the affirmative, the algorithm jumps to step 353 where the candidate vector is accepted, that is ws={tilde over (w)}s. However, in the negative, the candidate vector is rejected at step 357 and the parameter vector output by the iteration s is chosen equal to the one output by previous iteration, that is ws=ws−1.
In other words, if posterior density at {tilde over (w)}s is higher that the posterior density at ws−1, the candidate vector is systematically retained whereas it is only conditionally retained otherwise. Hence, it should be understood that due to the rejection mechanism, several consecutive samples of the sequence ws, s=1, . . . , Ns may be identical.
After having being updated by the candidate vector (step 353) or not (step 357), the algorithm goes back to step 320 for a new iteration.
Since, u≤1, it is important to note that step 350 can be skipped. It suffices then to compare the acceptance ratio, r, with u in 370, the parameter vector being updated with {tilde over (w)}s if u≤r and being kept equal identical to the previous parameter vector ws−1 otherwise.
The algorithm stops when a predetermined stopping criterion (not represented) is met, e.g. when a predetermined number Ns of samples have been obtained.
The Metropolis-Hastings algorithm can be run on a traditional computer for training a logistic regression classifier. However, when the dataset is large or when the size (Ns) of the model is large, the algorithm requires a large size memory and powerful computer resources.
An object of the present invention is to propose a method for training a logistic regression classifier which can be carried out very efficiently on a hardware accelerator having very simple architecture.
The present invention is defined by the appended independent claims. Various preferred embodiments are defined in the dependent claims.
The present invention will be better understood from the description of the following embodiments, by way of illustration and in no way limitative thereto:
The idea at the basis of the present invention is to use a resistive switching RAM also simply called resistive memory (RRAM) for implementing the training of a logistic regression classifier according to the Metropolis-Hastings algorithm. More specifically, the invention makes use of the cycle to cycle (C2C) variability programmed resistances in a RRAM, namely of the low-resistance after a SET operation or of the high-resistance after a RESET operation, in order to generate successive parameter vectors of the model.
We recall that a resistive switching RAM consists of non-volatile random access memory cells, each cell comprising a resistor made of dielectric which can be programmed either in a low resistance state (LRS) with a so-called SET operation or in a high resistance state (HRS) with a so-called RESET operation. During a SET operation, a strong electric field is applied to the cell, while limiting the current to a programming current value. This operation forms a conductive filament through the dielectric and brings the resistor to a low resistance value, RLO which depends upon the programming current value.
Conversely, during a RESET operation, a programming voltage is applied to the cell with the same or opposite polarity than the one used for electroforming. This voltage breaks the filament and the resistor returns therefore to a high resistance value, RHI which depends upon the programming voltage value.
A detailed description of RRAM can be found in the article by R. Carboni and D. Ielmini, entitled “Stochastic memory devices for security and computing”, published in Adv. Electron. Mat., 2019, 5, 1900198, pages 1-27.
Once a cell has been programmed by a SET or a RESET operation, the resistance value (RLO or RHI) is stable in time until the next operation is performed. However, the low resistance value varies from one SET operation to the next, even if the programming current is kept constant. More specifically, for a given programming current, the low resistance RLO can be considered as a random variable which exhibits a normal distribution over SET operations (cycle to cycle variability). Expressed otherwise, each time a SET operation is applied to the memory cell, the obtained resistance value is sampled from this normal distribution.
Similarly, the high resistance value varies from one RESET operation to the next, even if the programming voltage is kept constant. More specifically, for a given programming voltage, high resistance RHI can be considered as a random variable which follows a log-normal distribution over the RESET operations (cycle to cycle variability). In other words, each time a RESET operation is applied to the memory cell, the obtained resistance value is sampled from this log-normal distribution.
The median value of the RLO distribution (or, equivalently, the mean value since the distribution is normal) depends on the programming current value during the SET operation as illustrated in
Furthermore, the median value of the RHI distribution depends upon the programming voltage value during the RESET operation, as illustrated in
According to a first embodiment of the invention, the method for training a logistic regression classifier uses a resistive RAM structure as shown in
The resistive RAM is comprised of word lines which are addressed by word select signals row[0], row[1], . . . , row[P]. Each word line is comprised of M cells where M stands for the number of attributes, each word line being intended to store a sample a parameter word of the model. Furthermore, each word line is associated with a counter of occurrences, the function of which will be described further below.
The cells of a column, m=1, . . . , M, can be fed with a data control signal col[m]. Each cell comprises a FET transistor, the gate of which is controlled by a word select signal and the source of which is connected to a data control signal through a resistor, Rp,m. The drains of the FETs of a word line, p=1, . . . , P, are all connected to the same output line, out[p].
During a write operation into a cell located at the intersection of row p and column m, word select signal row[p] is applied and a programming voltage is applied to col[m]. The programming can occur during a SET operation or a RESET operation as mentioned above.
During a read operation of a cell located at the intersection of row p and column m, a word select signal is applied at row[p] and a data control signal is applied at col[m]. Assuming that a voltage xm, is applied to col[m], the output line output[p] will output a current xm/Rp,m=gp,mxm, where gp,m, is the conductance of the resistive RAM cell. If the RAM cell was programmed to store a value (of conductance) wp,m, the output current would be wp,m·xm. Hence, if all the cells of a line are read simultaneously, the output current of line output[p] will be the value of the dot product wpTx, where x=(x1, . . . , xM)T and wp is the parameter vector stored at line p.
The resistive RAM of
We adopt here the same notations as in the introductory part of the application. Each element of the training dataset is represented by M attributes which can be stacked in a vector x of size M. Each element of the training dataset is labelled with a binary target t indicating whether the element in question belongs to a first class or to a second class.
The probability of an element x belonging to a class is modelled by a logistic function applied to a score wTx where w is a parameter vector of size M. More specifically, the probability of element x belonging to the first class is given by:
whereas the probability of this element belonging to the second class is given by:
where the parameter vectors ws, s=1, . . . , Ns are obtained by MCMC sampling the posterior π(w), that is knowing the elements of the dataset X and their respective labels.
At step 900, the RRAM is initialised by programming all the cells in either the first resistance state (LRS), according to a first variant or the second resistance state (HRS), according to a second variant that is by performing a SET operation (first variant) or a RESET operation (second variant) on all the cells of the RRAM. Preferably, the cells are programmed in the first resistance state for reasons that will become more apparent below.
At step 910, the first row of the RAM is read, that is the data {tilde over (w)}0,1, . . . , {tilde over (w)}0,M forming a first initial parameter vector {tilde over (w)}0. The counter of iterations s is initialized, s=0. The counters of occurrences associated with the different rows are reset to zero.
The training method then enters an iterative loop, where s stands for the current iteration, ws−1 is the current parameter vector which has already been stored in the RRAM at the previous iteration and {tilde over (w)}s is a candidate parameter vector at iteration s
At step 920, the counter of iterations is incremented, s=s+1.
At step 930, a candidate parameter vector, {tilde over (w)}s, is generated from the current parameter vector, ws−1, by reading the cells of the current row and programming the cells of the next row with a SET operation (1st variant) or with a RESET operation (2nd variant). More specifically a current or voltage is read from the cell of current row j and applied as a voltage to the cell of the next row of the same column. By so doing, a candidate vector, {tilde over (w)}s, is generated with conditional probability p({tilde over (w)}s|ws−1) according to a normal distribution law (1st variant), and stored temporarily at row j+1. As to the second variant, the current or voltage read from the cell current row j is generated with a conditional probability which follows a log-normal law. Preferably, the read current or voltage is applied to an exponential amplifying circuit (for example an operational amplifier having an exponential characteristic element, such as a diode or biased FET on its non-inverting input) before being applied to the cell of the next row and same column. The exponential amplifying circuit projects the log-normal distribution into a normal distribution.
It follows from this step that the resistances of the cells of the next row are derived from the resistances of the current row according to a Markovian process.
At step 940, the current parameter vector, ws−1, and the candidate parameter, {tilde over (w)}s, respectively stored at the current row and at the next row are read from the RRAM. The priors p({tilde over (w)}s) and p(ws−1) are calculated by a processor (not shown) from a predetermined gaussian law which may have been obtained during a calibration phase. Preferably, these values are calculated under a logarithm form, i.e. log(p({tilde over (w)}s)) and log(p({tilde over (w)}s−1)).
At step 950, the vectors xn, n=1, . . . , N of the dataset X are applied in turn to the set of columns of the RRAM. The output lines output[j] and output[j+1] respectively output the dot products {tilde over (w)}sT·xn and ws−1T·xn n=1, . . . , N, which are supplied to the processor.
At step 960, the processor computes the likelihoods ({tilde over (w)}s) and (ws−1) from expression (5):
It is noted that for each term of product (10-1) or (10-2) only one of the two ratios has to be computed (namely the one corresponding to tn=1).
Preferably, the log-likelihoods log(({tilde over (w)}s)) and log((ws−1)) are calculated instead as a sum of terms, only those being weighted by tn=1 needing to be computed.
The processor then computes the product of the ratio of the likelihoods
with the ratio of the priors
to obtain the acceptance ratio according to expression (8).
Preferably, the acceptance ratio can be computed under its logarithm form, log(r) as the sum of difference of log-likelihoods and difference of log of priors.
At step 970, a random value u is sampled from a random variable U exhibiting a uniform probability density law over range [0,1]. The random value can be generated by the processor. Alternatively, it can be generated by a dedicated row of the RRAM, for example row[P] as shown in
At step 980, the acceptance ratio r is compared with the random value u. In practice, the comparison can be performed between the logarithmic values log(r) and log(u).
If r≥u, the candidate parameter vector w{tilde over (w)}s is retained as the new current vector at step 983, that is ws=w{tilde over (w)}s and the new current row is j+1. The counter of occurrences associated with row j+1 is set to 1.
Else, if r<u, the candidate parameter is rejected at step 987, that is ws=ws−1, the current row is kept at j and the counter of occurrences associated with row j is incremented by one.
In both cases, the algorithm checks whether a stopping criterion is met, for example whether s=Ns, that is whether a maximum number of samples has been reached or if the RRAM is full. In the negative, the algorithm goes back to step 920. Otherwise, it stops. According to a variant, instead of stopping when the RRAM is full, that is when the last row has been reached, the algorithm loops back to the first row and goes on as before. This variant is of interest when convergence to the posterior is slow.
Once the logistic regression classifier has been trained on the training dataset, that is, in practice, when the Ns samples of parameter vector have been stored in the RRAM, the RRAM can be used for the classification of new observation as shown in
The RRAM contains Ns samples of the model parameter vector ws, s=1, . . . , Ns. It is nevertheless important to understand that the same sample value may occur several times, the occurrences of the same sample value being stored in the same row. More specifically, if we denote vj the integer stored in the counter of occurrences associated with row j and J the number of rows where a sample has been stored (i.e. the rows for which the associated counters are not equal to zero), we have the relationship:
At step 1000, when a new observation xnew is to be classified, its components are applied as data control signals to columns 1, . . . , M. These control signals are in practice voltages proportional to the components of xnew.
The classifying then enters an iterative loop, the loop being iterated as long as an occurrence counter is not zero.
At step 1010, the first J rows are selected and output lines output[1], output[2], . . . , output[J] are read in parallel or in series by the processor. These output lines provide the dot products wjTxnew, j=1, . . . , J where wu is stored at row j. According to a variant, the first B rows of the RRAM can be ignored or discarded, these first B rows corresponding to a burn-in period of the training phase, corresponding to convergence to the posterior. In such instance, the J rows would be following these B rows.
After the output lines have been read, all the counters of occurrences that are not equal to zero are decremented by one at step 1020.
It is the checked at 1030 whether ∃j∈{1, . . . , J} such as vj>0. In the affirmative the algorithm goes back to step 1010.
Conversely, in the negative, the iterative loop is exited. The reading of the output lines provides the sequence of samples (of the parameter vector) ws, s=1, . . . , Ns.
Alternatively, instead of sequentially performing reading iterations until all the counters are equal to zero, the output of each line output[j] may be amplified by an amplifier whose gain is controlled by the value vj stored in the corresponding counter.
The processor calculates at step 1040 an average logistic regression value over the samples, according to expression (6-1) or (6-2).
Finally, at step 1050, it is decided upon comparing P(Tn=1|xnew) or P(Tn=0|xnew) with a predetermined threshold value (e.g. ½) whether data element xnew belongs to the first class, 1051, or the second class, 1052.
The structure of this resistive RAM differs from the one used in the first embodiment by the fact that the parameter vectors of the models are stored as differential pairs. More precisely, each parameter vector wj is represented by a pair (wj+, wj−) with wj=wj+−wj− where the first part, wj+, and the second part, wj−, of parameter vector wj are generated and stored separately in the RRAM.
More specifically, the resistive RAM is comprised of word lines which are addressed by word select signals row[0], row[1], . . . , row[P]. Each word select signal, row[j] controls in fact two sub-rows: a first sub-row storing the first part of the parameter vector, wj+, and a second sub-row containing the second part of the parameter vector, wj−. The outputs of the cells of the first sub-row of row j are connected to a first sub-row output line, sub_output+[j] and the outputs of the cells of the second sub-row are connected to a second sub-row output line sub_output−[j]. The first and second sub-row output lines are connected to the inputs of a subtractor sub[j].
The first sub-row of row j stores wj+ and the second sub-row of row j stores wj−. Hence, when the components of a vector x are applied to the data control lines and row j is selected, the first sub-row output line outputs (wj+)Tx and the second sub-row output line outputs (wj−)Tx. The output of subtractor sub[j] is therefore (wj+)Tx−(wj−)T x=wjTx.
The last row of the RRAM can be dedicated to an RNG as in the first embodiment. Alternatively, the RNG can be located off the RRAM.
The RRAM of
The first variant (programming with the SET operation) and the second variant (programming with the RESET operation) envisaged for the first embodiment equally apply to the second embodiment.
A third embodiment of the present invention draws on a further way of programming a resistive memory, when it is in a so-called binary regime.
More specifically, when a RRAM cell is a high resistance state (HRS) and a programming voltage value Vset belonging to a given range is applied to this cell during a SET operation, the RRAM cell switches to a low resistance state (HRS) with a flipping probability p which depends upon voltage value Vset.
The left part of
p(X=x)=px(1−p)1−x (12)
where x=0 represents the HRS state and x=1 represents the LRS state.
Similarly, when a RRAM cell is a low resistance state (LRS) and a programming voltage value Vreset belonging to a given range is applied to this cell during a RESET operation, the RRAM cell switches to a high resistance state (HRS) with a flipping probability p′ which depends upon voltage value Vreset.
According to a variant, the decision as to the whether the state of a RRAM cell is to be flipped can be generated by using a pseudo-random generator (e.g. a linear-feedback shift register or LFSR). The random number output by the pseudo-random generator is compared with a predetermined threshold value and the decision of flipping the state of a cell is made based upon the result of the comparison. For example, if the random number lies above the threshold value the state of the cell is flipped and, if not, the state of the cell is left unchanged.
Alternatively, it can be generated by using a dedicated row of the RRAM, as already explained in relation with
The method for training a logistic regression classifier according to the third embodiment also uses a resistive RAM structure as depicted in
Indeed, the candidate parameter vector, {tilde over (w)}s, is generated here from the current parameter vector, ws−1, by considering each bit thereof and:
The probability p′ can be chosen such that p′=p.
Furthermore, the priors p(ws−1) and p({tilde over (w)}s) can be computed according to a Bernoulli law the parameters of which are obtained in a calibration phase.
Finally, the calculation of the likelihoods and of the acceptance ratio remains the same as in the first embodiment.
The man skilled in the art will understand that, instead of simulating a random walk according to a normal Markovian process, the training method according to the third embodiment simulates a discretized walk through the parameter space. In practice, when the number M of attributes is relatively high, the training method according to the third embodiment provides satisfactory results.
Once the RRAM has been trained according to the training method according to the third embodiment, it can be used as a logistic regression classifier as explained in relation of
According to a variant, the logistic function in step 1040 can be omitted and the probability for a new observation, xnew, to belong to a class can be directly obtained from the scores, namely for the first class:
The present invention has been described in the context of the training of a logistic regression classifier, which classifies data into a class C (first class) or its complementary
Finally, the training method according to the invention extends to a multinomial logistic classifier by using a softmax model instead of the log it model described above.
Number | Date | Country | Kind |
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19210420 | Nov 2019 | EP | regional |
Number | Date | Country |
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110516699 | Nov 2019 | CN |
Entry |
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European Search Report dated May 12, 2020 in European Application 19210420.6 filed on Nov. 20, 2019, 1 page. |
Groenewald et al., “Bayesian computation for logistic regression”, Computational Statistics & Data Analysis, vol. 48, No. 4, XP027662479, Apr. 1, 2005, pp. 857-868. |
Malhotra et al., “Exploiting Oxide Base Resistive RAM Variability for Probabilistic AI Hardware Design”, XP055693207, Nov. 16, 2019, 4 pages. |
Ankit et al., “PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference”, Architectural Support For Programming Languages and Operating Systems, ACM, XP058433490, Apr. 4, 2019, pp. 715-731. |
Rogers et al., “First course in Machine Learning”, Chapter 4, second edition, Chapman & Hall/CRC Press, 2017, 29 pages. |
Andrieu et al., “An Introduction to MCMC for Machine Learning”, Machine Learning, 50, 2003, pp. 5-43. |
Carboni et al., “Stochastic Memory Devices for Security and Computing”, Advanced Electronic Materials, 5, 1900198, pp. 1-27. |
Number | Date | Country | |
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20210150409 A1 | May 2021 | US |