Chemical mechanical polishing (“CMP”) is commonly used in current advanced semiconductor processing. In CMP a rotating pad receives abrasive slurry. The pad is mounted on a platen and typically oriented in a face up arrangement. A wafer carrier is moved downward towards the pad. The wafer carrier may rotate about a central axis and may oscillate. A vacuum or electrostatic force may be used to mount a semiconductor wafer is to the carrier. The wafer carrier is positioned so that the face of the semiconductor wafer contacts the polishing pad and the slurry. The wafer and carrier may also rotate and oscillate during the polishing process. The wafer may have a dielectric layer that requires planarization, for example. In other process steps, for example for damascene metal fabrication, CMP can be used to remove excess metal and planarize the upper surface of plated metal conductors and the surrounding dielectric, to form inlaid metal conductors within the dielectric layers. By abrasively polishing the surface of the semiconductor wafer, asperities in layers can be removed to planarize the layer. Excess material may be removed as well.
During CMP processing of a surface, particles are sometimes generated. If a hard particle gets trapped on the wafer surface between the wafer and the CMP polishing pad, wafer scratching can occur. The scratches can cause defects in the integrated circuit devices that are being manufactured on the wafer and result in a loss of these devices. The wafer scratches are often not detected until the wafer processing reaches a later stage where some scan or visual inspection is done. The scratch detection may happen after many more processing steps are performed. Currently there is no mechanism for detecting wafer scratches as they occur during the CMP process. This leads to many wasted steps and loss of materials and time.
A continuing need thus exists for methods and apparatus for detecting wafer scratching problems or other errors in CMP processes without the disadvantages currently experienced using known methods.
For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
The drawings, schematics and diagrams are illustrative and not intended to be limiting, but are examples of embodiments of the invention, are simplified for explanatory purposes, and are not drawn to scale.
The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.
Embodiments of the present application which are now described in detail provide novel methods and apparatus for manufacturing semiconductor devices including performing chemical mechanical polishing on layers while detecting unusual vibration. The vibration is monitored during processing in real time and unusual vibration may be used to detect an unexpected condition during polishing. For example hard particles between the wafer and the CMP pad can cause vibration that is different from and therefore detectable from normal vibration patterns during polishing. An alarm or message signal can be sent; and further the CMP processing can be stopped either manually or automatically with the alarm. In this manner scratches or other defects can be remedied, or processing stopped, saving materials and time that would have otherwise been expended on processing a wafer that may not yield completed devices. Importantly the embodiments provide real time monitoring of a CMP process which avoids continuing damage to numerous wafers; in contrast to the conventional methods.
Current semiconductor processing often uses CMP processes. Without limiting the embodiments, example processing steps for CMP are to remove materials, to planarize deposited layers or even wafer surfaces, and to pattern and remove excess electroplated metal conductors in damascene processes, for example. In one example CMP process, shallow trench isolation regions (“STI”) may be formed by etching trenches into a semiconductor substrate. Dielectric may be deposited in the trenches to form the STI regions. In forming the STI regions, the dielectric is deposited until the trenches are filled and then overfilled, so that the excess dielectric forms a layer over the substrate. A CMP polishing step is then performed to planarize the STI regions and the substrate; and the result is that the tops of the STI regions are left coplanar with the surface of the semiconductor substrate.
Interlevel dielectric (“ILD”) layers may be formed over planar transistors disposed on the substrate, for example. The ILD dielectric is conformally deposited and thus portions of the ILD that are formed over a higher structure, such as over the gate conductor, will result in a correspondingly higher portion of the deposited ILD. Again a CMP process may be performed to polish the ILD layer and remove the high portions, thus planarizing the ILD layer; forming a planar surface needed or desirable for additional processing steps.
Metal layers for conductors are typically formed in single or dual damascene processing steps. First level metal or “M1” layer conductors may be formed from a single damascene copper or copper alloy, aluminum or other conductor. The copper is electroplated into a trench within a dielectric layer. During electroplating the copper fills and then overfills the trench. Because chemical etchants and other etch processes are ineffective in patterning copper, another chemical mechanical polishing process is used with an abrasive slurry and a pad to mechanically remove the excess copper. An inlaid conductor is the result, formed within the trench and surrounded by the dielectric layer. The finished conductor has a polished upper surface that is coplanar with a surface of the surrounding dielectric.
Accordingly, CMP processing is used repeatedly in semiconductor processing to form integrated circuits on semiconductor substrates.
During processing, the polishing pad 15, which may be porous or non-porous and which comes in a variety of commercially available types optimized for planarization, dielectric removal, copper removal, etc., is rotated. The slurry 23 is dispensed onto the pad 15. Wafer carrier 21 is placed into position with an active or face surface of the wafer facing and contacting the uppermost surface of the pad. If needed, a positive downforce is applied to force the face surface of the semiconductor wafer 31 onto the pad 15 and so place the wafer surface in contact with the abrasive slurry.
As shown in
Further, in conventional CMP processing the wafer scratch defects may not be detected until many more process steps are performed, and then a visual or automated scan of the wafer may reveal these defects. In an example process, after shallow trench isolation (STI) CMP, a wafer scan is not performed until a later layer of SiN or other dielectric is completed. This step occurs many hours later in the flow. Wafer scratches that occur in the STI CMP process are not detected until the first damaged wafer reaches the inspection stage. Many wafers may be processed at CMP during this time period. In one example, 400 pieces are processed at the STI CMP stage in a 24 hour period. The first wafer scratch defect is detected after 8 hours of additional time elapses. By dividing a day into three 8 hour portions, it can be seen that, taking 400/3, approximately 130-140 pieces are processed after the scratches start—and before the problem is detected. These wafers may all be as damaged as was the first one that was scratched. Thus, many materials, and processing time, are wasted on hundreds of wafer that have scratches and may not yield any functioning devices.
If the hard particles 25 are lodged between wafer 31 and the pad 15, as shown in
While the detected vibration certainly may correspond to the presence of hard particles on the CMP pad, other abnormal conditions may also be detected by use of the embodiments. These include, for example and without limiting the embodiments, an unsmooth polishing speed, inconsistent slurry caused by the dispenser or other mechanical problem, abnormal slurry or absence of slurry, machine failure in an motor or spindle, etc. Any of these conditions may also cause the vibration. The embodiments provide an alarm on an abnormal condition. Thus the embodiments, in addition to preventing or detecting wafer scratching, may detect many other conditions as they occur and therefore improve efficiency.
The vibration sensors may be commercially available piezoelectric sensors for displacement, velocity, or acceleration. In alternative embodiments the sensors may be accelerometers such as are increasingly used in handheld devices to detect motion and acceleration, for example. MEMS accelerometers or other semiconductor accelerometers may be used. Piezoelectric sensors for vibration are also commercially available and may be used with the embodiments.
In an embodiment, the signal analyzer 77 can collect time domain information. For example,
In an alternative embodiment, additional signal processing is performed.
As is noted above some CMP tools have multiple platens, such as illustrated in
In other embodiments, the comparison may involve capturing a signal sample in a signal analyzer, as described above. The captured signal corresponding to the received signal is compared to an expected output signal for normal conditions. The expected output signal may be retrieved from stored signal templates, for example. These may be stored in a memory device, hard disk drive, EEPROM or flash, commodity memory or the like coupled to the signal analyzer or even provided as part of the signal analyzer. If the difference between the real time received signal and the expected normal signal exceeds a predetermined threshold, an alarm can be indicated as is shown in state 99. In a further embodiment, the CMP processing in the tool could be automatically halted. If the compare at state 97 is false, which indicates the threshold is not exceeded, the method determines if more processing is needed at state 101, and if that is true, returns to state 93. If the wafer processing is done, then the method ends at state 103.
In the embodiments above, the signal analyzer may be provided as a commercially available device. Alternatively, the signal analyzer could be provided by programming a programmable microprocessor, processor, or computer. The signal analyzer may include a non-transitory memory for storing normal signal templates corresponding to output signals received from the sensors during normal CMP tool operations, and a memory or store such as a buffer for storing the real time signals received from the CMP tool. A comparator could be formed as an ASIC or IC; or it may be implemented using software to program the microprocessor or computer. Various implementations within the skill of one skilled in the art could be done, using for example programming complex programmable logic devices such as CPLDs, FPGAs and the like, EEPROMs or FLASH devices may be used for program and data stores, and digital signal processors (DSPs), or ASICS could be used. Display circuitry including video frame buffers and the like may be used to provide a visually readable waveform output for a human operator to inspect. All of these implementations are contemplated as alternative embodiments to the above described embodiments and fall within the scope of the appended claims.
In an embodiment, an method includes disposing a semiconductor wafer onto a wafer carrier in a tool for chemical mechanical polishing (“CMP”); positioning the wafer carrier so that a surface of the semiconductor wafer contacts a polishing pad mounted on a rotating platen; and dispensing an abrasive slurry onto the rotating polishing pad, while maintaining the surface of the semiconductor wafer in contact with the polishing pad to perform a CMP process on the semiconductor wafer. In real time, signals are received from the CMP tool into a signal analyzer, the signals corresponding to one of vibration, acoustics, temperature, and pressure. The method continues by comparing the received signals from the CMP tool to expected received signals for normal processing by the CMP tool; and outputting a result of the comparing. In an alternative embodiment, the method continues by indicating an alarm condition when the comparison indicates that a difference between the received signal and the expected signal exceeds a predetermined threshold. In a further embodiment, the method continues by outputting a human readable visual display for inspection by an operator. In still a further embodiment, the method continues by doing the comparison by performing a frequency domain transform on the received signals, and outputting a human readable visual display of the frequency domain transform for inspection by an operator. In yet another embodiment, the method includes receiving signals from at least one vibration sensor in the CMP tool. In another alternative, the method includes receiving signals from a vibration sensor coupled to the rotating platen. In still another alternative, receiving signals further comprises receiving signal from a vibration sensor mounted on the wafer carrier. In yet another alternative, the method includes performing a frequency domain transform on the received signals; comparing the frequency domain transform of the received signals to a stored frequency domain transform for an expected received signal for normal processing; and indicating, based on the compare of the frequency domain signals, when the received signal differs from the expected received signal by an amount more than a predetermined threshold. In a further alternative, the method includes stopping the CMP process based on the comparing. In yet another alternative, the method is performed and the received signals are received from at least one vibration sensor when a hard particle causes abnormal vibration in the CMP tool.
In an embodiment, an apparatus is provided including a rotating platen supporting a chemical mechanical polish (“CMP”) pad in a CMP tool; a wafer carrier configured to position a surface of a semiconductor in contact with the surface of the CMP pad; a slurry dispenser configured to supply slurry to the CMP polishing pad; at least one sensor coupled to the CMP tool and having a signal output, the sensor providing signals corresponding to one of vibration, acoustics, temperature, and pressure; and a signal analyzer is coupled to receive the signal output of the at least one sensor, and configured to output an alarm when an abnormal condition exists. In a further embodiment, the apparatus includes the signal analyzer which further includes a store of expected output signals corresponding to a normal process condition in the CMP tool; and a comparator configured to compare the received signal output from the at least one sensor to a stored expected signal and to indicate an alarm when the difference exceeds a predetermined threshold. In another embodiment, the signal analyzer further includes a human readable visual display for displaying the received signal. In yet another embodiment the signal analyzer further includes a frequency domain transformation apparatus configured to perform a frequency domain transformation on the received signal. In still another embodiment, the at least one sensor includes a vibration sensor coupled to one of the rotating platen and the wafer carrier. In a further embodiment, the apparatus includes a vibration sensor that is one of an accelerometer and a piezoelectric vibration detector.
In yet another alternative embodiment, a method is provided for sensing a hard particle in a chemical mechanical polish (“CMP”) process. The method includes disposing a semiconductor wafer onto a wafer carrier in a tool for CMP; positioning the wafer carrier so that a surface of the semiconductor wafer contacts a surface of a polishing pad mounted on a rotating platen; dispensing an abrasive slurry onto the rotating polishing pad while maintaining the surface of the semiconductor wafer in contact with the polishing pad; in real time, receiving signals from the CMP tool into a signal analyzer, the signals corresponding to vibration sensed in the CMP tool; and comparing the received signals from the CMP tool to expected received signals for normal processing by the CMP tool. When the comparing indicates a difference between the received signals and the expected received signal that exceeds a predetermined threshold that corresponds to the presence of a hard particle on the polishing pad, the method continues by outputting an alarm. In a further alternative embodiment, the method further comprises stopping the CMP tool upon outputting the alarm. In still another embodiment, comparing the received signals further includes performing frequency domain transformation for the received signals, and the comparing further comprises comparing the frequency domain transformation for the received signals to a stored frequency domain transformation of an expected signal for normal processing by the CMP tool. In yet another alternative for this embodiment, receiving signals from the CMP tool further includes receiving signals from a vibration sensor mounted on the wafer carrier, and receiving signals from another vibration sensor mounted on the rotating platen.
The scope of the present application is not intended to be limited to the particular illustrative embodiments of the structures, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes or steps.
Number | Name | Date | Kind |
---|---|---|---|
5008841 | McElroy | Apr 1991 | A |
5045669 | Ortiz, Jr. | Sep 1991 | A |
5399234 | Yu et al. | Mar 1995 | A |
5876265 | Kojima | Mar 1999 | A |
6042454 | Watanabe et al. | Mar 2000 | A |
6424137 | Sampson | Jul 2002 | B1 |
6572441 | Lukner et al. | Jun 2003 | B2 |
6585562 | Gitis et al. | Jul 2003 | B2 |
6937915 | Kistler et al. | Aug 2005 | B1 |
6997778 | Ono et al. | Feb 2006 | B2 |
7016799 | Dondi | Mar 2006 | B2 |
7163435 | Lim et al. | Jan 2007 | B2 |
7294041 | Lee et al. | Nov 2007 | B1 |
7377170 | Ganesan et al. | May 2008 | B2 |
20020182978 | Lukner et al. | Dec 2002 | A1 |
20050054268 | Kistler et al. | Mar 2005 | A1 |
20050125202 | Gotkis et al. | Jun 2005 | A1 |
20110035186 | Liu et al. | Feb 2011 | A1 |
20140329439 | Chew | Nov 2014 | A1 |
20140350354 | Stenzler | Nov 2014 | A1 |
20150285927 | Nedilko | Oct 2015 | A1 |
20150305687 | Schmidt | Oct 2015 | A1 |
20150309196 | Yang | Oct 2015 | A1 |
Number | Date | Country |
---|---|---|
101996479 | Mar 2011 | CN |
2008-093742 | Apr 2008 | JP |
2010-093058 | Apr 2010 | JP |
WO 2010-004516 | Apr 2010 | WO |
Entry |
---|
Korean Office Action of Korean Application No. 10-2011-0110755, dated Oct. 19, 2012, with translation, 9 pages. |
Number | Date | Country | |
---|---|---|---|
20130044004 A1 | Feb 2013 | US |