Claims
- 1. In a data processing system having a cache memory and a translation lookaside buffer, a method comprising the steps of:receiving a logical address and permission information associated with a memory access operation; accessing the cache memory, and determining if there is a match between the logical address of the memory access operation and logical address information stored in the cache memory; if there is a match between the logical address of the memory access operation and logical address information of the cache memory and if the memory access operation is not permitted based on a comparison of the permission information associated with the memory access operation and permission information of the cache memory, then accessing the translation lookaside buffer based on the logical address; if there is a match between the logical address of the memory access operation and logical address information of the translation lookaside buffer and if the memory access operation is permitted by permission information of the translation lookaside buffer, then updating the permission information of the cache memory based on the permission information of the translation lookaside buffer.
- 2. The method of claim 1, further comprising the step of storing in the translation lookaside buffer permission information that indicates that writing to a particular logical address is not permitted, wherein a memory access operation for the particular logical address causes a protection exception.
- 3. The method of claim 2, wherein the particular logical address corresponds to a page of memory that has been initially designated as read only.
- 4. The method of claim 3, wherein an exception handler executed in response to the protection exception updates permission information corresponding to the page of memory to be read/write.
- 5. The method of claim 4, wherein software detects a first write operation to the page of memory.
- 6. The method of claim 5, wherein the software comprises an operating system.
- 7. The method of claim 1, wherein the memory access operation is completed after updating of the permission information of the cache memory.
- 8. The method of claim 1, wherein the memory access operation is completed without performing a permission violation operation.
Parent Case Info
This application is a continuation of U.S. patent application Ser. No. 09/410,506, filed Oct. 1, 1999, now U.S. Patent No. 6,412,043.
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Continuations (1)
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Number |
Date |
Country |
Parent |
09/410506 |
Oct 1999 |
US |
Child |
10/166503 |
|
US |