Patent Application
20200343116
The present invention relates to the field of semiconductor fabrication control. More particularly, the invention relates to a system for inspecting semiconductor fabrication process tools, and specifically detecting occurrences and locations of defects in the process tools.
In the modern era, Integrated Circuit (IC) fabrication is undergoing a continuous downsizing. Due to the complexity of the ICs and precision requirements of the fabrication processes, the importance of tight process control is constantly growing. Today, engineers in manufacturing and fabrication facilities of VLSI devices put in vast amounts of time and resources for process control and defect reduction in the processes. A fabrication process typically comprises (and is referred to herein as) operations, measurement, and tools (but not limited to those) used during fabrication of semiconductor devices, e.g. Very Large Scale Integration (VLSI) fabrication.
A defect in electronic manufacturing is defined as an undesirable change in the physical properties (e.g. mass, size or figure), the electrical, optical and/or mechanical properties or features of a wafer undergoing a fabrication process at a specific location of a wafer and at a specific time during of the process. For instance, a deposit layer thickness of 15 nanometer, instead of 12 nanometer, is considered as a defect. Another exemplary defect is a particle-coming in contact with the wafer at a specific location and time. Such foreign particles may destroy the manufactured die (a small block of semiconducting material, on which a given functional circuit is fabricated), particularly when the fabricated die includes very high density of electronic devices. In such dense environment, even very small particles may destroy the manufactured die.
During the manufacturing process of a wafer, the wafer is coupled to a wafer support chuck using vacuum or electrostatic force. Normally, it is essential that the wafer will be uniformly coupled to the chuck in order to avoid deformation and to assure smooth and uniform contact between the wafer backside and the chuck. Such a uniform contact is important to accurately control the temperature of the wafer during different manufacturing stages and to assure a uniform focal plane for precise lithography on the wafer's up-side layers. Any deformation will deteriorate the uniformity of heat transfer between the wafer backside and the surface of the chuck, as well as the uniformity of the focal plane. In addition back side particles might harm some robotics pads vacuum and might cause the wafer to be slippery, due to loose vacuum. Also, back side particles and other machinery defects can create scratches and cracks which later might cause wafer breakage events, due to thermal shock and/or different types of mechanical vibrations.
During the manufacturing process, foreign particles may land on the backside of a wafer. In response to an applied coupling force, even a relatively small particle (in the order of 1 μm) may cause wafer deformation that will deteriorate the wafer production process.
Particles can be present in a process as result of, for instance, one of the following particles may fall from a showerhead or from the chamber walls, a leak from the atmosphere into the vacuum, vibrations during robot motion, or even mechanical contact with the wafer.
Several inspection methods for detecting and reducing defects are commonly used in the VLSI industry. For instance, some factories use external standalone metrology tools that measure the process impact on the production wafer or a test wafer, and measure defects characteristic and location. However, in spite of its popularity, this method is far from providing a full picture inasmuch as no information may be obtained regarding the time occurrence of defect formations while processed inside the specific processing tool or in between the various tools while the wafer is being transferred between the tools and inside/outside of them. Moreover, the defect may originate from the metrology tool itself.
Other inspection methods comprise integrating metrology systems into process tools, thereby detecting the creation of a defect near or on a wafer in real time. These systems have visibility only for a partial path of the wafer motion throughout the process tool, since at least part of the integrated metrology system is stationary and limited in following the wafer path.
Another common inspection method is using autonomous inspection wafers, which currently allow defect formation detection in real time, however lack the ability to provide defects location on the wafer.
U.S. Pat. No. 5,274,434 discloses particle inspection method and apparatus for preventing occurrence of large quantities of defects and for keeping a necessary yield. The inspection apparatus is made up in a small-sized apparatus and disposed at inlet/outlet of processing apparatuses of the production line or to a transfer system between the processing apparatuses. The inspection apparatus includes a monitor for real-time sampling foreign particles possible deposited on wafer which is being carried by the transfer system, thereby enabling simplification in construction of the production line and reduction of manufacturing cost. The inspection apparatus may comprise a refractive index changeable type lens array, a spatial filter and a pattern data elimination circuit, and makes possible to conduct foreign particle inspection on repetitively-patterned portions of the wafers during transfer. With the spatial filter for eliminating repetitive data of the repetition patterns the small-sized compact inspection apparatus is capable of real-time inspecting the foreign particles on the wafers at a high speed. However, the inspection apparatus is stationary and is not able to determine the timing of a deposited particle.
US 2014/0208850 discloses a semiconductor device defect detecting apparatus, which includes a sensor disposed on semiconductor process equipment. The sensor is configured to detect a signal emitted from a semiconductor device in contact with the semiconductor process equipment and a signal analyzer configured to determine whether the semiconductor device is defective based on the detected signal in a predetermined frequency range.
U.S. Pat. No. 6,966,235 discloses remote sensors for monitoring of process parameters on the surface, sub-surface, or surrounding environment of manufactured semiconductor substrates. The remote sensors are attached directly to the product material, allow for nonintrusive entry into the manufacturing area, via the same robotic handling or automated systems used to transport the standard product material. Data is recorded from the sensors, by wireless transmission, or when a signal is impassible, data is recorded in an on-board memory, which stores the data for later downloading. However, these remote sensors are directed to detect parameters such as die thickness, uniformity and are incapable of detecting foreign particles in size of few nanometers.
All existing methods fail to provide information about both the location and time of defect formations in general, and that of particle type of defect in particular. This information is obviously vital for an optimal fabrication process in at least two aspects:
It is therefore an object of the present invention to provide a system for detecting defect formations in semiconductor fabrication processes and the location and time thereof.
It is another object of the present invention to provide a system for detecting defect formations in semiconductor fabrication processes, which is mobile.
It is another object of the present invention to provide a system for detecting defect formations in semiconductor fabrication processes, which emulates a real wafer during manufacturing process.
It is a further object of the present invention to provide a system for detecting foreign particles becoming in contact with the backside of a wafer during semiconductor fabrication processes.
Other objects and advantages of the invention will become apparent as the description proceeds.
The present invention is directed to a system for the detection of defect occurrence and location in a fabrication (e.g., process, metrology, alignment or storage) tool, which comprises:
The system is adapted to detect presence of a particle in the fabrication process, which may be selected from the group of:
The inspection wafer may further comprise one or more transmitters configured to transmit signals such that the sensors are able to detect changes in one or more properties of the signals that occur as a result of a defect.
The inspection wafer may further comprise a logic device, a processing element and a memory device, wherein the logic device samples outputs of the sensors, the processing element processes the sampled sensor's output and stores the processed data on the memory device.
The inspection wafer may further comprise communication elements configured to transmit data to the remote computed station.
The sensors are selected from a list comprising:
The resistivity of the sensors may be measured according to Van Der Pauw resistivity method.
One or more of the sensors may comprise piezoelectric materials and piezoelectric components, or a dielectric waveguide in contact with a metallic layer or a metallic pattern suitable to generate a Plasmonic reaction.
One or more transmitters may be selected from a list comprising the following:
An object and/or a particle on a surface of the inspection wafer may be detected by back scatter technique.
The physical characteristics may be selected from the group of:
The system may further comprise a protective layer (made e.g., dielectric layer, etch stop later, etc.), for protecting a wafer from wafer-modifying processes.
The system may further comprise a docking station for:
The power supply may be selected from the group of:
The optical sensors may be selected from the group of:
The resonance wavelength may be affected by the presence of a defect.
The resonance wavelength may be detected by change of amplitude or phase in a wavelength-specific detector/transmitter.
The processing and memory resources may be reduced using a common receiver for multiple sensors cells array.
In one aspect, a minimal emittance signal is provided to the receiver under normal conditions, when there is no presence of a defect.
Minimal emittance may be achieved by a plasmonic/non-plasmonic grating structure on top of a wave-guide, to create destructive interferences of the plasmonic and/or photonic waves.
In the drawings:
Reference will now be made to an embodiment of the present invention, examples of which are illustrated in the accompanying figures for purposes of illustration only.
One skilled in the art will readily recognize from the following description that alternative embodiments of the structures and methods illustrated herein may be employed, mutatis mutandis, without departing from the principles of the claimed invention.
The present invention provides a system for inspecting a fabrication process during a full or partial wafer path from the carrier box to the tool and back to the carrier box or while the boxes are transferred between tools, due to particle-contamination inside the boxes. The system comprises an array of sensors integrated into a device (hereinafter an inspection wafer) by a semiconductor fabrication process (e.g. VLSI), the dimensions of which imitate those of a standard size wafer used in the semiconductor manufacturing process being inspected. The amount, density, type (affecting defect-material sensitivity and defect-size sensitivity) and distribution of sensors on an inspection wafer are defined by the process needs for a given operation (e.g. etch, ultrasonic clean, CMP etc.).
The sensors of the inspection wafer allow detection of a defect location across the wafer in addition to the location of defect formation along the path traveled by the wafer as it passes throughout the process. Furthermore the sensors allow detecting the time of a defect formation along the wafer path inside a desired process tool (for example: Chemical vapor deposition (CVD), Physical vapor deposition (PVD), Photolithography, Metrology tools etc.) thereby indicating the position inside the process tool responsible for defects formation by the tool. For example, the system can tell that a defect was created on the wafer center or edge through the buffer chamber. The outputs of the sensors are processed by processing elements, provided with the system, which determine if, where and when a defect occurred as well as provide defect characteristics (e.g. mass, physical size and/or shape, electrical conductivity, light transmission and/or reflection and/or scattering characteristics, electrical charge, electrical capacitance, etc.).
It is noted that although defect detection is demonstrated throughout the description by detection of a particle, the present invention isn't limited to detecting a specific defect, and can also be used for detecting, for instance scratches, an extra pattern or a missing pattern (used as an identifying signature of a specific fabrication tool).
According to an embodiment of the present invention, the inspection wafer can also inspect the fabrication process with the aid of an external processing unit that receives and processes the data collected by the inspection wafer for running further analyses in order to get high resolution and considerable information regarding the detected defects.
According to another embodiment of the present invention, a portion of the data processing is performed by processing elements integrated into the inspection wafer itself (e.g. by semiconductor fabrication). Use of integrated processing elements is suitable for filtering noise or unnecessary data from being sampled and stored on the memory device.
After inspection by the sensors throughout a fabrication process, possibly pre-processing them, and storing the sensors data, a computer software program (running on a processing unit such as a remote computed station) receives the sensors data (possibly after being processed as described above) as input and characterizes the defects in all abovementioned aspects. This may be achieved by comparing between the results of a single sensor or an array of sensors at different times. For example, a first measurement of a first group of sensors may be compared to a second measurement of the same group of sensors, i.e. at another time, or to a measurement of another group of sensors (either measured at the same time as the first measurement or at another time).
According to another embodiment of the present invention, the inspection wafer transmits (on wafer) pre-processed sensors data via wired/wireless communication (e.g. RF, Bluetooth etc.) to a processing unit such as a remote computed station where the data is collected on, for post-processing and analysis (outside the wafer). According to another embodiment of the invention, the remote station charges the portable wafer. According to another embodiment of the invention, the remote station is used for configuring various parameters of the inspection wafer (e.g. sensor illumination intensity, sensor sensitivity, degree of sensors binning, etc.).
The inspection wafer may comprise one or more types of sensors, wherein the sensor types are determined according to the inspection and detection requirements of a given process under inspection. For instance, an inspection wafer may comprise at least one of, or a combination of, the following:
The resistivity of the sensors can be measured based on Van Der Pauw resistivity method (a technique commonly used to measure the resistivity and the Hall coefficient of a sample of any arbitrary shape, so long as the sample is approximately two-dimensional, solid (no holes) and the electrodes are placed on its perimeter) or any other electrical resistivity method known in the art. According to an embodiment of the invention, the sensors comprise piezoelectric materials and piezoelectric components, e.g. Quartz Crystal micro balance.
According to another embodiment of the invention, one or more sensors comprise a dielectric waveguide covered by a metallic layer or a metallic pattern suitable to generate a Plasmonic excitation and/or plasmon-polariton excitation. Plasmonic sensors are well known in the art, and an exemplary description and implementation can be found in Nanostructured Plasmonic Sensors by Matthew E. Stewart et. al, Department of Chemistry, University of Illinois at Urbana-Champaign, Urbana, Ill. 61801, Department of Materials Science and Engineering, University of Illinois at Urbana-Champaign, Urbana, Ill. 61801, and Chemistry Division and Center for Nanoscale Materials, Argonne National Laboratory, Argonne, Ill. 60439. When a Plasmon wave interacts with an airborne particle the output of the wave guide changes. This can be detected using an electro-optical device such as a photo diode or a spectrometer.
According an embodiment of the present invention, the detection layer of the inspection wafer includes Micro-Electro-Mechanical devices (MEMs) array and/or capacitors micro machined ultrasonic transducers and/or oscillator device which can measure energy or mass changes. According to still another embodiment, the arrays of sensors comprise pressure and/or temperature sensors.
According to an embodiment of the invention, the transmitter 103 comprises electron beam sources, ultrasonic sources, light emitting devices in various wavelengths, e.g. LED or laser diode, or any other component capable of producing a signal whose properties are affected by the presence of a particle 107. The transmitted signal will transmit through a protection layer 104 that comprises dielectric or another material that allows transmitting towards a defect or particles 107 on the top of the surface. The particle 107 on top of layer 104 will scatter the signal back to the sensors 105. The protection layer 104 can be coated with anti-reflected layer or another optic layer. According to another embodiment of the invention, the array of sensors comprises different stacks of optical layers that impact the transmission, the reflection, the absorption and the phase of the emitted and reflective signals. An additional layer may be provided for protecting the sensors and detection layer. According to an embodiment of the invention, the transmitter (e.g. a LED or laser diode) is fabricated to the inspection wafer.
The inspection wafer further comprises at least one portable or stationary power source (e.g. one or more batteries, not shown in the figures), providing AC and/or DC electrical power to all electronic components and sensors and any other component on the inspection wafer requiring electrical power for their operation. According to an embodiment of the invention, the power source comprises capacitors or super-capacitors that are fabricated to the inspection wafer.
The inspection wafer further comprises a time based circuit suitable to sample the output signal from the sensors, in addition to an analog to digital convertor for converting the sampled analog signal to a digital representation thereof for allowing computer processing of the signal.
According to an embodiment of the present invention, a back scatter technique is used for detecting objects and/or particles on the surface of a substrate/wafer and/or on the surface of a deposit layer of a substrate/wafer.
According to an embodiment of the present invention, a back scattered technique is used for detecting defects in VLSI fabrication processes.
The inspection wafer system 300 also comprises a sensors layer 302, which consists of collectors and emitters, to allow the detection of defects.
The inspection wafer system 300 also comprises a feeding and receiving module 303, to allow power feeding and/or the transmission of signals into the sensors. The feeding and receiving module 303 also comprises a readout circuit, to read out the signals from the sensors layer. An Isolation layer 104 isolates the microprocessors from electronic noise. Logic, computing and memory devices layer 305 is used to store and to compute the signals from the readout circuits.
The inspection wafer system 300 also comprises a power source 306 to supply power to the sensors layer 302, to the readout circuits, to the Logic, computing and memory devices layer 305 and to all other power consumption components that may be required.
An external computing station 307 is used to charge the power source 306, to perform additional computations from the data which was stored or transmitted during the wafer path inspection, to configure the inspection plan for the inspection wafer system 300 (i.e., to determine which sensors to use, to determine the sampling rate at each location and/or at each time, to determine the emitter power, etc.).
Antenna 308 is embedded to allow the inspection wafer 300 to autonomously communicate with external communication devices (such as external computing station 307).
Accordingly, one or more transmitters and a plurality of sensors are provided on a single plane or, in other embodiments of the invention, on a different plane. The sensors allow detecting the coordinate of a defect or a particle. The detection is output from the inspection wafer through readout circuits. The amount and type of sensors and transmitters, in addition to the configuration and density thereof are defined by the process needs and the given operation.
The mount of readings may be further reduced using a multi-layer hierarchy, as shown in
Another possible solution to reduce processing and memory resources is to use a common receiver for multiple sensors cells array. In this case, a minimal signal will be provided to the receiver under normal conditions (when there is no presence of a defect). For example, in order to reduce the number of readouts and the computing power, a surface Plasmon resonance sensor arrays may be used to transmit minimal emittance, as long as there is no particle on top of is active area, by using one collector (receiver) for multiple sensors which are at the same adjacent area.
Minimal emittance can be achieved by a plasmonic grating (or non-plasmonic) structure on top of a wave-guide to create destructive interferences (base on Brag condition for destructive interference) of the plasmonic and/or photonic waves at the output of the waveguide or at the output of a photonic and/or plasmonic crystal.
This entire structure might be fabricated as a monolithic or a hybrid solution with the system. Minimal output signal mode can also be achieved using MOS types inverters at the output of the sensor.
The proposed multi-level hierarchy can be applied directly at the Silicon level by VLSI design and manufacturing.
The inspection wafer system proposed by the present invention is also capable of detecting particles that landed on the backside of a wafer and may deteriorate the wafer production process.
According to a first implementation, the added layers may be similar to the up-side layers using similar detection technology at the bottom of the Mobile Inspection System (MIS). According to another implementation, the added layers may be different from the up-side layers and may use different detection technology at the bottom of the Mobile Inspection System (MIS). Both implementations allow detecting particles or defects in both sides (front side and back side).
Particles detected according to the implementations illustrated in
Although embodiments of the invention have been described by way of illustration, it will be understood that the invention may be carried out with many variations, modifications, and adaptations, without exceeding the scope of the claims.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/IL2017/051153 | 10/19/2017 | WO | 00 |
| Number | Date | Country | |
|---|---|---|---|
| 62411541 | Oct 2016 | US |
