1. Field of the Invention
Embodiments of the present invention generally relate to a method and apparatus for processing substrates, such as solar panel substrates, flat panel substrates, or semiconductor substrates, using plasma. More particularly, embodiments of the present invention relate to a radio frequency (RF) current return path for a plasma processing chamber.
2. Description of the Related Art
Plasma enhanced chemical vapor deposition (PECVD) is generally employed to deposit thin films on substrates, such as semiconductor substrates, solar panel substrates, and liquid crystal display (LCD) substrates. Plasma enhanced chemical vapor deposition is generally accomplished by introducing a precursor gas into a vacuum chamber having a substrate disposed on a substrate support. The precursor gas is typically directed through a distribution plate situated near the top of the vacuum chamber. The precursor gas in the vacuum chamber is energized (e.g., excited) into a plasma by applying an RF power to the chamber from one or more RF sources coupled to the chamber. The excited gas reacts to form a layer of material on a surface of a substrate that is positioned on a temperature controlled substrate support. The distribution plate is generally connected to a RF power source and the substrate support is typically connected to the chamber body providing a RF current returning path.
Uniformity is generally desired in the thin films deposited using PECVD process. For example, an amorphous silicon film, such as microcrystalline silicon film or microcrystalline silicon film, or a polycrystalline silicon film is usually deposited using PECVD on a flat panel for forming p-n junctions required in transistors or solar cells. The quality and uniformity of the amorphous silicon film or polycrystalline silicon film are important for commercial operation. Therefore, there is a need for PECVD chambers with improved uniformity.
Embodiments of the present invention generally relate to a method and apparatus for plasma processing a substrate. More particularly, embodiments of the present invention provide a plasma processing chamber having RF returning straps straps configured to improve uniformity.
One embodiment of the present invention provides a method for processing a substrate using plasma comprising providing a process chamber defining a processing volume, wherein a substrate support is disposed in the processing volume, a gas distribution plate connected with a radio frequency (RF) power source is disposed over the substrate support, and a periphery of the substrate support is connected with the RF power source via a plurality of RF returning straps, flowing one or more processing gases to the processing volume through the distribution plate, and applying a radio frequency power to the gas distribution plate to generate a plasma from the one or more processing gases in the processing volume, wherein impedance of one or more RF returning straps has been modified to adjust local plasma distribution between the gas distribution plate and the substrate.
Another embodiment of the present invention provides an apparatus for processing a substrate comprising a chamber body defining a processing volume, wherein the chamber body has a slit valve opening configured to allow passages of substrates, a substrate support disposed in the processing volume, wherein the substrate support is configured to receive a substrate on a supporting surface and to support the substrate during processing, a gas distribution plate disposed in the processing volume and above the substrate support, wherein the gas distribution plate is configured to deliver one or more processing gas, a radio frequency power source connected with the gas distribution plate, and a plurality of RF returning straps connected between a periphery of the substrate support and the RF power source, wherein the plurality of RF returning straps is disposed such that impedance between the substrate support and the RF power source varies along the periphery of the substrate support.
Yet another embodiment of the present invention provides an apparatus for processing a substrate comprising a chamber body defining a processing volume, a first electrode disposed in the processing volume, a second electrode disposed in the processing volume, wherein the second electrode is opposing the first electrode and the first and second electrodes form a plasma volume therebetween, a radio frequency power source coupled to the first electrode, and a plurality of RF returning straps coupled between the second electrode and a body at a predetermined electrical potential, wherein the plurality of RF returning straps are coupled to a periphery of the second electrode, and impedance of the plurality of RF returning straps varies along the periphery of the second electrode.
So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
To facilitate understanding, identical reference numerals have been used, wherever possible, to designate identical elements that are common to the figures. It is contemplated that elements and/or process steps of one embodiment may be beneficially incorporated in other embodiments without additional recitation.
Embodiments of the present invention generally relates to a method and apparatus for processing substrates using plasma. More particularly, embodiments of the present invention provide a plasma processing chamber having an electrode coupled to a plurality of RF returning straps, wherein impedance of the RF returning straps are set and/or adjusted to tune the plasma distribution during processing. In one embodiment, impedance of RF returning straps varies by changing length of the RF returning straps, by changing width of the RF returning straps, by changing spacing of the RF returning straps, by changing location of the RF returning straps, by adding a variable capacitor to the RF returning straps, or by combinations thereof.
Embodiments of the present invention are generally utilized in processing rectangular substrates, such as substrates for liquid crystal displays or flat panels, and substrates for solar panels. Other suitable substrates may be circular, such as semiconductor substrates. The present invention may be utilized for processing substrates of any size or shape. However, the present invention provides particular advantage in sizes 15K (about 15,600 cm2), 25K (about 27,750 cm2), and above, more preferably 40K (about 41,140 cm2) and above, for example 50K, 55K, and 60K, due to the increased RF returning required for larger susceptors.
Although the invention is illustratively described, shown and practiced within a large area substrate processing system, the invention may find utility in other plasma processing systems, including those from other manufacturers where it is desirable to ensure that one or more RF returning paths remain functioning at a level that facilitates acceptable processing within the system. Other exemplary processing systems on which the invention may be practiced include the CENTURA ULTIMA HDP-CVD™ system, the PRODUCER APF PECVD™ system, the PRODUCER BLACK DIAMOND™ system, the PRODUCER BLOK PECVD™ system, the PRODUCER DARC PECVD™ system, the PRODUCER HARP™ system, the PRODUCER PECVD™ system, the PRODUCER STRESS NITRIDE PECVD™ system, and the PRODUCER TEOS FSG PECVD™ system, all of which are available from Applied Materials, Inc. of Santa Clara, Calif.
Embodiments of the present invention may be used to form numerous different types of films that can be used to form a thin-film solar cell, such as an exemplary cross sectional view of a silicon-based thin film photovoltaic (PV) solar cell 900 shown in
In operation, incident light 922 provided by the environment, e.g, sunlight or other photons, is supplied to the PV solar cell 900. The photoelectric conversion unit 914 in the PV solar cell 900 absorbs the light energy and converts the light energy into electrical energy within p-i-n junction(s) formed in the photoelectric conversion unit 914, thereby generating electricity or energy. Alternatively, the PV solar cell 900 may be fabricated or deposited in a reversed order, or may comprise two or more photoelectric conversion units stacked together and separated by transparent conducting oxide layers.
The substrate 940 may be thin sheet of metal, plastic, organic material, silicon, glass, quartz, or polymer, among others suitable materials. The substrate 940 may have a surface area greater than about 1 square meters, such as greater than about 2 square meters. An optional dielectric layer (not shown) may be disposed between the substrate 940 and a transparent conducting oxide (TCO) layer 902. In one embodiment, the optional dielectric layer may be a SiON or silicon oxide (SiO2) layer.
The transparent conducting oxide (TCO) layers 902, 910 may include, but not limited to, at least one oxide layer selected from a group consisting of tin oxide (SnO2), indium tin oxide (ITO), zinc oxide (ZnO), or the combination thereof. The TCO layer 902 may be deposited by a CVD process, a PVD process, or other suitable deposition process.
The conductive layer 912 may include, but not limited to, a metal layer selected from a group consisting of Ti, Cr, Al, Ag, Au, Cu, Pt, or an alloy of the combination thereof.
The photoelectric conversion unit 914 comprises a p-type semiconductor layer 904, an n-type semiconductor layer 908, and an intrinsic type (i-type) semiconductor layer 906. The i-type semiconductor layer 906 is also known as the bulk layer functioning as a photoelectric conversion layer generating electron-hole pairs from incident light energy. An intrinsic semiconductor is distinguished from an extrinsic semiconductor by the addition of dopant atoms in the extrinsic semiconductor. The extrinsic semiconductor layers, such as the p-type semiconductor layer 904 and the n-type semiconductor layer 908, are used to collecting electrons or holes generated by the intrinsic semiconductor in solar cells.
An intrinsic semiconductor layer may be formed by providing a gas mixture comprising a source of the semiconductor material to be formed. For example, intrinsic silicon layer may be formed by providing a gas mixture comprising silane and hydrogen gas to a processing chamber. Silicon and other semiconductors formed from the gas mixture may have varying degrees of crystallinity depending on processing parameters.
Materials in which atoms have essentially no arranged definite pattern, or crystallinity, are referred to as being amorphous. A completely crystalline material is referred to as crystalline, polycrystalline, or monocrystalline material. A polycrystalline material is crystalline material formed into numerous crystal grains separated by grain boundaries. Monocrystalline materials are single crystal materials.
Semiconductor solids having partial crystallinity, that is a crystal fraction between about 5% and about 95%, are referred to as nanocrystalline or microcrystalline, generally referring to the size of crystal grains suspended in an amorphous phase.
Nanocrystalline silicon, frequently called microcrystalline silicon, is paracrystalline having short- or medium-range ordering, and consists of a mixture of two phases—small crystalline grains embedded in an amorphous matrix. Nanocrystalline and microcrystalline are sometimes distinguished by the size of the crystal grains (or crystallites). However, most paracrystalline silicon with grains extending into the micrometer range is actually fine-grained polysilicon having no amorphous matrix between the crystals, so the term “nanocrystalline” is considered by some to be a better choice of terminology than “microcrystalline” when referring to two-phase paracrystalline silicon.
Another approach from the late 1990s was to similarly define microcrystalline silicon as having two phases, i.e. crystal grains in an amorphous matrix, but limited to crystal grains of <20 nm feature size. In contrast, polysilicon was defined as being a single-phase crystalline material with no amorphous matrix between the crystals in which the smallest crystal dimension was >20 nm.
It should be noted that the term “crystalline silicon/semiconductor” may refer to any form of silicon/semiconductor having a crystal phase, including microcrystalline and nanocrystalline silicon/semiconductor.
Crystallinity of an intrinsic semiconductor layer influences light-absorbing characteristics of the intrinsic semiconductor layer. For example, an amorphous semiconductor layer will generally absorb light at different wavelengths from intrinsic layers having different degrees of crystallinity, such as microcrystalline silicon. For this reason, most solar cells will use both amorphous and microcrystalline/nanocrystalline layers to yield the broadest possible light absorption characteristics. An intrinsic semiconductor layer can be formed by depositing multiple microcrystalline semiconductor layers to achieve a desired nominal crystal fraction, a film having a graded crystalline fraction, or a varying crystalline fraction throughout the layer.
The p-type and n-type semiconductor layers 904, 908 may be silicon based materials doped by an element selected either from group III or V. A silicon film doped with a group III element (e.g., boron (B)) is referred to as a p-type silicon film, while a silicon film doped with a group V element (e.g., phosphorous (P)) is referred to as a n-type silicon film. In one embodiment, the n-type semiconductor layer 908 may be a phosphorus doped silicon film and the p-type semiconductor layer 904 may be a boron doped silicon film.
The doped silicon film may be an amorphous silicon film (a-Si), a polycrystalline film (poly-Si), or a microcrystalline film (μc-Si) with a thickness generally between about 5 nm and about 50 nm. Alternatively, the doped element in semiconductor layer 904, 908 may be selected to meet device requirements of the PV solar cell 900. The n-type and p-type semiconductor layers 908, 904 may be deposited using processing chambers in accordance with embodiments of the present invention.
The plasma processing system 100 may be configured to deposit a variety of materials on the large area substrates 101, including but not limited to dielectric materials (e.g., SiO2, SiOxNy, derivatives thereof or combinations thereof), semiconductive materials (e.g., Si and dopants thereof), barrier materials (e.g., SiNx, SiOxNy or derivatives thereof). Specific examples of dielectric materials and semiconductive materials that are formed or deposited by the plasma processing system 100 onto the large area substrates may include epitaxial silicon, polycrystalline silicon, amorphous silicon, microcrystalline silicon, silicon germanium, germanium, silicon dioxide, silicon oxynitride, silicon nitride, dopants thereof (e.g., B, P, or As), derivatives thereof or combinations thereof. The plasma processing system 100 is also configured to receive gases such as argon, hydrogen, nitrogen, helium, or combinations thereof, for use as a purge gas or a carrier gas (e.g., Ar, H2, N2, He, derivatives thereof, or combinations thereof). One example of depositing silicon thin films on the large area substrate 101 using the system 100 may be accomplished by using silane as the precursor gas in a hydrogen carrier gas.
Examples of various devices and methods of depositing thin films on a large area substrate using the system 100 may be found in U.S. patent application Ser. No. 11/021,416, filed Nov. 17, 2005, published as U.S. 2005-0255257, entitled “Method Of Controlling The Film Properties Of PECVD-Deposited Thin Films,” and U.S. patent application Ser. No. 11/173,210, filed Jul. 1, 2005, published as U.S. 2006-0228496, entitled “Plasma Uniformity Control By Gas Diffuser Curvature,” which are both incorporated by reference herein to the extent the applications are not inconsistent with this specification. Other examples of various devices that may be formed using the system 100 may be found in U.S. patent application Ser. No. 10/889,683, filed Jul. 12, 2004, published as U.S. 2005-0251990, entitled “Plasma Uniformity Control by Gas Diffuser Hole Design,” and in U.S. Pat. No. 7,125,758, issued Oct. 24, 2006, entitled “Controlling the Properties and Uniformity of a Silicon Nitride Film by Controlling the Film Forming Precursors,” both of which are incorporated by reference herein to the extent not inconsistent with this specification.
As shown in
In one embodiment, the showerhead assembly 103 comprises a gas distribution plate 131 and a blocker plate 132. A gas volume 133 is formed between the gas distribution plate 131 and the blocker plate 132. The gas source 107 is connected to the gas volume 133 via a gas supplying conduit 134.
The gas distribution plate 131, the blocker plate 132, and the gas supplying conduit 134 are generally formed from electrically conductive materials and are in electrical communication with one another. The chamber body 102 is also formed from an electrically conductive material. The chamber body 102 is generally electrically insulated from the showerhead assembly 103. In one embodiment, the showerhead assembly 103 is mounted on the chamber body 102 via an insulator 135.
In one embodiment, the substrate support 104 is also electrically conductive, and the substrate support 104 and the showerhead assembly 103 are configured to be opposing electrodes for generating plasma therebetween.
An RF power source 105 is generally used to generate a plasma between the showerhead assembly 103 and the substrate support 104. In one embodiment, the RF power source 105 is coupled to the showerhead 103 via a first output 106a of an impedance matching circuit 106. A second output 106b of the impedance matching circuit 106 is electrically connected to the chamber body 102.
In one embodiment, a plurality of RF returning straps 109 are electrically connected between the substrate support 104 and the chamber body 102. The plurality of RF returning straps 109 are configured to shorten the path for RF current during processing, and to adjust plasma uniformity near an edge area of the substrate support 104.
The path of the RF current is schematically illustrated by arrows in
Referring back
In one embodiment of the present invention, plasma distribution within the processing volume 110 may be adjusted by adjusting one or more property of the one or more of the plurality of RF returning straps 109. In one embodiment, the property of the RF returning straps 109 may be adjusted by adjusting location of the RF returning straps 109, adjusting width of the RF returning straps 100, adjusting length of the RF returning straps 109, adjusting spacing between neighboring RF returning straps 109, adding a variable or fixed capacitor, or combinations thereof.
The plasma processing chamber 200 comprises a chamber bottom 201, sidewalls 202, and a lid assembly 203. The chamber bottom 201, sidewalls 202, and the lid assembly 203 define a processing volume 206. A substrate support assembly 204 is disposed in the processing volume 206. An opening 207 is formed through one side of the sidewalls 202. The opening 207 is configured to allow passages of substrate 208. A slit valve 205 is coupled to the sidewall 202 and configured to close the opening 207 during processing.
The lid assembly 203 is supported by the sidewalls 202 and can be removed to service the interior of the plasma processing chamber 200. The lid assembly 203 comprises an outer lid 242, a lid cover plate 243, a blocker plate 209, a distribution plate 210, a gas conduit 241, and an isolator 213.
The blocker plate 209 and the distribution plate 210 are disposed substantially parallel to each other forming a gas distribution volume 214 therebetween. The blocker plate 209 and distribution plate 210 are configured to distribute a processing gas to the processing volume 206. The blocker plate 209 and the distribution plate 210 are typically fabricated from aluminum. The isolator 213 is disposed on the sidewalls 202 and configured to electrically isolate the sidewalls 202 from the distribution plate 210 and the blocker plate 209. The lid cover plate 243 is supported by the outer lid 242, and electrically connected to the sidewalls 202.
An opening 212 is formed through the blocker plate 209 and is configured to connect the gas distribution volume 214 via the gas conduit 241 to a gas source (not shown). The distribution plate 210 has a perforated area near a center section. A plurality of holes 211 are formed through the distribution plate 210 and provide fluid communication between the gas distribution volume 214 and the processing volume 206. The perforated area of the distribution plate 210 is configured to provide a uniform distribution of gases passing through the distribution plate 210 into the processing volume 206.
The substrate support assembly 204 is centrally disposed within the processing volume 206 and supports the substrate 208 during processing. The substrate support assembly 204 generally comprises an electrically conductive support body 217 supported by a shaft 218 which extends through the chamber bottom 201. The support body 217 is generally polygonal in shape and covered with an electrically insulative coating over at least the portion of the support body 217 that supports the substrate 208. The insulative coating may also cover other portions of the support body 217. In one embodiment, the substrate support assembly 204 is normally coupled to a ground potential at least during processing.
The support body 217 may be fabricated from metals or other comparably electrically conductive materials, for example, aluminum. The insulative coating may be a dielectric material such as an oxide, silicon nitride, silicon dioxide, aluminum dioxide, tantalum pentoxide, silicon carbide or polyimide, among others, which may be applied by various deposition or coating processes, including, but not limited to, flame spraying, plasma spraying, high energy coating, chemical vapor deposition, spraying, adhesive film, sputtering and encapsulating.
In one embodiment, the support body 217 encapsulates at least one embedded heating element 219 configured to heat the substrate 208 during processing. In one embodiment, the support body 217 also comprises a thermocouple for temperature control. In one embodiment, the support body 217 may comprise one or more stiffening members comprised of metal, ceramic or other stiffening materials embedded therein.
The heating element 219, such as an electrode or resistive element, is coupled to a power source 220 and controllably heats the support assembly 204 and substrate 208 positioned thereon to a predetermined temperature. Typically, the heating element 219 maintains the substrate 208 at a uniform temperature of about 150 to at least about 460 degrees Celsius during processing. The heating element 219 is electrically floating relative to the support body 217.
The shaft 218 extends from the support body 217 through the chamber bottom 201 and couples the substrate support assembly 204 to a lift system 221. The lift system 221 moves the substrate support assembly 204 between an elevated processing position (as shown in
In one embodiment, the substrate support assembly 204 comprises a circumscribing shadow frame 222. The circumscribing shadow frame 222 is configured to prevent deposition or other processing on edges of the substrate 208 and the support body 217 during processing. The circumscribing shadow frame 222 rests on the substrate 208 and the support body 217 when the substrate support assembly 204 is in an elevated processing position, as shown in
In one embodiment, the support body 217 has a plurality of pin holders 225 disposed therethrough configured to direct a plurality of lifting pins 224. Each pin holder 225 has a through hole 226 formed therein. The through hole 226 opens to an upper surface of the support body 217. Each pin holder 225 is configured to receive one lifting pin 224 from a lower opening of the through hole 226. Each lifting pin 224 extends upward from a recess 227 formed in the chamber bottom 201. As the support body 217 lowers along with the plurality of pin holders 225, the plurality of lifting pins 224 poke through the through holes 226 picking up the substrate 208. The substrate 208 is then separated from the support body 217 allowing a substrate handler to transfer the substrate 208 out of the plasma processing chamber 200.
The plurality of lifting pins 224 are typically comprised of ceramic or anodized aluminum. In one embodiment, the plurality of lifting pins 224 may have various lengths so that they come into contact with the substrate 208 at different times. For example, the lifting pins 224 that are spaced around the outer edges of the substrate 208 are taller than the lifting pins 224 spaced inwardly from the outer edges toward the center of the substrate 224, allowing the substrate 208 to be first lifted from its outer edges relative to its center.
An RF power source 215 is used to generate plasma in the processing volume 206. In one embodiment, an impedance matching circuit 216 is coupled to the RF power source 215. A first output 216a of the impedance matching circuit 216 is connected with the gas distribution plate 210, and a second output 216b of the impedance matching circuit 216 is connected with the substrate support assembly 204, thus, applying a RF power between the processing gas disposed between the gas distribution plate 210 and the substrate support assembly 204 and generating and sustaining a plasma for processing the substrate 208 on the substrate support assembly 204.
In one embodiment, the first output 216a of the impedance matching circuit 216 is connected with the distribution plate 210 via the gas conduit 241 and the blocker plate 209. In one embodiment, the second output 216b is coupled to the chamber body, e.g. the sidewalls 202, or the lid cover plate 243.
In one embodiment, a plurality of RF returning straps 228 are connected between the support body 217 of the substrate support assembly 204 to the chamber bottom 201 which is connected to the second output 216b of the impedance matching circuit 216. The plurality of RF returning straps 228 provide an RF current return path between the support body 217 and the chamber bottom 201.
In one embodiment, the plurality of RF returning straps 228 are unevenly distributed along each edge of the support body 217 with varying spacing between neighboring RF returning straps 228. In one embodiment, the plurality of RF returning straps 228 are distributed asymmetrically reflecting asymmetric feature of the chamber geometry, and/or asymmetric features of gas flow distribution. In one embodiment, no RF returning straps 228 are disposed near corners of the support body 217.
In another embodiment, each of the plurality RF returning straps 228 has different electrical property depending on location of each RF returning strap 228. In one embodiment, at least one of the plurality of RF returning straps 228 has adjustable electrical properties. In one embodiment, the adjustable electrical property is impedance of the RF returning strap 228.
In one embodiment, the RF returning strap 228 has a first end 238 and a second end 239. The first end 238 has a mounting slot 233 and the second end 233 has a mounting slot 234. In one embodiment, the RF returning strap 228 has a central slot 237 configured to increase the flexibility of the RF returning strap 228.
The connection assemblies 229, 230 each comprise low impedance conductive materials that are resistant to processing and cleaning chemistries. In one embodiment, the connection assemblies 229, 230 comprise aluminum. Alternatively, the materials may comprise titanium, stainless steel, beryllium copper or any material that is coated with a conductive metallic coating. In another embodiment, the connection assembly 229 comprises a first conductive material and the connection assembly 230 comprises a second conductive material, wherein the first conductive material and the second conductive material are different materials.
Embodiments of different RF returning straps may be found in U.S. patent application Ser. No. 11/775.359 (Attorney Docket No. 12004), filed Jul. 10, 2007, entitled “Asymmetric Grounding of Rectangular Susceptor”, published as United States Patent Application Publication 2008/0274297, which are incorporated herein by reference.
In one embodiment, electrical properties of the RF returning straps 228 are adjusted to tune local plasma distribution. In one embodiment, electrical properties of the RF returning straps 228 can be adjusted to improve uniformity of the plasma formed between the distribution plate 210 and the support body 204.
In one embodiment, impedance of each RF returning straps 228 can be changed to adjust local plasma distribution. In one embodiment, local plasma distribution near a RF returning strap 228 may be increased by reducing impedance of the RF returning strap 228, and local plasma distribution near the RF returning strap 228 may be decreased by increasing the impedance of the RF returning strap 228.
In another embodiment, plasma distribution in the plasma processing chamber 200 can be adjusted by adjusting location, and/or spacing of the plurality of RF returning straps 228.
The electrical properties of each RF returning strap 228 may be adjusted by varying length of the RF returning strap 228, varying width of the RF returning strap 228, serially or parallelly connecting a variable capacitor to the RF returning strap 228, adjusting spacing of the neighboring RF returning straps, or combinations thereof.
The arrangements of
As shown in
While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
This application claims priority to U.S. Provisional Patent Application Ser. No. 61/119,609 (attorney docket No. 13608L), filed Dec. 3, 2008, which is incorporated herein by reference.
Number | Date | Country | |
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61119609 | Dec 2008 | US |