BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic cross-sectional view showing a conventional multi-layer circuit board.
FIG. 2
a is a schematic cross-sectional view showing another conventional multi-layer circuit board.
FIG. 2
b is a schematic diagram showing the multi-layer circuit board along the sectioning line 2b-2b in FIG. 2a.
FIG. 3 is a schematic cross-sectional view showing another conventional multi-layer circuit board.
FIG. 4 is a schematic diagram showing the multi-layer circuit board according to the first embodiment of the present invention.
FIG. 5 is a magnified cross-sectional view showing the multi-layer circuit board along the sectioning line 5-5 in FIG. 4.
FIG. 6 is a schematic diagram showing the multi-layer circuit board according to the second embodiment of the present invention.
FIG. 7 is a magnified cross-sectional view showing the multi-layer circuit board along the sectioning line 7-7 in FIG. 6.