Claims
- 1. A multivalued memory comprising:
- a plurality of multivalued signal sources for generating signals respectively having different levels respectively representing a plurality of logic values of more than three different values of applied multivalued logic;
- a plurality of signal lines connected to respective ones of said signal sources;
- a plurality of address lines; and
- a node memory array wherein each of said address lines is programmably and directly connected to any one of said signal lines at a node.
- 2. The multivalued memory according to claim 1, wherein said multivalued signal sources are current sources.
- 3. The multivalued memory according to claim 1, wherein said multivalued signal sources are voltage sources.
- 4. The multivalued memory according to claim 1, further comprising selecting means for selecting at least one of said address lines.
Priority Claims (5)
Number |
Date |
Country |
Kind |
61-45464 |
Mar 1986 |
JPX |
|
61-45465 |
Mar 1986 |
JPX |
|
61-45466 |
Mar 1986 |
JPX |
|
61-45469 |
Mar 1986 |
JPX |
|
61-45470 |
Mar 1986 |
JPX |
|
Parent Case Info
This application is a continuation of application Ser. No. 07/436,761, filed Nov. 15, 1989, abandoned, which is a division of application Ser. No. 07/021,005, filed Mar. 2, 1987, issued as U.S. Pat. No. 4,914,614.
US Referenced Citations (6)
Foreign Referenced Citations (1)
Number |
Date |
Country |
WO8202976 |
Sep 1982 |
WOX |
Non-Patent Literature Citations (1)
Entry |
Giuliani et al., "Bipolar Read Only Memory With Three State Cells", IBM Technical Disclosure Bulletin vol. 26, #6 pp. 2742-2744, Nov. 1983. |
Divisions (1)
|
Number |
Date |
Country |
Parent |
21005 |
Mar 1987 |
|
Continuations (1)
|
Number |
Date |
Country |
Parent |
436761 |
Nov 1989 |
|