NANO IMPRINT MASTER AND METHOD OF MANUFACTURING THE SAME

Abstract
A nano imprint master and a method of manufacturing the same are provided. The method includes: implanting conductive metal ions into a substrate including quartz to form a conductive layer inside the quartz substrate; coating a resist on the quartz substrate in which the conductive layer is formed, to form a resist coating layer; exposing the resist coating layer to an electron beam to form micropatterns; etching the quartz substrate by using the resist coating layer, in which the micropatterns are formed, as a mask; and removing the resist coating layer to obtain a master in which micropatterns are formed.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings, in which:



FIGS. 1A-1C illustrate a related art nano imprint process;



FIG. 2 is a flowchart illustrating a related art method of manufacturing a nano imprint master;



FIGS. 3A-3F illustrate a method of manufacturing a nano imprint master according to an exemplary embodiment of the present invention;



FIGS. 4A-4C illustrate light transmittance when ultraviolet (UV) light is irradiated onto a quartz substrate according to an exemplary embodiment of the present invention;



FIG. 5 is a graph showing a change of light transmittance according to the thickness of a conductive layer when the conductive layer is formed inside a nano imprint master according to an exemplary embodiment of the present invention;



FIGS. 6A-6C illustrate a method of manufacturing a quartz substrate used in manufacturing a nano imprint master according to an exemplary embodiment of the present invention;



FIGS. 7A-7C illustrate a method of manufacturing a quartz substrate used in manufacturing a nano imprint master according to another exemplary embodiment of the present invention;



FIGS. 8A-8D illustrate methods of manufacturing a quartz substrate used in manufacturing a nano imprint master according to other exemplary embodiments of the present invention;



FIGS. 9A-9F illustrate a method of manufacturing a quartz substrate used in manufacturing a nano imprint master according to another exemplary embodiment of the present invention;



FIGS. 10A-10G illustrate a method of manufacturing a quartz substrate used in manufacturing a nano imprint master according to another exemplary embodiment of the present invention; and



FIGS. 11A-11G illustrate a method of manufacturing a quartz substrate used in manufacturing a nano imprint master according to another exemplary embodiment of the present invention.





DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

The present invention will now be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown.



FIGS. 3A-3F illustrate a method of manufacturing a nano imprint master according to an exemplary embodiment of the present invention.


Firstly, a quartz substrate 100 is prepared as shown in FIG. 3A.


Conductive metal ions are implanted into a top surface of the quartz substrate 100, thereby forming a conductive layer 110 inside the quartz substrate 100 as shown in FIG. 3B. In this case, the conductive layer 110 may be formed by implanting chromium ions, titanium ions, silver ions, gold ions, aluminum ions or platinum ions into the quartz substrate 100.


In ion implantation, a material to be doped is ionized and accelerated to increase a kinetic energy and the ionized material is forcibly injected into the surface of the quartz substrate 100 so that high-purity impurity implantation is possible and the uniformity of a doping concentration can be maintained.


This ion implantation is usefully applied to the case where ions are implanted to a comparatively shallow depth. When the conductive metal ions are implanted into the quartz substrate 100, the conductive layer 110 is formed to be close to the surface of the quartz substrate 100, as illustrated in FIG. 3B.


When the conductive layer 110 is formed inside the quartz substrate 100 in this way, electric charges that occur during electron beam lithography are grounded and can be effectively removed so that distortion of micropatterns due to the occurrence of electric charges can be prevented.


It is important to reduce the thickness of the conductive layer 110 when the conductive layer 110 is formed. This is because, when the thickness of the conductive layer 110 is very large, UV light transmittance is lowered, as described above, so that a polymer resin sticks to the nano imprint master during a nano imprint process and the nano imprint process cannot be successfully performed.


The thickness of the conductive layer 110 at which the nano imprint process can be successfully performed will now be described with reference to FIGS. 4A-4C and 5.



FIGS. 4A-4C illustrate light transmittance when UV light is irradiated onto the quartz substrate 100. When light transmittance of the pure quartz substrate 100 is about 96%, as illustrated in FIG. 4A and when a thick conductive layer 110 is formed inside the quartz substrate 100, as illustrated in FIG. 4B, light transmittance is rapidly lowered and reflectivity is increased. When a thin conductive layer 110 is formed inside the quartz substrate 100 to a thickness of 65 Å, as illustrated in FIG. 4C, light transmittance is about 90%. The relationship between light transmittance and the thickness of the conductive layer will now be described with reference to FIG. 5.



FIG. 5 is a graph showing a change of light transmittance according to the thickness of a conductive layer when the conductive layer is formed inside a nano imprint master according to an exemplary embodiment of the present invention.


In FIG. 5, the horizontal axis represents the thickness of a chromium conductive layer and the vertical axis represents light transmittance of a quartz substrate. UV light having a wavelength of 300 μm was used in this experiment considering that UV light is generally used in a nano imprint process.


Referring to FIG. 5, as the thickness of the chromium layer is increased to 0, 50, 60, and 100, respectively, light transmittance is lowered to 96, 93, 91, and 80, respectively.


Here, light transmittance must be maintained to be at least 80% or higher so that the quartz substrate 100 can be used as the nano imprint master. This light transmittance is achieved by forming a conductive layer to a thickness of less than a skin depth.


The skin depth can be calculated by equation (1) as below and is an eigen value according to metal.









δ
=


1


k



=


2
ωμσ







(
1
)







where, k is a propagation constant, ω (=27πf) is an angular frequency, μ is magnetic permeability (4π×10−7), and a is electrical conductivity. Thus, if metal ions to be implanted are specified in a specific frequency (or wavelength), the skin depth with respect to corresponding metal is determined, and if metal ions are implanted so that a conductive layer can be formed to a thickness of less than the determined skin depth, a nano imprint master having good UV light transmittance can be manufactured.


Subsequently, the method of manufacturing a nano imprint master will now be described with reference to FIGS. 3A-3F.


After the conductive layer 110 is formed inside the quartz substrate 100, the substrate 100 is coated with an electron beam resist, thereby forming a resist layer 120 as shown in FIG. 3C.


Next, after micropatterns are formed in the resist layer 120 using an electron beam exposure device as shown in FIG. 3D. The quartz substrate 100 is etched using the resist 120′, in which the micropatterns are formed, as a mask so that the micropatterns of the resist 120′ are transferred to the quartz substrate 100 as shown in FIG. 3E. In this case, the quartz substrate 100 may be etched by dry etching.


Last, when the resist 120′ in which the micropatterns are formed, is removed by stripping or ashing, a nano imprint master in which micropatterns are formed can be obtained as shown in FIG. 3F.


When the nano imprint master is manufactured using the above-described method, the metal conductive layer 110 is formed inside the quartz substrate 100 and does not need to be removed separately. Thus, the number of processes of manufacturing a nano imprint master can be reduced and time and costs required for manufacturing the nano imprint master can be greatly reduced.


Since it is not easy to implant conductive metal ions into a solid quartz substrate as illustrated in FIGS. 3A-3F, an oxide layer is deposited or grown on the quartz substrate and then the conductive metal ions are implanted into the oxide layer so that the conductive layer can be formed more easily, which will be described with reference to FIGS. 6A-6C and 7A-7C.



FIGS. 6A-6C and FIGS. 7A-7C illustrate methods of manufacturing a quartz substrate used in manufacturing a nano imprint master according to other exemplary embodiments of the present invention.


Referring to FIGS. 6A-6C, after the quartz substrate 200 is prepared as shown in FIG. 6A, silicon oxide (SiO2) is deposited or epitaxially grown on a top surface of the quartz substrate 200, thereby forming a silicon oxide layer 210 as shown in FIG. 6B, and thereafter, conductive metal ions are implanted into the silicon oxide layer 210, thereby forming a conductive layer 220 as shown in FIG. 6C.


Referring to FIGS. 7A-7C, silicon nitride (Si3N4) is deposited or epitaxially grown on a quartz substrate 300, thereby forming a silicon nitride layer 310 as shown in FIGS. 7A-7B, and then, conductive metal ions are implanted into the silicon nitride layer 310 by ion implantation, thereby forming a conductive layer 320 as shown in FIG. 7C.


The operation of applying a resist and forming micropatterns after forming the silicon oxide layer 210 or the silicon nitride layer 310 is the same as that of FIGS. 3A-3F. The thicknesses of the conductive layers 220 and 320 must also be maintained to be less than a skin depth in consideration of light transmittance. As compared with FIGS. 3A-3F, there is only a difference in that micropatterns are not formed in the quartz substrates 200 and 300 but are formed in oxide layers 210 and 310 or in both the oxide layers 210 and 310 and the conductive layers 220 and 320.



FIGS. 8A-8D illustrate methods of manufacturing a quartz substrate used in manufacturing a nano imprint master according to other exemplary embodiments of the present invention.


Referring to FIGS. 8A-8D, after the quartz substrate 400 is prepared (FIG. 8A), a conductive metal is deposited on a quartz substrate 400 through sputtering, thereby forming a conductive layer 410 (FIG. 8B). Even in this case, the thickness of the conductive layer 410 must be less than a skin depth in consideration of light transmittance.


The conductive layer 410 may be one of a chromium layer, a titanium layer, a silver layer, a gold layer, an aluminum layer, and a platinum layer.


Next, silicon oxide (SiO2) or silicon nitride (Si3N4) may be epitaxially grown or deposited on the conductive layer, thereby forming a silicon oxide layer 420 or a silicon nitride layer 430, as respectively shown in FIG. 8C and FIG. 8D.


The operation of applying a resist and forming micropatterns after the silicon oxide (SiO2) layer 420 or the silicon nitride (Si3N4) layer 430 is the same as that of FIGS. 3A-3F. There is only a difference between FIGS. 3A-3F and FIGS. 8A-8D in that micropatterns are not formed in the quartz substrate 400 but are formed in the silicon oxide layer 420 or the silicon nitride layer 430.


In the method of manufacturing a nano imprint master according to the exemplary embodiment of the present invention, the processes of removing a metal conductive layer and cleaning the surface of a quartz substrate after removing the metal conductive layer can be reduced so that the method of manufacturing a nano imprint master can be simplified.



FIGS. 9A-9F illustrate a method of manufacturing a quartz substrate used in manufacturing a nano imprint master according to another exemplary embodiment of the present invention.


Firstly, a master substrate 500 is prepared as shown in FIG. 9A. In this case, a material for the master substrate 500 may be quartz.


A polymer layer 505 is formed on a top surface of the master substrate 500 as shown in FIG. 9B. In this case, the polymer layer 505 may be formed of high elastic polymer such as polydimethylsiloxane (PDMS) and may be coated through spin coating or chemical vapor deposition (CVD). Uneven patterns are formed on the polymer layer 505 through a subsequent process, and the polymer layer 505 acts as a buffer layer during imprinting so that nano imprinting can be uniformly performed on a large scale.


Next, conductive metal ions are implanted into the polymer layer 505, thereby forming a conductive layer 510 inside the polymer layer 505 as shown in FIG. 9C. In this case, the conductive layer 510 may be formed by implanting chromium ions, titanium ions, silver ions, gold ions, aluminum ions or platinum ions into the polymer layer 505


In ion implantation, a material to be doped is ionized and accelerated to increase a kinetic energy and the ionized material is forcibly injected into the surface of the polymer layer 505 so that high-purity impurity implantation is possible and the uniformity of a doping concentration can be maintained.


This ion implantation is usefully applied to the case where ions are implanted to a comparatively shallow depth. When the conductive metal ions are implanted into the polymer layer 505, the conductive layer 510 is formed to be close to the surface of the polymer layer 505, as illustrated in FIG. 9C.


When the conductive layer 510 is formed inside the polymer layer 505 in this way, electric charges that occur during electron beam lithography are grounded and can be effectively removed so that distortion of micropatterns due to the occurrence of electric charges can be prevented.


It is important to reduce the thickness of the conductive layer 510 when the conductive layer 510 is formed. This is because, when the thickness of the conductive layer 510 is very large, UV light transmittance is lowered as described above so that a polymer resin is stuck to the nano imprint master during a nano imprint process and the nano imprint process cannot be successfully performed.


Transmittance of the nano imprint master with respect to UV light must be maintained to be at least 80% or higher. This light transmittance is achieved by forming the conductive layer 510 to a thickness of less than a skin depth. The skin depth can be calculated by the above-described equation (1).


After the conductive layer 510 is formed inside the polymer layer 505, an electron beam resist is coated, thereby forming a resist layer 520 as shown in FIG. 9D.


Next, after micropatterns are formed in the resist layer 520 using an electron beam exposure device as shown in FIG. 9E, the polymer layer 505 is etched using the resist 520′, in which the micropatterns are formed, as a mask so that the micropatterns of the resist 520′ are transferred to the polymer layer 505. In this case, the polymer layer 505 may be etched by dry etching.


Last, when the resist 520′ in which the micropatterns are formed, is removed by stripping or ashing, a nano imprint master having the polymer layer 505 in which the micropatterns are formed can be obtained as shown in FIG. 9F. Although not shown, an anti-sticking layer may also be formed on the polymer layer 505 in which the micropatterns are formed. The anti-sticking layer prevents the master (see 20 of FIG. 1A) and the imprinted substrate (see 10 of FIG. 1A) from sticking to each other for easy separation from each other during a nano imprint process. The anti-sticking layer may also be formed by depositing Teflon through CVD or by spin coating a self-assembly monolayer (SAM).


When manufacturing the nano imprint master using the above-described method, a uniform nano imprint master can be manufactured on a large scale during nano imprinting by introducing the polymer layer 505 acting as a buffer layer. In addition, the metal conductive layer 510 is formed inside the polymer layer 505 and does not need to be removed separately so that the number of processes of manufacturing a nano imprint master can be reduced and time and costs required for manufacturing the nano imprint master can be greatly reduced.



FIGS. 10A-10G illustrate a method of manufacturing a quartz substrate used in manufacturing a nano imprint master according to another exemplary embodiment of the present invention.


Referring to FIGS. 10A-10G, firstly, a master substrate 600 is prepared as shown in FIG. 10A. A polymer layer 605 is formed on a top surface of the substrate 600 as shown in FIG. 10B. Silicon oxide (SiO2) or silicon nitride (Si3N4) is deposited or epitaxially grown on a top surface of the polymer layer 605, thereby forming a silicon oxide layer 610 or a silicon nitride layer 615 as shown in FIG. 10C. Subsequently, conductive metal ions are implanted into the silicon oxide layer 610 by ion implantation, thereby forming a conductive layer 620 as shown in FIG. 10D. The thickness of the conductive layer 620 is maintained to be less than a skin depth in consideration of light transmittance.


Subsequent operations are similar to those of FIGS. 9A-9F. There is only a difference between FIGS. 9A-9F and FIGS. 10A-10G in that micropatterns are not formed in the polymer layer 605 but are formed in the silicon oxide layer 610 or the silicon nitride layer 615. Specifically, a resist layer 630 is formed by coating an electron beam resist as shown in FIG. 10E, micropatterns are formed in the resist layer 630 using an electron beam exposure device as shown in FIG. 10F, and then, the silicon oxide layer 610 or the silicon nitride layer 615 is etched using the resist 630′, in which the micropatterns are formed, as a mask so that the micropatterns of the resist 630′ are transferred to the silicon oxide layer 610 or the silicon nitride layer 615. Next, the resist 630′ in which micropatterns are formed, is removed by stripping or ashing and thus, a nano imprint master in which the micropatterns are formed can be obtained as shown in FIG. 10G. Although not shown, an anti-sticking layer may also be formed on the silicon oxide layer 610 or the silicon nitride layer 615.



FIGS. 11A-11G illustrate a method of manufacturing a quartz substrate used in manufacturing a nano imprint master according to another exemplary embodiment of the present invention.


Referring to FIGS. 11A-11G, firstly, a master substrate 700 is prepared as shown in FIG. 11A. A polymer layer 705 is formed on the substrate 700 as shown in FIG. 11B. A conductive layer 710 is formed on the polymer layer 705 by depositing a conductive metal on the polymer layer 705 through sputtering as shown in FIG. 11C. Even in this case, the thickness of the conductive layer 710 is maintained to be less than a skin depth in consideration of light transmittance.


The conductive metal used in forming the conductive layer 710 may be one of chromium, titanium, silver, gold, aluminum, and platinum.


Next, silicon oxide (SiO2) or silicon nitride (Si3N4) is epitaxially grown or deposited on the conductive layer 710, thereby forming a silicon oxide layer 720 or a silicon nitride layer 725 as shown in FIG. 11D.


Subsequent operations are similar to those of FIGS. 9A-9F. There is only a difference between FIGS. 9A-9F and FIGS. 11A-11G in that micropatterns are not formed in the polymer layer 705 but are formed in the silicon oxide layer 720 or the silicon nitride layer 725. Specifically, a resist layer 730 is formed by coating an electron beam resist as shown in FIG. 11E, micropatterns are formed in the resist layer 730 using an electron beam exposure device as shown in FIG. 11F, and then, the silicon oxide layer 720 or the silicon nitride layer 725 is etched using the resist 730′, in which the micropatterns are formed, as a mask so that the micropatterns of the resist 730′ are transferred to the silicon oxide layer 720 or the silicon nitride layer 725. Next, the resist 730′ in which micropatterns are formed, is removed by stripping or ashing and thus, a nano imprint master in which the micropatterns are formed can be obtained as shown in FIG. 11G. Although not shown, an anti-sticking layer may also be formed on the silicon oxide layer 720 or the silicon nitride layer 725.


According to an exemplary embodiment of the present invention, a process of removing a metal conductive layer does not need to be performed when a nano imprint master is manufactured so that time and costs required for manufacturing the nano imprint master can be greatly reduced.


In addition, a polymer layer acting as a buffer layer during nano imprinting is introduced so that nano imprinting can be uniformly performed on a large scale.


While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the following claims.

Claims
  • 1. A method of manufacturing a nano imprint master, the method comprising: implanting conductive metal ions into a substrate comprising quartz to form a conductive layer inside the quartz substrate;coating a resist on the quartz substrate in which the conductive layer is formed, to form a resist coating layer;exposing the resist coating layer to an electron beam to form micropatteems;etching the quartz substrate by using the resist coating layer, in which the micropatterns are formed, as a mask; andremoving the resist coating layer to obtain a master in which micropatterns are formed.
  • 2. The method of claim 1, wherein the conductive layer is formed to a thickness of less than a skin depth.
  • 3. The method of claim 1, wherein the conductive metal ions comprise at least one of chromium ions, titanium ions, silver ions, metal ions, aluminum ions and platinum ions.
  • 4. The method of claim 1, wherein the etching of the quartz substrate comprises etching the quartz substrate by dry etching.
  • 5. A method of manufacturing a nano imprint master, the method comprising: epitaxially forming silicon oxide or silicon nitride on a substrate comprising quartz to form a silicon oxide layer or a silicon nitride layer, respectively;implanting conductive metal ions into the silicon oxide layer or the silicon nitride layer to form a conductive layer inside the silicon oxide layer or the silicon nitride layer, respectively;coating a resist on the silicon oxide layer or the silicon nitride layer to form a resist coating layer;exposing the resist coating layer to an electron beam to form micropatterns;etching the quartz substrate in which the silicon oxide layer or the silicon nitride layer is formed, by using the resist coating layer, in which the micropatterns are formed, as a mask; andremoving the resist coating layer to obtain a master in which micropatterns are formed.
  • 6. The method of claim 5, wherein the conductive layer is formed to a thickness of less than a skin depth.
  • 7. The method of claim 5, wherein the conductive metal ions comprise at least one of chromium ions, titanium ions, silver ions, metal ions, aluminum ions and platinum ions.
  • 8. The method of claim 5, wherein the etching of the quartz substrate comprises etching the quartz substrate by dry etching.
  • 9. A method of manufacturing a nano imprint master, the method comprising: depositing a conductive metal on a quartz substrate to form a conductive layer;epitaxially forming silicon oxide or silicon nitride on the conductive layer to form a silicon oxide layer or a silicon nitride layer;coating a resist on the silicon oxide layer or the silicon nitride layer to form a resist coating layer;exposing the resist coating layer to an electron beam to form micropatterns; andetching the quartz substrate in which the silicon oxide layer or the silicon nitride layer is formed, by using the resist coating layer, in which the micropatterns are formed, as a mask.
  • 10. The method of claim 9, wherein the conductive layer is deposited to a thickness of less than a skin depth.
  • 11. The method of claim 9, wherein the conductive layer comprises at least one of a chromium layer, a titanium layer, a silver layer, a gold layer, an aluminum layer, and a platinum layer.
  • 12. The method of claim 9, wherein the etching of the quartz substrate comprises etching the quartz substrate by dry etching.
  • 13. A nano imprint master manufactured by a manufacturing method of claim 1.
  • 14. A nano imprint master manufactured by a manufacturing method of claim 5.
  • 15. A nano imprint master manufactured by a manufacturing method of claim 9.
  • 16. A method of manufacturing a nano imprint master, the method comprising: forming a polymer layer on a substrate;implanting conductive metal ions into the polymer layer to form a conductive layer inside the polymer layer;coating a resist on the polymer layer in which the conductive layer is formed, to form a resist coating layer;exposing the resist coating layer to an electron beam to form micropatterns;etching the polymer layer by using the resist coating layer, in which the micropatterns are formed, as a mask; andremoving the resist coating layer to obtain a master in which micropatterns are formed on the polymer layer.
  • 17. The method of claim 16, wherein the etching of the polymer layer comprises etching the polymer layer by dry etching.
  • 18. The method of claim 16, further comprising forming an anti-sticking layer on the polymer layer in which the micropatterns are formed.
  • 19. The method of claim 16, wherein the conductive layer is formed to a thickness of less than a skin depth.
  • 20. The method of claim 16, wherein the conductive metal ions comprise at least one of chromium ions, titanium ions, silver ions, gold ions, and platinum ions.
  • 21. The method of claim 16, wherein the substrate comprises quartz.
  • 22. The method of claim 16, wherein the polymer layer comprises a high elastic polymer.
  • 23. A method of manufacturing a nano imprint master, the method comprising: forming a polymer layer on a substrate;forming a silicon oxide layer or a silicon nitride layer on the polymer layer;implanting conductive metal ions into the silicon oxide layer or the silicon nitride layer to form a conductive layer inside the silicon oxide layer or the silicon nitride layer, respectively;coating a resist on the silicon oxide layer or the silicon nitride layer to form a resist coating layer;exposing the resist coating layer to an electron beam to form micropatterns;etching the silicon oxide layer or the silicon nitride layer by using the resist coating layer, in which the micropatterns are formed, as a mask; andremoving the resist coating layer to obtain a master in which micropatterns are formed in the silicon oxide layer or the silicon nitride layer.
  • 24. The method of claim 23, wherein the etching of the silicon oxide layer or the silicon nitride layer comprises etching the silicon oxide layer or the silicon nitride layer by dry etching.
  • 25. The method of claim 23, wherein the conductive layer is formed to a thickness of less than a skin depth.
  • 26. The method of claim 23, wherein the conductive metal ions comprise at least one of chromium ions, titanium ions, silver ions, gold ions, and platinum ions.
  • 27. The method of claim 23, further comprising forming an anti-sticking layer on the silicon oxide layer or the silicon nitride layer in which the micropatterns are formed.
  • 28. The method of claims 23, wherein the substrate comprises quartz.
  • 29. The method of claim 23, wherein the polymer layer comprises a high elastic polymer.
  • 30. A method of manufacturing a nano imprint master, the method comprising: forming a polymer layer on a substrate;depositing a conductive metal on the polymer layer to form a conductive layer;forming a silicon oxide layer or a silicon oxide layer on the conductive layer;coating a resist on the silicon oxide layer or the silicon nitride layer to form a resist coating layer;exposing the resist coating layer to an electron beam to form micropatterns;etching the silicon oxide layer or the silicon nitride layer by using the resist coating layer, in which the micropatterns are formed, as a mask; andremoving the resist coating layer to obtain a master in which micropatterns are formed in the silicon oxide layer or the silicon nitride layer.
  • 31. The method of claim 30, wherein the etching of the silicon oxide layer or the silicon nitride layer comprises etching the silicon oxide layer or the silicon nitride layer by dry etching.
  • 32. The method of claim 30, wherein the conductive layer is formed to a thickness of less than a skin depth.
  • 33. The method of claim 30, wherein the conductive metal ions comprise at least one of chromium ions, titanium ions, silver ions, gold ions, and platinum ions.
  • 34. The method of claim 30, further comprising forming an anti-sticking layer on the silicon oxide layer or the silicon nitride layer in which the micropatterns are formed.
  • 35. The method of claim 30, wherein the substrate comprises quartz.
  • 36. The method of claim 30, wherein the polymer layer is formed of high elastic polymer.
  • 37. The method of claim 36, wherein the high elastic polymer comprises polydimethylsiloxane.
  • 38. A nano imprint master manufactured by a manufacturing method of claim 16.
  • 39. A nano imprint master manufactured by a manufacturing method of claim 23.
  • 40. A nano imprint master manufactured by a manufacturing method of claim 30.
Priority Claims (2)
Number Date Country Kind
10-2006-0055538 Jun 2006 KR national
10-2006-0125657 Dec 2006 KR national