Claims
- 1. A process of forming a planarized film on a substrate comprising:applying to a surface of the substrate a polymeric planarizing solution comprising a novolac resin having a weight average molecular weight between about 1000 and 2300 amu, wherein the novolac resin is fractionated to remove the molecules with molecular weight below about 350 amu to less than about 22% of a total molecular weight distribution and further has a polydispersity of less than 1.4 and a surfactant selected from the group consisting of a non-fluorinated hydrocarbon, a fluorinated hydrocarbon and combinations thereof to form a coated substrate; and heating said coated substrate to form a planarized film on the surface.
- 2. The process of claim 1, wherein the solution further comprises an organic solvent.
- 3. The process of claim 2, wherein the organic solvent comprises at least one of ethyl lactate, ethyl acetate, propyl acetate, and butyl acetate.
- 4. The process of claim 1, wherein said novolac resin has a fraction with molecular weight below about 350 amu that is less than about 15% of the total.
- 5. The process of claim 1, wherein said novolac resin is a phenolic resin.
- 6. The process of claim 1, wherein said novolac resin has a polydispersity of less than about 1.2.
- 7. The process of claim 1, wherein the surfactant is an ester derivative of a fluorinated hydrocarbon.
- 8. The process of claim 1, wherein applying to a surface a polymeric planarizing solution further comprises spin-coating the solution onto the surface.
- 9. The process of claim 1, wherein heating the coated substrate comprises heating the substrate by placing it on a hot plate.
- 10. The process of claim 9, wherein the coated substrate is placed on the hot plate for about 0.5 to 5 minutes.
- 11. The process of claim 9, wherein the coated substrate is placed on the hot plate at a temperature range of between 50° C. and 300° C.
- 12. The process of claim 11, wherein the temperature range is between 100° C. and 200° C.
- 13. The process of claim 1, wherein the substrate comprises silicon.
- 14. The process of claim 13, wherein the substrate comprises a circuit pattern on the surface of the substrate.
- 15. An integrated circuit formed by the process of claim 14.
- 16. A microelectronic device formed by the process of claim 1.
- 17. A planarized film formed by the process of claim 1.
RELATED APPLICATION
This application is a division of U.S. application Ser. No. 09/205,006, filed Dec. 2, 1998.
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