The subject matter herein generally relates to analog circuits and signals and associated amplification techniques. In particular, the invention relates to an on-chip built-in test and operational qualification system and method.
Optical physical media dependent (“PMD”) integrated circuits (“ICs”) (“PMD ICs”) are designed to operate in conjunction with photonic devices such as lasers and photodiodes/photo-detectors. These circuits are the interface between electrical and optical domains. During functional and/or qualification testing, e.g., high-temperature operational life (“HTOL”), it is desirable for the PMD ICs to be dynamically operating and realistically loaded. As the operation data rate increases, such loading conditions become either cost-prohibitive or unattainably complex. Many existing approaches trade off test relevance with less than ideal load conditions and/or suffer from wider variation range in results due to test system complexity.
According to one embodiment, described is an on-chip built-in test and qualification system comprising a driver device for driving a device, wherein the device is associated with a current characteristic and a voltage characteristics, a load circuit designed to exhibit the current-voltage (“I-V”) characteristic of the device and a switch coupled between the driver device and the load circuit, such that the switch allows selection of one of either the driver device driving the device or the load circuit, wherein the switch may be activated during operational qualification of the driver device.
According to one embodiment, described is a method for testing an operation of a driver device in driving a load in a manufacturing environment comprising determining an I-V characteristic of the device, introducing an on-chip load to reproduce the I-V characteristic of the device, and switchably coupling the on-chip load to the driver circuit to enable a selection of one of either the driver device driving the device or the load circuit.
According to one embodiment, described is an on-chip built-in test and qualification system comprising a first channel and a second channel, wherein each channel comprises a first pad and a second pad, a switched resistor network coupling said first pad and said second pad, wherein the switched resistor network allows for selection of a desired resistance between the first pad and the second pad, an on-chip load coupled to the first pad, and an amplifier coupled to the second pad.
According to one embodiment, operational and functional testing of the PMD ICs is achieved by constructing a switchable on-chip circuit with similar or equivalent electrical characteristics of a targeted photonic device. According to one embodiment, for a Vertical Cavity Surface-Emitting Laser (VCSEL”) driver integrated circuit, two appropriately sized bipolar transistors with suitable controls are utilized to simulate the I-V characteristics of the VCSEL.
According to another embodiment for a receiver, a switchable resistor load is utilized to simulate bias conditions of a photo-detector. Because these simulated loading devices are subjected to the same semiconductor manufacturing process of the PMD IC, compatible consistency and resolution are expected under various testing conditions.
According to one embodiment, on-chip load 104 may exhibit a particular I-V characteristic simulating that of device 106. According to one embodiment, on-chip load 104 may comprise any circuit comprising active and/or passive elements that exhibits an I-V characteristic similar or identical to load 106.
Amplifier 100 provides a voltage or current signal that is received by either an actual VCSEL (not shown in
Referring to
According to one embodiment, in normal operation a reverse biased photodiode (not shown in
During high-speed electrical test, switch 102(a) is turned off and switch 102(b) is turned on causing coupling of node 208(c) to earth ground 306(a) at low frequency to facilitate high-speed signaling.
For example, as shown in
The switched resistor networks for each channel allow for introduction of various values of resistance between associated pads (i.e., pads 206(a) and 206(b) or between pads 206(c) and 206(d)). Thus, turning on or off various switched resistors in the networks controls the amount of current flow between the associated pads, which simulates the quiescent photocurrent of a photodiode. This allows a realistic burn-in condition to exercise the detector biasing and input current to amplifier 100, which may be, for example, a receiver amplifier.
While the present invention has been particularly shown and described with reference to the preferred mode as illustrated in the drawing, it will be understood by one skilled in the art that various changes in detail may be effected therein without departing from the spirit and scope of the invention as defined by the claims.
This application claims the benefit of U.S. Provisional Application No. 62/142,608, filed Apr. 3, 2015, the entire disclosure of which is incorporated herein by reference.
Number | Name | Date | Kind |
---|---|---|---|
5063307 | Zommer | Nov 1991 | A |
6272160 | Stronczer | Aug 2001 | B1 |
6624405 | Lau et al. | Sep 2003 | B1 |
6675322 | Schaffroth et al. | Jan 2004 | B1 |
7440865 | Hofmeister et al. | Oct 2008 | B1 |
20070167723 | Park | Jul 2007 | A1 |
20100207791 | Ohnhaeuser | Aug 2010 | A1 |
20100232205 | Parkinson | Sep 2010 | A1 |
20110270543 | Schmidt et al. | Nov 2011 | A1 |
Entry |
---|
Partial International Search Report for International Patent Application No. PCT/US2016/025521, dated Jul. 22, 2016 (counterpart of U.S. Appl. No. 14/814,066). |
Number | Date | Country | |
---|---|---|---|
20160291086 A1 | Oct 2016 | US |
Number | Date | Country | |
---|---|---|---|
62142608 | Apr 2015 | US |