BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a cross-sectional view showing one embodiment of the plasma processing apparatus to which the present invention is applied;
FIG. 2 is an explanatory view showing the peripheral structure of the substrate electrode according to the present invention;
FIGS. 3A and 3B are views showing the measured values of voltages and currents of portions of the substrate electrode, and estimated values of the processing substrate voltage according to the present invention; and
FIG. 4 is a view showing the equivalent circuit model of the peripheral area of the substrate electrode according to the present invention.