Patent Application
20090165951
The present invention relates to a plasma processing apparatus, or in particular to a technique for suppressing the variation of the processing characteristics of the plasma processing apparatus.
With the increased degree of miniaturization, the increased integration and the increased variety of the component materials of devices, not only the higher processing accuracy, but the long-lasting stability of the processing characteristics of each single plasma processing apparatus and the suppression of the difference in the processing characteristics between a plurality of plasma processing apparatuses are required as a crucial factor for mass production of the semiconductor.
In the plasma etching apparatus, for example, repeated processing operations cause the deposits on and the wear of the inner wall of the reaction chamber. With the progress of these deposits and wear, the wafer processing characteristics continue to undergo a change over a long period of time and finally come to deviate from the reference level of the tolerable variation of the processing characteristics for fine etching patterns and fail to meet the performance requirements of the devices fabricated. Also, the separation of the deposits generates undesirable fine particles, and the wear of the parts of the processing chamber induces the abnormal electric discharge or the like leading to a device defect.
For these reasons, the plasma processing apparatuses have recently come to be monitored continuously for many parameters (emission spectrum, peak-to-peak voltage Vpp of the bias waveform, behavior of the reflected wave, etc.) considered to affect the processing conditions. In this way, the advisability of the continued production is determined on the one hand, and various measures have been studied to utilize the plasma cleaning to reduce the deposit or to use a new inner material to prevent the wear on the other hand. As a result, the process can be suspended before occurrence of a product defect or the time required before the occurrence of a defect can be lengthened.
Nevertheless, the plasma processing apparatus follows the everlasting trend toward stricter criteria of the tolerable variation in the processing characteristics for fine pattern etching (for example, the gate length in 45-nm node has reached the order of 20 nm, of which the variation of 2 nm or more is not permitted). Even in the case where the mass production continues to be monitored based on the various parameters of the apparatus, therefore, only a small change in the processing characteristics may cause the deviation from a tolerable criterion.
In each of these cases, the cleaning of the whole reaction chamber or the replacement of the consumable parts is required, resulting in shorter cycles of the overall cleaning operation or an increased frequency of change of the consumable parts. This leads to a lower utilization rate and an increased cost of the consumable parts. Although the method of removing the deposits of Si, C, Al, etc. by plasma cleaning is also utilized, it is impossible to remove only the predetermined deposits and leave nothing extraneous on the inner wall surface of the reaction chamber or never to wear the inner wall surface of the reaction chamber in the cleaning process (perfect plasma cleaning). It is therefore difficult to reset the interior of the reaction chamber completely.
For this reason, it has become crucial to develop a technique to maintain constant wafer processing characteristics by the diagnosis or by the status monitor, with high accuracy, on the delicate variations of the inner wall conditions of the reaction chamber or the delicate differences between the apparatuses. The parameters for determining the wafer processing characteristics include the pressure, gas flow rate, wall surface and wafer temperatures and the power matching. A technique for increasing the accuracy of each of these parameters is now under development. Examples of patent documents concerning the monitor and diagnosis of the reaction chamber and the operation of controlling the power and the matching unit are described below.
JP-A-9-260096 discloses a method in which the plasma is ignited after moving the stub of the impedance matching unit to a preset ignition point, and after securely igniting the plasma, the stub is moved to a match point where the plasma is stabilized. To control the tracking, an operation track is plotted from an initial setting through a plasma ignition point to a plasma stabilizing point.
In JP-A-2003-174015, on the other hand, a sensor is mounted midway of the route from the matching unit to the electrode in the plasma processing apparatus, so that the processing characteristics and the variation thereof are detected with high sensitivity.
Also, U.S. Patent Application Publication No. 2004/0003896A1 discloses a technique in which the impedance is measured during the processing of the wafer and stored as a data base together with the information on the wafer processing. In this way, the empirical information are accumulated and related to the wafer processing characteristics.
It is essential to operate the same plasma processing apparatus with stable processing characteristics over a long period of time and to minimize the difference of the processing characteristics between different reaction chambers. Nevertheless, the increase in the deposits on the inner wall and the wear of the inner wall of the apparatus cause variations in the processing characteristics. Also, even in the case where the component parts of the reaction chambers are fabricated with very high accuracy, delicate differences develop between the component parts thus fabricated, with the occasional result that the difference of the processing characteristics between a plurality of apparatuses fail to meet the tolerance.
Also, the characteristics of even the same component part, if removed provisionally and reassembled for the purpose of maintenance, undergo a change due to the difference in the assembly conditions.
As described above, in the plasma processing apparatus, even after securing a predetermined plasma density, a predetermined impedance or a predetermined effective input power, the processing characteristics cannot always be kept constant.
To cope with these problems, this invention has been achieved based on the knowledge that for securing constant processing characteristics by stabilizing the internal conditions of the plasma processing apparatus, the essential prerequisite is to control the ambient conditions such as the pressure and flow rate of the processing gas with high accuracy and thus to control the matching between the power supply and the plasma. In view of this, the object of the invention is to provide a plasma processing technique for detecting and suppressing the variation of the processing characteristics of the plasma processing apparatus.
In order to achieve this object, according to this invention, there is provided a plasma processing apparatus comprising a reaction chamber with an insulated inner side wall, a sample rest arranged in the reaction chamber and an antenna, wherein the high-frequency power from a plasma-generating power supply is supplied to the antenna so that the processing gas introduced into the reaction chamber is converted into a plasma and the sample placed on the sample stage is processed with the plasma, wherein a matching unit for impedance matching, arranged between the plasma-generating power supply and a load circuit having the antenna, includes a sensor for measuring the impedance characteristic of the load circuit and a means for changing the match point of the matching unit as viewed from the input terminal toward the load side of the matching unit and the match operation track leading to the match point in accordance with the measurement of the sensor.
According to this invention having the aforementioned configuration, the variation in the processing characteristic of the plasma processing apparatus is detected and suppressed.
Other objects, features and advantages of the invention will become apparent from the following description of the embodiments of the invention taken in conjunction with the accompanying drawings.
A reaction chamber 1 for processing the plasma includes, in the upper portion thereof, a dielectric material vacuum window 2 for introducing the UHF-band electromagnetic wave for generating a plasma 9 and a gas release plate 3 of a dielectric material for introducing a reactive processing gas. The reaction products of the etching process are exhausted by vacuum from a discharge port 6 under the reaction chamber 1. The inner wall surface of the reaction chamber 1 is protected by a coating of an insulating material 8 on the surface of an aluminum base metal covered with alumite. A wafer 4 that has been etched is placed on an electrostatic chuck formed of a dielectric (high-resistance) film arranged on the upper surface of the sample stage 5 to attract the wafer 4 by an electrostatic force.
A helium gas is filled between the wafer 4 and an electrostatic chuck so that the heat transfer to and from the sample rest 5 is secured thereby to efficiently control the temperature of the wafer 4. Also, the sample rest 5 is connected with a bias generating power supply 13 for applying a high-frequency bias to the wafer 4 and a DC power supply required for chucking by the electrostatic force. Thus, a minuscule DC current flowing through the wafer and the high-resistance film can be monitored.
A reactive gas is released into the reaction chamber 1 from a gas release plate 3 while maintaining the pressure of about 0.5 to 10 Pa. Under this condition, a magnetic field is applied into the reaction chamber 1 by a magnetic field coil 7. At the same time, a UHF-band output of the plasma generating power supply 12 is applied through a matching unit 11 so that an electromagnetic wave is radiated into the reaction chamber 1 from an antenna 10 placed in the upper portion of the reaction chamber 1. In this way, the plasma 9 is generated in the reaction chamber 1 thereby to perform the etching process.
A mixture gas of Cl2, HBr and CF4 is introduced into the processing apparatus shown in
First, the function of automatically changing the match point and the matching track is turned off, and the input voltage reflection coefficient, the load voltage reflection coefficient are displayed as an impedance on a Smith chart. Under this condition, the wafer is continuously processed. As a result, up to 2500 wafers can be continuously processed under stable discharge. The study of the result of the wafer etching process, however, has revealed the fact that as compared with the first wafer, the finish size of the micro pattern formed by etching is progressively reduced, though very slightly, with the increase in the number of wafers to 500, 1000, 1500 and so on. Specifically, the finish size of 50 nm for the first wafer compares with 47 nm for the 1500th wafer, 46 nm for the 2000th wafer and 45 nm for the 2500th wafer.
Also, the LSI device fabricated with the 2250th or subsequent wafers was found, though too late, to have developed a characteristic defect. Further, the wafers beyond the 2500th one began the deterioration of the discharge stability. Since up to 2600 wafers have been processed before recognizing this fact, another 100 defective wafers were produced. The processing was stopped at the 2600th wafer.
As the result of confirming the charts of the input voltage reflection coefficient and the load voltage reflection coefficient for up to 2500 wafers, the reflected wave remained at 0 W for all the wafers including the first one. Specifically, as shown in
The counterclockwise shift indicates the reduction in electrostatic capacitance of the high-frequency circuit for plasma generation, i.e. an increased thickness of the insulating film deposited on the surface of the dielectric parts in the upper portion of the reaction chamber 1. This deposited film showed no sign of reduction after plasma cleaning with the SF gas. Unavoidably, therefore, the reaction chamber was exposed to the atmosphere, the entire internal deposited film was cleaned off, the reaction chamber was reassembled and vacuumed, and after preparation for the wafer processing, one wafer was processed as a trial. As a result, the finish size was found to have restored the original 50 nm. Also, the load voltage reflection coefficient was restored to the original position 19 on the chart. In this situation, however, the number of wafers to be processed for the second and subsequent fabrication sessions is unavoidably required to be limited to about 2000 allowing for a safety margin.
Next, the function of changing the match point and the matching track automatically was turned on and the wafers were processed continuously again. In setting the automatic change function, the load power reflection coefficient was shifted counterclockwise as shown in
First, in step S1, the load impedance is measured by a sensor arranged in the neighborhood of the matching unit. In step S2, the load voltage reflection coefficient is calculated based on this measurement and the calculated value is plotted on the chart (Smith chart indicating the load voltage reflection coefficient, for example). In step S3, the deviation from a reference position on the chart is determined. In the case where the deviation is larger than the reference value, it indicates that a fault has occurred in the process. By referring to the data base 42 for determining the contents of an alarm, the alarm of the corresponding contents is issued, and the process is terminated in step S6.
In the case where the deviation is not more than the reference value in step S3, the match point or the matching track leading to the match point is changed in accordance with the change in the load voltage reflection coefficient in step S4. In changing the match point and the matching track leading to the match point, a data base having stored therein the optimum match point or the optimum matching track leading to the optimum match point in accordance with the change of the load voltage reflection coefficient is accessed. This process can be implemented in accordance with a program or the like. Also, the process can be realized with hardware as a processing unit.
In the case where the process is executed according to the flowchart shown in
As for the 5000th and subsequent wafers, the shift of the load voltage reflection coefficient was substantially stopped by saturation, and the finish size of the micro pattern was not reduced to less than 47 nm. While confirming this situation, up to 8000 wafers were processed finally, and it was confirmed that the wafers thus far processed saw no increase in device operation defect ratio.
In this way, it was found that the characteristic variation of the micro pattern etching process can be suppressed by controlling the match point and the track leading to the match point in such a manner as to maintain the specific plasma conditions as constant as possible.
A reaction chamber 1 for processing the plasma includes, in the upper portion thereof, a gas release plate 3 of conductive material (silicon) for introducing the reactive processing gas. The inner wall surface of the reaction chamber 1 is protected by the coating of an insulating material 8 formed by processing the surface of an aluminum base metal into alumite. This conductive gas release plate also functions as a grounding electrode in the reaction chamber according to this embodiment.
The wafer 4 to be etched is mounted on an electrostatic chuck formed of a film of a dielectric (high-resistance) material arranged in the upper portion of the sample rest 5 to attract the wafer 4 by electrostatic force. By filling the helium gas between the wafer 4 and an electrostatic chuck film, the heat transmission to and from the sample rest 5 is secured thereby to control the temperature in satisfactory manner. In this apparatus, the HF-band electromagnetic wave for generating the plasma 9 is applied to the sample stage 5 carrying the wafer 4 through the matching unit 11.
According to the second embodiment, unlike in the first embodiment, the electromagnetic wave for generating the plasma is applied from the sample stage 5 side. In this way, this invention is applicable both to the case in which the electromagnetic wave for generating the plasma is applied from the upper portion of the reaction chamber and to the case in which it is applied from the lower portion of the reaction chamber through the sample stage. Also, the invention is applicable to any frequency of the electromagnetic wave for plasma generation. Specifically, this invention is applicable to various plasma processing apparatuses including, in general terms, a microwave plasma processing apparatus, an inductive coupling plasma processing apparatus (ICP) and a UHF plasma processing apparatus described in the first embodiment for introducing plasma-generating power through a dielectric window in the upper portion of the reaction chamber on the one hand, a parallel flat plate plasma processing apparatus of a type for introducing power from the upper electrode arranged in the plasma, and a parallel flat plate plasma processing apparatus of another type as in the second embodiment for introducing power from the lower sample rest on the other hand.
In
First, with the function turned off to automatically change the match point and the matching track, the input voltage reflection coefficient and the load voltage reflection coefficient were displayed on the impedance chart. Under this condition, the wafers were continuously processed. After the process was continued up to 2500 wafers, the result of the wafer etching process was checked, and it was found that the etching shape had shifted somewhat but within the tolerance for up to 2450 wafers. After 2450 wafers, however, the deterioration of discharge stability began and was noticed only after 2500 wafers had been processed. Thus, the processing was stopped at the 2500th wafer.
The discharge stability was checked on the Smith chart of the input voltage reflection coefficient before etching the first wafer. Then, the unstable area 22 shown in
In view of this, the function of changing the match point and the matching track automatically is turned on, and the wafers were continuously processed again. The automatic change function was set in such a manner that with the counterclockwise shift of the load power reflection coefficient as shown in
The control flowchart for this setting is shown in
First, using the processing apparatus shown in
At this point, the continuous wafer processing was terminated, and exposing the reaction chamber to the atmosphere, the whole interior was carefully checked while being cleaned. It was found that the protective coating of the insulating material 8 in the neighborhood of the lower end of the inner wall portion on the side surface of the reaction chamber had been worn off. Also, the study of the processing characteristics of the 8600th wafer showed that the finish size of the micro pattern was 49 nm indicating that the thickness had begun to increase again for an unknown reason. The check of the sectional shape revealed that, though not a great change, the section was tapered and began to change in shape.
Specifically, in the case where the load voltage reflection coefficient undergoes a sharp change inward of the chart, it indicates the wear of the protective coating of the insulating material 8 on the inner wall portion of the side surface of the reaction chamber. It was found that the base metal parts in contact with the plasma reduces the plasma potential, which in turn reduces the DC current flowing in the sample stage carrying the etching wafer, and the sectional shape of the fine pattern begins the deterioration at the same time. In response to this phenomenon, therefore, it is convenient to issue an alarm message about the wear of the protective coating of the insulating material 8 on the surface of the metal parts.
After changing the inner wall parts of the side portion of the reaction chamber with new ones, the whole of the reaction chamber was cleaned. Next, in order to check other processes, the continuous wafer processing was started in the processing apparatus shown in
From the above-mentioned facts, it was found that the characteristic changes in different behaviors on the Smith chart between the case where the protective coating of the insulating material on the inner wall parts on the side portion of the reaction chamber is worn and the case where the quartz parts on the upper surface of the reaction chamber are worn.
Now, with reference to
The reaction chamber of the apparatus shown in
The deposits on the parts inside the reaction chamber had been cleaned completely, and the worn parts replaced. Therefore, as far as the deposits and the wear were concerned, the initial state was restored. The deviation of 5 degrees, therefore, is considered due to the delicate difference in the size of the individual parts or the assembled state of the internal parts of the reaction chamber.
According to the first embodiment, in the case where the change in the internal state of the reaction chamber causes the counterclockwise deviation of one degree with respect to the position 19 for processing the first wafer on the load voltage reflection coefficient chart of
In the case of the 5-degree deviation due to the difference in the size of individual parts or the assembled state of the internal parts of the reaction chamber, in contrast, it should be made clear whether the match point value of the input voltage reflection coefficient for correcting the shift of the internal state of the reaction chamber is to be shifted by 0.05 in the direction of zero degree like in the first embodiment, or in view of the fact that the deposits on the internal parts of the reaction chamber have been cleaned and the worn parts replaced, the operation should be started from the origin, i.e. from zero without the 0.05 shift. For this purpose, the wafers were processed as a trial in these two ways.
As a result, it was found that in the case of 0.05 shift, the finish size of the micro pattern was 49.4 nm, while in the case of size zero, the figure was 47.5 nm. This indicates that even in the case where the impedance characteristic is varied with the assembled state of the internal parts or the size difference of the individual internal parts of the reaction chamber, as in the case where the internal state of the reaction chamber shifts due to the deposits or wear, the finish size deviation of the fine pattern is reduced by shifting the match point value of the input voltage reflection coefficient. In other words, the effects of the difference in the assembled state of the internal parts or the difference in size of the individual internal parts of the reaction chamber can be suppressed by the control operation similar to that of the first embodiment.
In order to confirm whether this fact can be used for reducing the difference of the wafer processing characteristics between a plurality of reaction chambers, i.e. the difference between a plurality of different apparatuses, four processing apparatuses A to D were prepared and the deposits on the internal parts of the reaction chamber were cleaned completely and the worn parts replaced.
Then, it was found that the impedance characteristic of the reaction chamber deviates counterclockwise by 6 degrees for the apparatus A, 0 degree for the apparatus B, 2 degrees for the apparatus C and −18 degrees (i.e. 18 degrees in clockwise direction) for the apparatus D with respect to the position 19 for the first wafer on the load voltage reflection coefficient chart of
As a result of the test conducted without shifting the match point of the input voltage reflection coefficient, the finish size was 47 nm for the apparatus A, 50 nm for the apparatus B, 49 nm for the apparatus C and 48 nm for the apparatus D. The result of a test conducted by shifting the match point of the input voltage reflection coefficient, as shown in FIG. 3, in the direction of zero degree by 0.06 for the apparatus A, zero for the apparatus B, 0.02 for the apparatus C and 0.04 for the apparatus D in the direction of zero degree showed that the finish size was 49.3 nm for the apparatus A, 50 nm for the apparatus B, 49.8 nm for the apparatus C and 49.5 nm for the apparatus D. In this way, it was confirmed that this invention is applicable to the reduction of apparatus differences.
As described above, an alarm can be issued in the case of an impedance characteristic difference deviating from a predetermined reference. In the presence of an impedance characteristic difference not deviating from the predetermined reference, on the other hand, the effect that the particular characteristic difference may have on the processing characteristics of the micro pattern can be suppressed.
In the first to fourth embodiments, the load impedance measured by the sensor and the impedance as viewed from the input terminal of the matching unit as related to the match point or the matching track under the control of the matching unit were indicated on the Smith chart by the load voltage reflection coefficient or the input voltage reflection coefficient. According to this invention, however, the matching operation is controlled simply in accordance with the load impedance change, and therefore the analysis on the Smith chart is not essential. Thus, the matching operation can of course be controlled also by indication on the chart using other impedance indication method such as the R+jX expression while analyzing and grasping the relation with the processing characteristics.
Also, in the case where the dielectric parts in the reaction chamber are worn and the thickness reduced so that the load reflection coefficient on the chart shifts toward a larger electrostatic capacitance, the change is conforming with the theory and explanatory. Nevertheless, it is sometimes impossible to explain with sufficient logic about the direction of impedance shift due to a complicated behavior of the reaction chamber, the assembly difference due to an unknown cause or the abnormal discharge. Also in such cases, a control instruction can be given empirically and thus the characteristic variations suppressed by grasping the trend in advance and storing it in the data base.
It will thus be understood from the foregoing description that, according to the invention, even in the case where a delicate characteristic difference develops between a plurality of reaction chambers at the time of fabrication thereof or a delicate difference in the processing characteristics is caused by the accumulation of deposits on or the wear of the inner wall of the reaction chamber, these delicate variations are monitored with high accuracy and upon recognition of the direction in which the characteristics shift, the matching characteristics are changed in the direction toward uniform characteristics. Thus, it is possible to offset the difference in the processing characteristics between the reaction chambers or the characteristic variation due to the protracted change in the inner wall of the reaction chamber. As a result, as compared with the prior art, the interior of the reaction chambers can be cleaned at longer intervals as required against the characteristic deviation from a predetermined reference or the parts can be changed at longer intervals to meet the need of restoring the original wafer processing characteristics which may arise even in the case where the wear is comparatively small. As a result, the utilization rate is improved and the cost of consumable parts reduced.
Also, an alarm can be issued in the case where the shift has increased beyond the predetermined reference, and therefore the situation which otherwise might produce many defective LSI devices can be avoided. Further, the device conditions can be monitored, the characteristics corrected, an alarm issued against a characteristic deviation and the cause of the characteristic deviation identified for each reaction chamber. As a result, not only a defect can be prevented, but also the timing of cleaning up the interior of the reaction chamber and replacing the consumable parts can be automatically displayed. In this way, information crucial for mass production control can be issued.
It should be further understood by those skilled in the art that although the foregoing description has been made on embodiments of the invention, the invention is not limited thereto and various changes and modifications may be made without departing from the spirit of the invention and the scope of the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2004-236532 | Aug 2004 | JP | national |
This application is a Continuation of U.S. application Ser. No. 10/934,510, filed Sep. 7, 2004, which claims priority from Japanese Patent Application No. 2004-236532, filed on Aug. 16, 2004, the contents of which are incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | 10934510 | Sep 2004 | US |
| Child | 12400266 | US |
