Claims
- 1. A method of assembling a semiconductor device which comprises a semiconductor element having first and second surfaces, a first electrode provided on said semiconductor element, a second electrode provided on said second surface of said semiconductor element, a first electrode plate having first and second surfaces, a second electrode plate having first and second surfaces, a first external electrode, a second external electrode, and a casing having an opposite pair of opening portions, wherein said first electrode plate is formed such that the outer peripheral portion of said first electrode plate projects outwardly beyond said semiconductor element, and wherein a stepped portion is provided in said first surface of said first electrode plate along the outer peripheral edge of said semiconductor element such that a line, which is projected along the outer peripheral edge of said semiconductor element on said first surface of said first electrode plate, is located on said stepped portion, said method comprising the steps of:
- (a) preparing said casing;
- (b) fixing said semiconductor element to said first electrode plate, said step (b) including the steps of:
- (b-1) placing said first electrode plate to upwardly direct said first surface thereof having said stepped portion, and placing said semiconductor element on said first surface of said first electrode plate,
- (b-2) supplying an adhesive holding member to said stepped portion and to said outer peripheral portion of said semiconductor element, and
- (b-3) heating said semiconductor element, said first electrode plate, and said adhesive holding member to thereby solidify said adhesive holding member;
- (c) storing said second external electrode, said second electrode plate, said first electrode plate to which said semiconductor element is fixed, and said first external electrode; and
- (d) fixing said first and second external electrodes to end portions of respective opening portions of said casing.
- 2. A method according to claim 1, wherein said step (b) further includes placing a weight on said semiconductor element prior said step (b2).
- 3. A method according to claim 1, wherein said step (d) further includes applying stress to said first and second external electrodes such that said second external electrode, said second electrode plate, said first electrode plate, and said first external electrode are in contact with each other under pressure.
Priority Claims (2)
Number |
Date |
Country |
Kind |
4-110179 |
Apr 1992 |
JPX |
|
4-238315 |
Sep 1992 |
JPX |
|
Parent Case Info
This is a division of application Ser. No. 08/047/436, filed on Apr. 15, 1993 , U.S. Pat. No. 5,371,386.
US Referenced Citations (4)
Number |
Name |
Date |
Kind |
4388635 |
Watanabe et al. |
Jun 1983 |
|
4775916 |
Kouzuchi et al. |
Oct 1988 |
|
4926240 |
Regione |
May 1990 |
|
5005069 |
Wasmer et al. |
Apr 1991 |
|
Foreign Referenced Citations (6)
Number |
Date |
Country |
47-10181 |
Mar 1972 |
JPX |
58-215041 |
Dec 1983 |
JPX |
63-293928 |
Nov 1988 |
JPX |
1106455 |
Apr 1989 |
JPX |
1293543 |
Nov 1989 |
JPX |
8721345 |
Apr 1988 |
GBX |
Divisions (1)
|
Number |
Date |
Country |
Parent |
47436 |
Apr 1993 |
|