Patent Application
20130078788
This application is based upon and claims the benefit of priority from prior Japanese Patent Application No. 2011-209629 filed on Sep. 26, 2011, the entire contents of which are incorporated herein by reference.
The embodiments of the present invention relate to a producing method of a semiconductor device and a production device used therefor.
Further micronization has been demanded for a semiconductor device, and particularly a minute transistor element with a gate length of 20 nm or less has been demanded in a peripheral circuitry of a nonvolatile semiconductor memory device. In accordance with the micronization of such a semiconductor device, in the case of forming an impurity diffusion layer by doping a narrow region such as a semiconductor substrate with conductive impurities, it has become more difficult to form without causing new problems.
In one embodiment, a producing method for a semiconductor device comprises: heating a semiconductor substrate to thereby maintain a substrate temperature of the above-mentioned semiconductor substrate at a desired temperature and simultaneously dope the above-mentioned semiconductor substrate with conductive impurities; and performing an activation treatment for activating the above-mentioned conductive impurities for doping.
Embodiments are hereinafter described with reference to the drawings. Common reference numerals are put on common portions over all of the drawings and redundant descriptions are not repeated. The drawings are schematic views for promoting the description and understanding of the present invention; the shape, size and ratio thereof differ partially from the actual device, and may be properly modified in design in consideration of the following description and publicly known art. However, the present invention is not limited to these embodiments.
A producing method for a semiconductor device according to the present embodiment is described by using
A producing method for a semiconductor device according to the present embodiment is described by using
First, a semiconductor layer (semiconductor substrate) 11 is prepared. This semiconductor layer 11 is made of silicon and may have p-type or n-type electrical conductivity in accordance with the conductive type of a transistor to be further formed.
Then, a tunnel insulating film (not shown in figures) and a part of a first polysilicon film (charge-storage film/floating gate) (not shown in figures) containing n-type or p-type impurities at a concentration of 1E20 cm−3 or more and 5E20 cm−3 or less are sequentially laminated on this semiconductor layer 11 to form a trench, which pierces through a part of the first polysilicon film and the tunnel insulating film into the semiconductor layer 11, by using an RIE (Reactive Ion Etching) method. For details, the tunnel insulating film is made of silicon oxide, a nitride oxide film, a hafnium-based oxide film (such as HfO2) or a hafnium silicon oxynitride film (such as HfSiON). In the case of being silicon oxide, the tunnel insulating film may be formed by a thermal oxidation method. The first polysilicon film may be formed by a CVD method with the use of silane or disilane.
Next, the element isolation insulating film 17 is formed so as to be embedded in the trench previously formed by using an application method (such as Spin On Glass: SOG method) and a CVD (Chemical Vapor Deposition) method. This element isolation insulating film 17 may be formed by using a silicon oxide film. Thereafter, etching and CMP (Chemical Mechanical Polishing) are performed for the top surface of the element isolation insulating film 17 so that the top surface of the element isolation insulating film 17 is on a desired level.
In addition, the rest of the first polysilicon film (charge-storage film/floating gate) (not shown in figures), an IPD (Inter-Poly Dielectric) (inter-electrode insulating film) film (not shown in figures), and a second polysilicon film (control gate electrode) (not shown in figures) containing n-type or p-type impurities at a concentration of 1E20 cm−3 or more and 5E20 cm−3 or less are sequentially laminated to process these films by using RIE so as to form a gate structure with a desired shape, which is composed of these films. Thus, as shown in
Then, as shown in
Thus, a crystal defect caused by the conductive impurities 16 injected into the semiconductor layer 11 may be immediately restored by performing ion implantation while heating. That is to say, the injected conductive impurities 16 have a certain energy even immediately after ion implantation, and the addition of energy obtained by heating to the energy allows a crystal defect to be sufficiently restored even in the case where heating temperature is low. Accordingly, as shown in
Next, as shown in
The substrate temperature of the semiconductor layer 11 in ion implantation is measured by using a pyrometer through a glass fiber from the back surface 13 side of the semiconductor layer 11. For details, the temperature in the central portion or a region within 30 mm from the center of the back surface 13 of the semiconductor layer 11 is measured. Also, in the case where exact temperature measurement is necessary for process control, the measurement is performed in plural regions, such as the central portion, the outer periphery and the intermediate portion thereof of the back surface 13 of the semiconductor layer 11.
Thereafter, a desired semiconductor device is obtained through well-known steps.
According to the first embodiment, ion implantation while heating allows a crystal defect caused by ion implantation to be restored, so that a crystal defect may be greatly decreased.
For details, in a producing method of a semiconductor device ever studied by the inventors of the present invention, the conductive impurities 16 are injected into the semiconductor layer 11 by using an ion implantation method without heating, and the conductive impurities 16 are injected for such a short time that the injected conductive impurities 16 form interstitial atom and atomic vacancy continuously in the impurity injection layer 19 to amorphize a part or all of the impurity injection layer 19. The impurity injection layer 19 composed of an atom having a minute pattern once amorphized has a high-density crystal defect, which is completely restored with difficulty even in the case of thereafter performing RTA (Rapid Thermal Annealing) and the like at a high temperature of 900 to 1000° C.; accordingly, there is a high possibility that a high-density stacking fault remains in the impurity diffusion layer 20. Thus, in a region in which the high-density stacking fault exists, most of the injected conductive impurities 16 are electrically activated with difficulty, and the problem is occasionally caused that even though electrically activated once, the electrically activated conductive impurities 16 are caught by the crystal defect in the step performed thereafter and electrically deactivated. In addition, leak current resulting from a crystal defect such as a dislocation defect occasionally occurs in a formed semiconductor device.
The injected conductive impurities 16 occasionally enter atomic vacancy and a gap between atoms composing a crystal in the impurity injection layer 19 to expand the volume of the impurity injection layer 19, which is amorphized. Also, in such a case, this high-density crystal defect is completely restored with difficulty by RTA thereafter; accordingly, a high-density stacking fault remains in the impurity diffusion layer 20 and the high-density activated conductive impurities 16 are obtained with difficulty.
However, in the present embodiment, ion implantation while heating allows a crystal defect caused by the implantation to be restored, so that a crystal defect (a crystal defect density) may be greatly decreased. Accordingly, the high-concentration activated conductive impurities 16 may be obtained and the occurrence of leak current resulting from a crystal defect such as a dislocation defect may be avoided. By extension, the yield may be improved in the production of a semiconductor device.
The second embodiment differs from the first embodiment in performing not heating treatment but microwave treatment (microwave irradiation) during ion implantation. A producing method for a semiconductor device according to the present embodiment is described by using
First, the steps up to
Next, as shown in
Thus, the injection of the conductive impurities 16 while irradiating the microwave 14 allows ion implantation to be performed while restoring a crystal defect caused by ion implantation. Thus, as shown in
Then, the microwave 14 of 2.45 GHz or more, desirably, 5.80 GHz to 30 GHz is irradiated on the semiconductor layer 11 from the top surface 12 side of the semiconductor layer 11 to activate the injected conductive impurities 16 and then form an impurity diffusion layer 20 as shown in
According to the second embodiment, the injection of the conductive impurities 16 while irradiating the microwave 14 allows a crystal defect caused by injecting the conductive impurities 16 to be efficiently restored by the effect of microwave irradiation, and allows the impurity injection layer 19 with few crystal defects to be formed. Also, the microwave 14 is long in wavelength as compared with infrared rays and high in permeability into the crystal, so that the microwave 14 may efficiently reach a necessary spot; accordingly, in the case where a semiconductor device has a metal layer and a metal oxide layer subject to thermal damage, these layers may avoid being damaged and desired device performance may be obtained. By extension, the yield may be improved in the production of a semiconductor device.
In addition, the microwave is irradiated not merely in the case of injecting the conductive impurities 16 but also the microwave is irradiated in the case of activating the injected conductive impurities 16 to form the impurity diffusion layer 20, so that the conductive impurities 16 may be activated more efficiently. Also, in the case where a semiconductor device has a metal layer and a metal oxide layer subject to thermal damage, these layers may further avoid being damaged; therefore, desired device performance may be obtained, and by extension, the yield may be further improved in the production of a semiconductor device.
That is to say, the present embodiment utilizes the property of the microwave 14. The property of the microwave 14 is described below.
The microwave 14 generally signifies an electromagnetic wave with a wavelength of 300 MHz to 300 GHz; accordingly, in the microwave 14, an electric field and a magnetic field exist so as to be vertical to each other in the traveling direction of the wave. Then, these electric field and magnetic field become the maximum at the spot where the wave offers the maximum amplitude and zero at the moment when the amplitude of the wave becomes zero.
Here, the description is offered on the assumption that the semiconductor layer 11 is made of a silicon crystal; when impurities and crystal defects (atomic vacancy, interstitial atom and unbound atom) exist in this silicon crystal, electric charge (electron) distribution occurs in the silicon crystal. In particular, in the case of impurities, the impurity atom and the silicon atom differ in electronegativity so much that an electron is leaning to an atom easily attracting an electron (negatively charged) while the other atom is in a state of being short of an electron (positively charged). Thus, an electric dipole is formed in the silicon crystal. Then, when the microwave 14 is irradiated on such a silicon crystal, this electric dipole vibrates in accordance with the electric field of the microwave 14.
In addition, the property of the microwave 14 is described while comparing with infrared rays used in heat treatment such as RTA (Rapid Thermal Annealing) and furnace annealing.
With regard to infrared rays, the wavelength thereof is as short as 10 μm and is as high a frequency as 30 THz in terms of frequency, so that the irradiation of infrared rays on the silicon crystal causes stretching vibration of bond between the adjacent silicon atoms in the silicon crystal and causes torsional vibration (rotation vibration) of bond between the silicon atoms with difficulty. Such stretching vibration does not cause the position of the silicon atoms to move largely, so that rearrangement of bond between the silicon atoms is caused with difficulty.
On the other hand, in the case of irradiating the microwave 14 on the silicon crystal, the bond of four sp3 hybrid orbitals between the silicon atoms vibrates so as to be distorted, so that rearrangement of bond between the silicon atoms is caused so efficiently that the crystal defect may be restored. Also, the microwave 14 is long in wavelength as compared with infrared rays and high in permeability into the silicon crystal. Accordingly, the microwave 14 reaches a necessary spot efficiently.
However, even though the microwave 14 is irradiated, 2.45 GHz as a frequency of a household microwave oven is so low in frequency that it is difficult to efficiently cause torsional vibration of bond between the silicon atoms. On the other hand, when the frequency exceeds 30 GHz, torsional vibration of bond between the silicon atoms begins to be incapable of following. Accordingly, when the frequency is determined at the intermediate range between these frequencies, such as 5.80 GHz, torsional vibration of bond between the silicon atoms is efficiently caused and rearrangement of the silicon atoms is easily caused efficiently.
Thus, microwave treatment is treatment different from heat treatment in that torsional vibration of bond between the silicon atoms may be efficiently caused, and a change in the position of the atoms, that is, rearrangement of bond is caused so easily that the crystal defect may be efficiently restored.
In the present embodiment, before injecting the conductive impurities 16 while irradiating the microwave 14, impurities such as F (electronegativity is 4.0), C (electronegativity is 2.5) and N (electronegativity is 3.0), different by 1 or more in electronegativity from atoms (such as Si and Ge with an electronegativity of 1.8) mainly composing the semiconductor layer 11 are preferably injected by a smaller amount than the injection amount of the conductive impurities 16. Hereinafter, the description is offered on the assumption that the semiconductor layer 11 is made of a silicon crystal; the injection of impurities, such as F, C and N, different by 1 or more in electronegativity from the silicon atom composing the semiconductor layer 11 causes local deviation in electron distribution in the impurity injection layer 19, so that rotation vibration or torsional vibration of a diamond lattice of silicon is efficiently caused by microwave irradiation and the crystal defect caused by ion implantation may be restored more effectively, and by extension, the impurity diffusion layer 20 with few crystal defects may be formed. On this occasion, the impurity injection layer 19 is preferably doped by using ion implantation or plasma doping so that the concentration of impurities such as F, C and N is a third or less with respect to the concentration of the conductive impurities such as As, P and B (a range of 1E20 to 1E21 cm−3).
Also in the present embodiment, similarly to the first embodiment, heating may be performed by using a tungsten halogen lamp in doping with the conductive impurities by ion implantation, and the impurity diffusion layer 20 may be formed by activating the conductive impurities in the impurity doping layer 15 while the microwave 14 is irradiated.
The third embodiment differs from the second embodiment in replacing microwave irradiation with heating treatment during the formation of the impurity diffusion layer 20 by activating the injected conductive impurities 16. A producing method for a semiconductor device according to the present embodiment is described by using
First, similarly to the second embodiment, the steps up to
Next, similarly to the first embodiment, as shown in
According to the third embodiment, even though heating treatment is used during the formation of the impurity diffusion layer 20 by activating the injected conductive impurities 16, similarly to the second embodiment, the doping with the conductive impurities while irradiating the microwave 14 allows a crystal defect caused by doping with the conductive impurities to be efficiently restored by the effect of microwave irradiation, and allows an impurity dope layer 15 with few crystal defects to be formed.
The fourth embodiment differs from the second embodiment in doping the semiconductor layer 11 with conductive impurities such as As, P, Sb and B by replacing ion implantation of the conductive impurities with plasma doping. A producing method for a semiconductor device according to the present embodiment is described by using
First, the steps up to
Next, as shown in
Also, thus, the doping with the conductive impurities by using a plasma doping method allows the doping with the conductive impurities to be performed at high concentration and wide range for a short time, and the energy of the individual conductive impurities in doping is so low that the production of a crystal defect in doping may be further decreased.
Then, similarly to the second embodiment, the microwave 14 of 2.45 GHz or more, desirably, 5.8 GHz to 30 GHz is irradiated to activate the conductive impurities in the impurity doping layer 15 and then form an impurity diffusion layer 20 as shown in
According to the fourth embodiment, similarly to the second embodiment, the doping with the conductive impurities while irradiating the microwave 14 allows a crystal defect caused by doping with the conductive impurities to be efficiently restored by the effect of microwave irradiation, and allows the impurity dope layer 15 with few crystal defects to be formed. Also, according to the present embodiment, the doping with the conductive impurities by using a plasma doping method allows the doping with the impurities to be performed at high concentration and wide range for a short time, and the energy of the individual conductive impurities in doping is so low that the production of a crystal defect in doping may be further decreased. By extension, the yield may be improved in the production of a semiconductor device.
The microwave is irradiated not merely in the case of doping with the conductive impurities but also the microwave is irradiated in the case of activating the doped conductive impurities to form the impurity diffusion layer 20, so that the conductive impurities may be activated more efficiently. Also, in the case where a semiconductor device has a metal layer and a metal oxide layer subject to thermal damage, these layers may further avoid being damaged; therefore, desired device performance may be obtained, and by extension, the yield may be further improved in the production of a semiconductor device.
Also in the present embodiment, similarly to the second embodiment, before doping with the conductive impurities while irradiating the microwave 14, impurities such as F, C and N, different by 1 or more in electronegativity from silicon atoms mainly composing the semiconductor layer 11 may be injected, and the injection of impurities such as F, C and N allows the crystal defect to be restored more effectively by the microwave irradiation.
Also in the present embodiment, similarly to the first embodiment, heating may be performed by using a tungsten halogen lamp in doping with the conductive impurities by a plasma doping method, and the impurity diffusion layer 20 may be formed by activating the conductive impurities in the impurity doping layer 15 while heating. Moreover, in the present embodiment, heating may be performed by using a tungsten halogen lamp in doping with the conductive impurities by a plasma doping method, and the impurity diffusion layer 20 may be formed by activating the conductive impurities in the impurity doping layer 15 while the microwave 14 is irradiated.
In the present embodiment, a producing method for a CMOS (Complementary Metal Oxide Semiconductor) transistor as a semiconductor device is described by using
First, as shown in
For details, the p-type well 42 is formed in the nMOS region 4a and the n-type well 43 is formed in the pMOS region 4b. The element isolation insulating film 44 is formed in a boundary between the p-type well 42 and the n-type well 43 by a CVD method, for example. The element isolation insulating film 44 may be formed by using a silicon oxide film, for example. The gate insulating film 45 is formed with a film thickness of 5 nm or less on the p-type well 42 and the n-type well 43. The gate insulating film 45 may be formed by using SiOxNy or metal oxide or metal silicate of Hf, Zr, La, Al and Ti.
Next, as shown in
Then, as shown in
For details, the pMOS region 4b is masked so that the pMOS region 4b is not injected with n-type conductive impurities. On this occasion, it is desirable to mask with a carbon film or a silicon nitride film with a thickness of 50 nm or less, which is more heat-resistant than a photoresist. Then, conductive impurities such as P are injected into the nMOS region 4a at an injection amount of 1E14 cm−2 to 2E15 cm−2 by an ion implantation method to form the impurity injection layer 47. On this occasion, heating is performed by using a tungsten halogen lamp so that the substrate temperature of the p-type substrate 41 is 200 to 500° C. Subsequently, after removing the mask, the nMOS region 4a is next masked similarly and conductive impurities such as B are injected into the pMOS region 4b at an injection amount of 1E14 cm−2 to 2E15 cm−2 by an ion implantation method to form the shallow impurity injection layer 48. Also on this occasion, heating is performed so that the substrate temperature of the p-type substrate 41 is 200 to 500° C. similarly to the formation of the above-mentioned shallow impurity injection layer 47. In the case of forming the impurity injection layers 47 and 48 with a depth of 20 nm or less, the injection of the above-mentioned conductive impurities is preferably performed by using a plasma doping method instead of ion implantation.
Next, as shown in
In addition, as shown in
Then, as shown in
For details, after the pMOS region 4b is masked, conductive impurities such as P are injected into the nMOS region 4a at an injection amount of 2E15 cm−2 to 5E15 cm−2 by an ion implantation method to form the deep impurity injection layer 51 expanding more deeply than the shallow impurity diffusion layer 53 from the top surface of the p-type well 42. On this occasion, similarly to the first embodiment, heating is performed by using a tungsten halogen lamp so that the substrate temperature of the p-type substrate 41 is 200 to 500° C. Subsequently, after removing the mask, the nMOS region 4a is masked and conductive impurities such as B are injected into the pMOS region 4b by an ion implantation method to form the deep impurity injection layer 52 expanding more deeply than the shallow impurity diffusion layer 54 from the top surface of the n-type well 43. Also on this occasion, heating is performed similarly to the formation of the above-mentioned deep impurity injection layer 51. In the case of forming the deep impurity injection layers 51 and 52 with a depth of 20 nm or less, the injection of the above-mentioned conductive impurities is preferably performed by using a plasma doping method. Similarly to the above, it is desirable to use as a mask a carbon film or a silicon nitride film with a thickness of 100 nm or less, which is more heat-resistant than a photoresist.
Next, as shown in
In the above-mentioned description, the irradiation of the microwave 57 for activating the conductive impurities is performed twice, and yet the first microwave irradiation may be omitted in the case where the injection amount of the conductive impurities is small.
Subsequently, a desired transistor is obtained through well-known steps.
According to the fifth embodiment, ion implantation while heating allows a crystal defect caused by ion implantation to be restored, so that a crystal defect may be greatly decreased. By extension, the yield may be improved in the production of a semiconductor device.
In the present embodiment, an example of a producing method for a CMOS transistor different from the fifth embodiment is described, and a producing method for forming one of nMOS and pMOS in a CMOS transistor is herein described as an example.
First, as shown in
Next, conductive impurities such as As, P and B in accordance with electrical conductivity of a CMOS transistor are injected at an injection amount of 1E14 cm−2 to 2E15 cm−2 by an ion implantation method while using the dummy gate 64 as a mask to form a shallow impurity injection layer (not shown in figures) with a depth of 20 nm or less from the top surface of the substrate 61. On this occasion, similarly to the first embodiment, heating is performed by using a tungsten halogen lamp so that the substrate temperature of the substrate 61 is 200 to 500° C. A plasma doping method may be used instead of ion implantation.
Then, a sidewall 67 is formed on the side face of the dummy gate 64. This sidewall 67 is made of an insulating film, and may be made of a silicon oxide film, a silicon nitride film, or a laminated structure of a silicon oxide film and a silicon nitride film. The silicon nitride film is preferably composed so that a nitrogen atom is 1 or more and 3.5 or less with respect to one silicon atom. For details, the insulating film is formed on the whole surface of the substrate 61 by a CVD method to subsequently form the sidewall 67 by removing the insulating film so as to expose part of the substrate 61 and the element isolation insulating film 62 by an RIE method.
In addition, conductive impurities such as As, P and B in accordance with electrical conductivity of a CMOS transistor are injected into a region as a source drain region in the substrate 61 at an injection amount of 2E15 cm−2 to 5E15 cm−2 by an ion implantation method to form a deep impurity injection layer (not shown in figures) ranging more deeply than a shallow impurity diffusion layer from the top surface of the substrate 61. On this occasion, similarly to the first embodiment, heating is performed by using a tungsten halogen lamp so that the substrate temperature of the substrate 61 is 200 to 500° C.
Next, similarly to the second embodiment, the microwave of 2.45 GHz or more, desirably, 5.8 GHz to 30 GHz is irradiated to activate the injected conductive impurities and then form a deep impurity diffusion layer 69 as shown in
Then, an interlayer insulating film 70 is formed on the substrate 61 by a CVD method to expose the dummy gate 64 by flattening the interlayer insulating film 70 by a CMP (Chemical Mechanical Polishing) method. This interlayer insulating film 70 may be formed out of a silicon oxide film or a fluoridated silicon oxide film (SiOF) with lower dielectric constant than a silicon oxide film. In addition, as shown in
In addition, as shown in
Next, as shown in
According to the sixth embodiment, ion implantation while heating allows a crystal defect caused by ion implantation to be restored, so that a crystal defect may be greatly decreased. By extension, the yield may be improved in the production of a semiconductor device.
A producing method for a semiconductor device according to the present embodiment is described by using
A semiconductor layer 81 as shown in
Next, as shown in
Then, as shown in
For details, first, the second impurities 92 for restraining the first impurities 91 from diffusing are injected. Examples of these second impurities 92 include impurities containing C, F or N as the form of an atomic ion or a molecular ion. For further details, examples of the second impurities 92 include carbon in the form of an atomic ion, and carbon containing at least one kind of the form of a molecular ion which satisfies CdHe (d is an integer of 2 or more and e is an integer of 6 or more) such as C7H7, C12H12 or C14H14. In addition, examples of the second impurities 92 include a molecular ion containing fluorine such as F2 and PF3, and a molecular ion containing nitrogen such as N2 and NH3. The second impurities 92 are preferable such that contact resistivity and leak current in a semiconductor device rise with difficulty even in the case of increasing impurity concentration of the second impurities 92; accordingly, impurities containing carbon are the most preferable and impurities containing fluorine are secondly preferable. However, when fluorine concentration increases greatly, there is a possibility that leak current of a semiconductor device rises, so that it is not preferable to use impurities containing fluorine as the second impurities 92 in a semiconductor device in which the conditions regarding leak current are strict.
For example, in a diluent gas atmosphere of helium or hydrogen, the second impurities 92 are injected into the source drain region 86 exposed to the bottom 90 of the contact holes 89. These second impurities 92 are preferably injected by a smaller amount than the first impurities 91, more preferably by an amount of 20% or less of the first impurities 91. On this occasion, the substrate temperature is preferably determined lower than the substrate temperature during the injection of the first impurities 91 performed thereafter, more preferably determined at room temperature or lower. Such injection of the second impurities 92 allows a damage layer (a crystal defect layer) to be formed in the impurity injection layer 93, and the presence of the damage layer allows an orbit of the first impurities 91 in the impurity injection layer 93 to be thereafter disordered and disturbed during the injection of the first impurities 91, that is, channeling to be restrained, and allows the first impurities 91 to be restrained from diffusing. Accordingly, the first impurities 91 may be distributed more steeply.
Subsequently, the first impurities 91 are injected. P and B in the form of a molecular ion except for the atomic conductive impurities such as P, B and As described above may be used as the first impurities (conductive impurities) 91 for controlling the conductive type of the impurity injection layer 93. For details, examples of P in the form of a molecular ion include P containing at least one kind of molecular ions which satisfy Pa (a is an integer of 2 or more) such as P2 or P4, and examples of B in the form of a molecular ion include B containing at least one kind of molecular ions which satisfy BbHc (b is an integer of 2 or more and c is an integer of 6 or more) such as B10H14, B18H22, B20H28 or B36H44.
These first impurities 91 are injected into the source drain region 86 on the conditions of an injection amount of 1E15 cm−2 to 5E15 cm−2. On this occasion, similarly to the first embodiment, the semiconductor layer 81 is heated by using a tungsten halogen lamp so that the substrate temperature of the semiconductor layer 81 is 200 to 500° C. Thus, similarly to the embodiments described above, a crystal defect caused by the first and second impurities 91 and 92 may be restored.
The order of the injection of the first impurities 91 and the second impurities 92 is not limited to the above, and the injection of these impurities is more preferably in an order of injecting the second impurities 92 before injecting the first impurities 91. The performance of the injection in this order may restrain diffusion during the injection of the first impurities 91 as compared with the case of injecting simultaneously or in inverse order, and the first impurities 91 may be distributed more steeply.
Next, as shown in
Subsequently, a desired transistor is obtained through well-known steps.
According to the seventh embodiment, ion implantation while heating allows a crystal defect caused by ion implantation to be restored, so that a crystal defect may be greatly decreased. By extension, the yield may be improved in the production of a semiconductor device. In addition, the injection of the second impurities 92 allows channeling of the first impurities 91 to be restrained, diffusion of the first impurities 91 to be restrained, the first impurities 91 to be distributed more steeply, and the thinner impurity diffusion layer 94 to be formed.
The eighth embodiment differs from the seventh embodiment in irradiating a microwave 95 instead of heating treatment in activating the first impurities 91 in the impurity injection layer 93 to form the impurity diffusion layer 94. A producing method for a semiconductor device according to the present embodiment is described by using
First, the steps shown in
Next, similarly to the second embodiment, the microwave 95 of 2.45 GHz or more, desirably, 5.8 GHz to 30 GHz is irradiated to activate the first impurities 91 in the impurity injection layer 93 and then form the impurity diffusion layer 94 as shown in
According to the eighth embodiment, ion implantation while heating allows a crystal defect caused by ion implantation to be restored, so that a crystal defect may be greatly decreased. By extension, the yield may be improved in the production of a semiconductor device. In addition, the injection of the second impurities 92 allows channeling of the first impurities 91 to be restrained, diffusion of the first impurities 91 to be restrained, the first impurities 91 to be distributed more steeply, and the thinner impurity diffusion layer 94 to be formed.
The ninth embodiment is a producing method for a semiconductor device such as to inject conductive impurities into a narrow region surrounded by an element isolation insulating film 102, and this narrow region is a region 40 nm or less square. The present embodiment is described by using
As shown in
Next, as shown in
For details, carbon, fluorine or nitrogen as the second impurities 104 for restraining the first impurities 103 from diffusing is injected into the semiconductor layer 101 located between the element isolation insulating films 102, similarly to the seventh and eighth embodiments. The injection amount is 1E14 cm−2 to 1E15 cm−2. On this occasion, similarly to the seventh and eighth embodiments, the substrate temperature is preferably determined lower than the substrate temperature during the injection of the first impurities 103 performed thereafter, more preferably determined at room temperature or lower. Next, conductive impurities such as As, P and B are injected as the first impurities 103 by an ion implantation method on the conditions of an injection amount of 5E14 cm−2 to 5E15 cm−2 while heating from the top surface side of the semiconductor layer 101 by using a tungsten halogen lamp so that the substrate temperature is 200 to 500° C. Alternatively, a back surface side of the semiconductor layer 101 may be heated by using an electrostatic chuck with a hot plate. Also, the top surface side and the back surface side of the semiconductor layer 101 may be heated. Thus, the impurity injection layer 105 is formed in the semiconductor layer 101 located between the element isolation insulating films 102. Thus, the performance of heating simultaneously with ion implantation allows ion implantation to be performed while restoring a crystal defect.
Next, as shown in
According to the ninth embodiment, ion implantation while heating allows a crystal defect caused by ion implantation to be restored, so that a crystal defect may be greatly decreased. By extension, the yield may be improved in the production of a semiconductor device. In addition, the injection of the second impurities 104 allows channeling of the first impurities 103 to be restrained, diffusion of the first impurities 103 to be restrained, and the thinner impurity diffusion layer 106 to be formed.
The tenth embodiment differs from the ninth embodiment in irradiating a microwave 107 instead of heating treatment in activating the first impurities 103 in the impurity injection layer 105 to form the impurity diffusion layer 106. A producing method for a semiconductor device according to the present embodiment is described by using
First, the steps shown in
Next, similarly to the second embodiment, the microwave 107 of 2.45 GHz or more, desirably, 5.8 GHz to 30 GHz is irradiated to activate the first impurities 103 in the impurity injection layer 105 and then form the impurity diffusion layer 106 as shown in
According to the tenth embodiment, ion implantation while heating allows a crystal defect caused by ion implantation to be restored, so that a crystal defect may be greatly decreased. By extension, the yield may be improved in the production of a semiconductor device. In addition, the injection of the second impurities 104 allows channeling of the first impurities 103 to be restrained, diffusion of the first impurities 103 to be restrained, and the thinner impurity diffusion layer 106 to be formed.
The eleventh embodiment is a production device usable in a producing method for a semiconductor device of the embodiments described above, whereby doping of conductive impurities may be performed by a plasma doping method while heating.
As shown in
The twelfth embodiment is a device usable for performing a producing method for a semiconductor device of the embodiments described above, and differs from the production device of the eleventh embodiment in that doping of conductive impurities may be performed by a plasma doping method while irradiating a microwave.
Here, only the difference from the device of the eleventh embodiment is described, and as shown in
In the first to twelfth embodiments described above, the substrate temperature of the semiconductor layer in doping the semiconductor layer with the conductive impurities 16 is determined at 200 to 500° C., and this substrate temperature allows the effect of restoring a crystal defect to be expected and allows the conductive impurities 16 to avoid diffusing deep into the semiconductor layer more than necessary. The details of the substrate temperature of the semiconductor layer in doping the semiconductor layer with the conductive impurities 16 are described below by using
The inventors of the present invention ion-implanted P (phosphorus) as the conductive impurities 16 into a 20 nm-wide silicon layer held between silicon oxide films while heating similarly to the above-mentioned embodiments. On this occasion, plural samples were produced by modifying heating temperature (substrate temperature). Next, similarly to the above-mentioned embodiments, the plural samples were irradiated with a microwave to activate the conductive impurities 16 and then form an impurity diffusion layer in the silicon layer in the plural samples. In addition, when a crystal defect density of the impurity diffusion layer in these plural samples was measured, the data showing a correlation between the substrate temperature and the crystal defect density was offered as shown in
Next, similarly to the above, the inventors of the present invention ion-implanted B (boron) as the conductive impurities 16 into a 20 nm-wide silicon layer held between silicon oxide films while heating similarly to the above-mentioned embodiments (the concentration was 5E18 cm−3). On this occasion, plural samples were produced by modifying heating temperature (substrate temperature). Next, similarly to the above-mentioned embodiments, the plural samples were irradiated with a microwave to activate the conductive impurities 16 and then form an impurity diffusion layer in the silicon layer in the plural samples. In addition, when the depth of the distribution of boron (the depth from the surface of the silicon layer) in these plural samples was measured, the data showing a correlation between the substrate temperature and the depth of the distribution of boron was offered as shown in
Based on the above data, it is desirable for expecting the effect of restoring a crystal defect and avoiding the deep diffusion of the conductive impurities 16 into the semiconductor layer more than necessary that the substrate temperature of the semiconductor layer in doping the semiconductor layer with the conductive impurities 16 is determined at 200 to 500° C.
The modification example described in the second embodiment, such that impurities such as F, C and N are injected before injecting the conductive impurities 16, may be also applied to the first, third, fifth and sixth embodiments; thus, channeling of the conductive impurities 16 is restrained and diffusion of the conductive impurities 16 is restrained, so that the conductive impurities 16 may be distributed more steeply.
The method for injecting the first impurities as the conductive impurities 16 and the second impurities for restraining channeling of the first impurities, described in the seventh embodiment, may be applied to the first to tenth embodiments, including the case where the second impurities are in the form of a molecular ion.
In injecting the impurities for restraining channeling of the conductive impurities 16, the substrate temperature is preferably determined lower than the substrate temperature during the injection of the conductive impurities 16, more preferably determined at room temperature or lower.
In the first to twelfth embodiments described above, the semiconductor substrate is not limited to a substrate made of silicon but may be other substrates such as a SiGe substrate, a Ge substrate and a C substrate. Also, the semiconductor substrate may be such various substrates on which a semiconductor element structure and an insulating layer are formed entirely or partially.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2011-209629 | Sep 2011 | JP | national |
