Recess gate type transistor and method for fabricating the same

Information

  • Patent Application
  • 20070152267
  • Publication Number
    20070152267
  • Date Filed
    August 10, 2006
    19 years ago
  • Date Published
    July 05, 2007
    18 years ago
Abstract
A semiconductor device having recess gates and a method for fabricating the same. The semiconductor device includes a semiconductor substrate having inverse triangular recesses formed therein; a gate insulating film having a designated thickness formed on the semiconductor substrate; gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; and first and second junction regions formed in the semiconductor substrate and opposed to each other so that the corresponding one of the gate electrodes is interposed therebetween.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:



FIG. 1 is a schematic, sectional view of a conventional recess gate type transistor:



FIGS. 2 to 9 are schematic, sectional views illustrating a method for fabricating a recess gate type transistor in accordance with one embodiment of the invention; and



FIGS. 10 to 14 are schematic, sectional views illustrating a method for fabricating a recess gate type transistor in accordance with another embodiment of the invention.


Claims
  • 1. A semiconductor device having recess gates comprising: a semiconductor substrate having inverse triangular recesses formed therein;a gate insulating film having a designated thickness formed on the semiconductor substrate;gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; andfirst and second junction regions formed in the semiconductor substrate and opposed to each other so that a corresponding gate electrode is interposed there between.
  • 2. The semiconductor device of claim 1, wherein the inverse triangular recess has one shape selected from the group consisting of an inverse triangle having three sides having different lengths, an inverse isosceles triangle, an inverse right-angle triangle, and an inverse equilateral triangle.
  • 3. The semiconductor device of claim 1, wherein the gate electrodes have a structure wherein a gate conductive film and a gate metal film are sequentially stacked.
  • 4. The semiconductor device of claim 1, wherein one of the first and second junction regions is a source region and the other of the first and second junction regions is a drain region.
  • 5. A semiconductor device having recess gates comprising: a semiconductor substrate having inverse triangular recesses formed therein;first and second regions formed in the semiconductor substrate to have different heights and opposed to each other so that a corresponding one of the inverse triangular recesses is interposed therebetween;a gate insulating film having a designated thickness formed on the semiconductor substrate;gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; andfirst and second junction regions formed at the first and second regions by ion implantation.
  • 6. The semiconductor device of claim 5, wherein the inverse triangular recesses have one shape selected from the group consisting of an inverse triangle having three sides having different lengths, an inverse isosceles triangle, an inverse right-angle triangle, and an inverse equilateral triangle.
  • 7. The semiconductor device of claim 5, wherein one of the first and second junction regions is a source region and the other of the first and second junction regions is a drain region.
  • 8. A method for fabricating a semiconductor device having recess gates comprising: forming inverse triangular recesses by selectively etching the surface of a semiconductor substrate at a tilt;implanting ions into the inverse triangular recesses;forming a gate insulating film and gate electrodes filling the inverse triangular recesses on the surface of the semiconductor substrate exposed by the inverse triangular recesses; andforming first and second junctions, opposed to each other so that a corresponding one of the gate electrodes is interposed therebetween, in the semiconductor substrate.
  • 9. The method of claim 8, further comprising performing a light etch treatment for rounding off angles of the recesses, after the forming the inverse triangular recesses.
  • 10. The method of claim 8, wherein the implantation of the ions comprises the steps of: firstly implanting ions into the inverse triangular recesses for adjusting a threshold voltage; andsecondly implanting ions into the inverse triangular recesses by count doping.
  • 11. The method of claim 10, comprising implanting the ions into all inner surfaces of the inverse triangular recesses at a tilt in the first ion implantation step.
  • 12. The method of claim 10, comprising implanting the ions into one inner side surface of each of the inverse triangular recesses at a tilt in the second ion implantation step.
  • 13. A method for fabricating a semiconductor device having recess gates comprising: forming inverse triangular recesses by selectively etching the surface of a semiconductor substrate at a tilt;forming first and second regions having different heights in the semiconductor substrate and opposed to each other so that a corresponding one of the inverse triangular recesses is interposed therebetween;implanting ions into the inverse triangular recesses;forming a gate insulating film and gate electrodes filling the inverse triangular recesses on the surface of the semiconductor substrate exposed by the inverse triangular recesses; andforming first and second junctions at the first and second regions.
  • 14. The method of claim 13, comprising performing etching or epitaxial growth on the first and/or second regions in the step of forming the first and second regions having different heights.
  • 15. The method of claim 13, further comprising performing a light etch treatment for rounding off angles of the recesses, after forming the inverse triangular recesses.
  • 16. The method of claim 13, wherein the step of implantating the ions comprises the steps of: firstly implanting ions into the inverse triangular recesses for adjusting a threshold voltage; andsecondly implanting ions into the inverse triangular recesses by count doping.
  • 17. The method of claim 13, comprising implanting the ions into all inner surfaces of the inverse triangular recesses at a tilt in the first ion implantation step.
  • 18. The method of claim 13, comprising implanting the ions into one inner side surface of each of the inverse triangular recesses at a tilt in the second ion implantation step.
Priority Claims (1)
Number Date Country Kind
2005-134296 Dec 2005 KR national