Roughness reducing film at interface, materials for forming roughness reducing film at interface, wiring layer and semiconductor device using the same, and method for manufacturing semiconductor device

Abstract

Techniques for obtaining a wiring layer with a high TDDB resistance and little leakage current, and accordingly, for manufacturing a highly reliable semiconductor device with a small electric power consumption are provided, in which an interfacial roughness reducing film is formed which is in contact with an insulator film and also in contact with a wiring line on the other side surface thereof, and has an interfacial roughness between the wiring line and the interfacial roughness reducing film smaller than that between the insulator film and the interfacial roughness reducing film.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic view (cross-sectional view) showing an example of a method for manufacturing a multilayer wiring structure according to the present invention;

FIG. 2 is a schematic view (cross-sectional view) showing an example of a method for manufacturing a multilayer wiring structure according to the present invention;

FIG. 3 is a schematic view (cross-sectional view) showing an example of a method for manufacturing a multilayer wiring structure according to the present invention;

FIG. 4 is a schematic view (cross-sectional view) showing an example of a method for manufacturing a multilayer wiring structure according to the present invention;

FIG. 5 is a schematic view (cross-sectional view) showing an example of a method for manufacturing a multilayer wiring structure according to the present invention;

FIG. 6 is a schematic view (cross-sectional view) showing an example of a method for manufacturing a multilayer wiring structure according to the present invention;

FIG. 7 is a schematic view (cross-sectional view) showing an example of a method for manufacturing a multilayer wiring structure according to the present invention;

FIG. 8 is a schematic view (cross-sectional view) showing an example of a method for manufacturing a multilayer wiring structure according to the present invention;

FIG. 9 is a schematic view (cross-sectional view) showing an example of a method for manufacturing a multilayer wiring structure according to the present invention;

FIG. 10 is a schematic view (cross-sectional view) showing an example of a method for manufacturing a multilayer wiring structure according to the present invention;

FIG. 11 is a schematic plan view showing an insulator film/interfacial roughness reducing film/wiring structure; and

FIG. 12 is a schematic plan view showing an insulator film/interfacial roughness reducing film/wiring structure.

Claims

1. An interfacial roughness reducing film in contact with an insulator film and also in contact with a wiring line on the other side surface thereof, wherein the interfacial roughness between said wiring line and said interfacial roughness reducing film is smaller than that between said insulator film and said interfacial roughness reducing film.

2. An interfacial roughness reducing film according to claim 1, wherein said interfacial roughness reducing film has been installed after a treatment accompanied by surface roughening of said insulator film.

3. An interfacial roughness reducing film according to claim 1, said interfacial roughness reducing film comprising: silicon, andfurther, at least one of oxygen and carbon.

4. An interfacial roughness reducing film according to claim 1, said interfacial roughness reducing film comprising at least one of an SiO skeleton and SiC skeleton.

5. An interfacial roughness reducing film according to claim 1, wherein said insulator film is a low dielectric constant insulator film having a relative dielectric constant of 2.7 or less.

6. A wiring layer comprising an interfacial roughness reducing film according to claim 1.

7. A semiconductor device comprising an interfacial roughness reducing film according to claim 1.

8. A material for forming an interfacial roughness reducing film that is used for an interfacial roughness reducing film in contact with an insulator film and also in contact with a wiring line on the other side surface thereof, wherein the interfacial roughness between said wiring line and said interfacial roughness reducing film is smaller than that between said insulator film and said interfacial roughness reducing film, said material comprising a silicon compound that satisfies at least one of a condition of having an average molecular weight of not more than 1,000, and another condition of having 20 or less silicon atoms in a molecule.

9. A material for forming an interfacial roughness reducing film according to claim 8, wherein said interfacial roughness reducing film has been installed after a treatment accompanied by surface roughening of said insulator film.

10. A material for forming an interfacial roughness reducing film according to claim 8, wherein said silicon compound is selected from the group consisting of an organosilane, a hydrolysate of an organosilane, a condensate of an organosilane and a mixture thereof.

11. A material for forming an interfacial roughness reducing film according to claim 10, said material comprising a solvent that is the same as a component contained in a product obtained by hydrolyzing said organosilane.

12. A material for forming an interfacial roughness reducing film according to claim 11, wherein said organosilane is represented by any of the following formulae (1) to (4), and (1′), Si(OR7)4   (1)R1Si(OR8)3   (2)R2R3Si(OR9)2   (3)R4R5R6SiOR10   (4)R1′x(OR2′(4-x))Si—[R7′—SiR5′R6′]n—R8′—SiR3′y(OR4′(4.y))   (1′)

13. An interfacial roughness reducing film according to claim 1, said interfacial roughness reducing film is manufactured using said material for forming an interfacial roughness reducing film according to claim 8.

14. A wiring layer that is manufactured using said material for forming an interfacial roughness reducing film according to claim 8.

15. A semiconductor device that is manufactured using said material for forming an interfacial roughness reducing film according to claim 8.

16. A method for manufacturing a semiconductor device comprising: applying said material for forming an interfacial roughness reducing film according to claim 8, in contact with an insulator film of said semiconductor device; and then,forming an interfacial roughness reducing film by heating said semiconductor device at a temperature of from 80 to 500° C. for 0.5 to 180 minutes.

17. A method for manufacturing a semiconductor device according to claim 16, wherein said insulator film has been subjected to a treatment accompanied by surface roughening.

18. A method for manufacturing a semiconductor device according to claim 16, wherein said application is spin coating or vapor treating.

19. A method for manufacturing a semiconductor device according to claim 16, wherein said insulator film is obtained by treatment comprising: applying to a substrate for processing a liquid composition comprising an organosilicon compound obtained by hydrolysis of one or more in combination of silane compounds represented by the following formulae (5) to (8), in the presence of tetraalkylammonium hydroxide; subjecting the coating film of said liquid composition applied onto said substrate to a heat processing at a temperature not less than 80 and not more than 350° C.; and baking said coating film heated in the heat treatment at a temperature more than 350 and not more than 450° C., Si(OR11)4   (5)X1Si(OR12)3   (6)X2X3Si(OR13)2   (7)X4X5X6SiOR14   (8)

20. A semiconductor device that is manufactured using a manufacturing method according to claim 16.