SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Abstract

A semiconductor device includes a substrate including a compound semiconductor, a semiconductor layer formed on a surface of the substrate and a constituent of the semiconductor layer including a nitride semiconductor different from a constituent of the substrate, a via hole provided in the substrate and configured to extend from a rear surface side of the substrate to the semiconductor layer, a ground electrode formed on an inner wall of the via hole, a contact layer provided in the semiconductor layer and configured to extend from a surface of the semiconductor layer to the ground electrode, a gate electrode and a drain electrode, each of which being formed on the semiconductor layer, and a source electrode formed on the semiconductor layer and connected to the ground electrode through the contact layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which is incorporated in and constitute a part of this specification, illustrates an embodiment of the invention and together with the description, serve to explain the principles of the invention.

FIG. 1 is a sectional view of an FET element according to one embodiment of the present invention;

FIGS. 2 to 4 are views showing steps in manufacturing the FET element in FIG. 1; and

FIG. 5 is a sectional view of an FET element according to one embodiment of the present invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

Reference will now be made in detail to the present embodiment of the invention, an example of which is illustrated in the accompanying drawing. Wherever possible, the same reference numbers will be used throughout the drawing to refer to the same or like parts.

An embodiment of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a sectional view of an FET element serving as a semiconductor device according to the embodiment. As shown in FIG. 1, a semiconductor layer 12 consisting of, for example, GaN is formed on a SiC substrate 11. A gate electrode 13, a source electrode 14, and a drain electrode 15 are formed on a surface of the semiconductor layer 12. A via hole 16 reaching the semiconductor layer 12 is formed in the substrate 11. A ground electrode 17 is formed on an inner wall of the via hole 16 and a rear surface of the substrate 11. In the semiconductor layer 12, a contact 18 for connecting the source electrode 14 and the ground electrode 17 is formed.

The semiconductor device is formed as follows. As shown in FIG. 2, the semiconductor layer 12 is formed on the substrate 11. As shown in FIG. 3, for example, simultaneously with an element isolation step, in a predetermined region of the semiconductor layer 12, a contact hole extending from the surface of the semiconductor layer 12 to the substrate 11 is formed by RIE using, for example, a Cl₂ gas. The contact hole is filled with a metal layer containing, for example, Ni or Al to form the contact 18.

As shown in FIG. 4, the via hole 16 is formed in the substrate 11 by RIE using a fluorine-based gas such as SF₆ or CF₄ to reach the semiconductor layer 12 and the contact 18. On the inner wall of the via hole 16 and the rear surface of the substrate 11, the ground electrode 17 including an Au layer having a thickness of, for example, about several micrometers is formed.

Furthermore, after an active element region (not shown) is formed, the source electrode 14 connected to the contact 18 and the drain electrode 15 are formed on the surface of the semiconductor layer 12, and the gate 13 electrode is formed between the source electrode 14 and the drain electrode 15. An Au layer may be formed on the source electrode 14 and the drain electrode 15. In this manner, an FET element as shown in FIG. 1 is formed.

With this configuration, each source electrode 14 is connected to the ground electrode 17 through the contact 18 to make it possible to reduce a source inductance. For example, simultaneously with an element isolation step, a contact hole can be formed in the semiconductor layer 12. Therefore, the via hole 16 is formed without requiring a complex process such as exchange of etching gases when the semiconductor layer 12 is exposed. When the via hole 16 is formed by RIE using a fluorine-based gas, a selectivity of the substrate 11 to the semiconductor layer 12 can be made sufficiently high. For this reason, the semiconductor layer 12 can be used as a stopper layer.

The via hole 16 needs not be connected to the source electrode 14 through the contact 18 in the active element region. As shown in FIG. 5, the via hole 16 and the contact 18 may be formed outside the active element region, and may be connected to the source electrode 14 through an electrode 19 by an air bridge 20.

The GaN layer is used as a semiconductor layer, any nitrogen-based semiconductor layer can be used. In addition to a GaN-based single layer film, an AlGaN-based single layer film, an AlN-based single layer film, and a laminated layer film including a GaN-based layer, an AlGaN-based layer and AlN-based layer, such as a GaN/AlGaN/AlN/SiN film can be used.

The configuration is used in an FET element such as a HEMT (High Electron Mobility Transistor), a MESFET (Metal Semiconductor Field Effect Transistor), and a MOSFET (Metal oxide semiconductor field effect transistor). These FET elements are applied to a monolithic microwave integrated circuit including the FET elements as constituent elements. The monolithic microwave integrated circuit is used as, for example, a high frequency semiconductor device or a power conversion apparatus.

Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.

Claims

1. A semiconductor device comprising: a substrate including a compound semiconductor;a semiconductor layer formed on a surface of the substrate, a constituent of the semiconductor layer including a nitride semiconductor different from a constituent of the substrate;a via hole provided in the substrate and configured to extend from a rear surface side of the substrate to the semiconductor layer;a ground electrode formed on an inner wall of the via hole;a contact layer provided in the semiconductor layer and configured to extend from a surface of the semiconductor layer to the ground electrode;a gate electrode and a drain electrode, each of which being formed on the semiconductor layer, anda source electrode formed on the semiconductor layer and connected to the ground electrode through the contact layer.

2. The semiconductor device according to claim 1, wherein the ground electrode is further formed on the rear surface of the substrate.

3. The semiconductor device according to claim 1, wherein the substrate includes a SiC substrate.

4. The semiconductor device according to claim 1, wherein the semiconductor layer includes a GaN-based semiconductor layer.

5. The semiconductor device according to claim 1, wherein the via hole is formed immediately below the source electrode.

6. The semiconductor device according to claim 1, wherein the via hole is arranged away from a position immediately below the source electrode.

7. The semiconductor device according to claim 1, wherein the contact layer and the source electrode are connected by an air bridge.

8. A method of manufacturing a semiconductor device, the method comprising: forming a semiconductor layer including a nitride semiconductor on a substrate including a compound semiconductor, a constituent of the semiconductor layer different from a constituent of the substrate;forming a contact extending from a semiconductor layer side to the substrate;forming a via hole extending from a substrate side to the contact; andforming a ground electrode connected to the contact on an inner wall of the via hole.

9. The method according to claim 8, wherein the via hole is formed by selectively etching the substrate to the semiconductor layer.

10. The method according to claim 8, wherein the etching is dry etching.

11. The method according to claim 8, further comprising forming a source electrode on the contact.

12. The method according to claim 8, further comprising forming an electrode connected to the source electrode on the contact.

13. The method according to claim 12, wherein the contact and the source electrode are connected by an air bridge.

14. The method according to claim 8, wherein the ground electrode is further formed on the rear surface of the substrate.

15. The method according to claim 8, wherein the substrate includes a SiC substrate.

16. The method according to claim 8, wherein the semiconductor layer includes a GaN-based semiconductor layer.