Patent Application
20240274500
The present disclosure relates to a semiconductor device and a method for manufacturing the same.
As the operating temperature of semiconductor chips increases, the temperature of the entire module increases, and there is a concern about its effect on the life against temperature change. Particularly, a solder joint portion is susceptible to the effect, which imposes great restrictions on the life of the module. In recent years, development of Ag-based and Cu-based joint materials that have higher heat cycle resistance than solder has proceeded. However, while its application to small-area joining such as joining of a chip has advanced, it is difficult to secure joint reliability for large-area joining such as joining of an insulating substrate. Further, the Ag-based and Cu-based joint materials are more expensive than solder and thus not appropriate to be used for a large area. Against this, a base plate obtained by impregnating porous SiC with Al by applying a pressure and integrally molded with an insulating substrate has been proposed (see, for example. PTL. 1), but it has not been put to practical use.
[PTL 1] JP 2003-297988 A
In PTL 1, the upper surfaces of a ceramic substrate and porous SiC are located on the same level, and aluminum foil is provided so as to cover the upper surfaces to hold the ceramic substrate. However, since it is necessary to provide aluminum foil, the production cost increases. Further, it is necessary to locate the upper surfaces of the ceramic substrate and the porous SiC on the same level, and thus, the degree of freedom in design is small.
The present disclosure has been made to solve the problems as described above, and an object thereof is to provide a semiconductor device with a high degree of freedom in design and capable of reducing its production cost, and a method for manufacturing the same.
A semiconductor device according to the present disclosure includes: porous SiC impregnated with metal including Al as a main component: a ceramic substrate; a circuit pattern provided on the ceramic substrate; and a semiconductor chip joined to the circuit pattern, wherein the porous SiC includes a bolding portion that holds the ceramic substrate.
In the present disclosure. the holding portion that holds the ceramic substrate is provided by changing the shape of the porous SiC. Thus, it is not necessary to provide aluminum foil for holding the ceramic substrate, which can reduce the production cost. Further, it is not necessary to locate the upper surfaces of the ceramic substrate and the porous SiC on the same level, which increases the degree of freedom in design.
A semiconductor device and a method for manufacturing the same according to the embodiments of the present disclosure will be described with reference to the drawings. The same components will be denoted by the same symbols. and the repeated description thereof may be omitted.
The thickness of the integrated base plate 1 is, for example, equal to or greater than 3 mm and equal to or less than 8 mm. The integrated base plate 1 has high heat dissipation, and the heat dissipation is caused mainly by the ceramic substrate 3. The ceramic substrate 3 is formed with, for example, alumina (Al2O3), aluminum nitride (AIN). silicon nitride (SiN), or the like.
A semiconductor chip 5 is joined to the circuit pattern 4 with joint material 6 such as solder material. Ag sintered material or Cu sintered material. Examples of the semiconductor chip 5 are an IGBT and a diode of Si, an MOSFET and an SBD of SiC, and the like. An upper electrode of the semiconductor chip 5 is electrically connected to a terminal (not illustrated) with a wire (not illustrated). Note that an exterior case may be attached to the integrated base plate 1. Further, the inside of the exterior case may be sealed with sealing resin.
Subsequently. a method for manufacturing the same of the present embodiment will be described.
Then, the porous SiC 2 on which the ceramic substrate 3 is placed is positioned in a mold 8 for shaping the integrated base plate 1. The porous SiC 2 is impregnated with metal 9 including Al as a main component through. for example. pressureless impregnation, pressure impregnation. die cast. or the like. Then, the metal 9 left on the upper surface of the ceramic substrate 3 is etched to form the circuit pattern 4. Thereafter, the semiconductor chip 5 is joined to the circuit pattern 4 with the joint material 6, and wire bonding and the like are performed.
In the related art. the upper surfaces of the ceramic substrate and the porous SiC are located on the same level, and aluminum foil is provided so as to cover the upper surfaces to hold the ceramic substrate. In contrast. in the present embodiment. the holding portion 7 that holds the ceramic substrate 3 is provided by changing the shape of the porous SiC 2. Thus, it is not necessary to provide aluminum foil for holding the ceramic substrate 3, which can reduce the production cost. Further. it is not necessary to locate the upper surfaces of the ceramic substrate 3 and the porous SiC 2 on the same level, which increases the degree of freedom in design.
Further, the ceramic substrate 3 and the base plate can be integrated without solder joint. The integrated base plate 1 has high heat dissipation, so that it is possible to achieve heat cycle resistance and high heat dissipation.
Further, pressureless impregnation is preferably used in impregnating the porous SiC 2 with metal. Pressureless impregnation can simplify a process compared to pressure impregnation. Further, after impregnating the porous SiC 2 with the metal 9. the metal 9 on the ceramic substrate 3 is etched to form the circuit pattern 4. This can simplify the process and reduce the production cost.
The position of the ceramic substrate 3 is determined by the holding portions 7 at the three or more locations. Further, stress to the ceramic substrate 3 can be alleviated. Still further. compared to the first embodiment in which the porous SiC 2 is in contact with the entire side surface of the ceramic substrate, it is possible to reduce the raw materials, so that it is possible to largely reduce the production cost, particularly, in a case where the porous SiC 2 is formed using a 3D printer. Other configurations and effects are similar to those in the first embodiment.
The semiconductor chip 5 is not limited to a chip formed of silicon, but instead may be formed of a wide-bandgap semiconductor having a bandgap wider than that of silicon. The wide-bandgap semiconductor is, for example, a silicon carbide, a gallium-nitride-based material. or diamond. A semiconductor chip formed of such a wide-bandgap semiconductor has a high voltage resistance and a high allowable current density. and thus can be miniaturized. The use of such a miniaturized semiconductor chip enables the miniaturization and high integration of the semiconductor device in which the semiconductor chip is incorporated. Further. since the semiconductor chip has a high heat resistance, a radiation fin of a heatsink can be miniaturized and a water-cooled part can be air-cooled. which leads to further miniaturization of the semiconductor device. Further, since the semiconductor chip has a low power loss and a high efficiency. a highly efficient semiconductor device can be achieved.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2021/048880 | 12/28/2021 | WO |
