SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Abstract
In one embodiment of the present invention, a method for manufacturing a semiconductor device includes: forming a to-be-removed layer on a semiconductor substrate; forming a semiconductor layer on the to-be-removed layer; forming a trench that passes through the semiconductor layer to the to-be-removed layer in an SOI region; removing the to-be-removed layer by using the trench and creating a cavity; and forming an insulating film in the cavity
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 shows the semiconductor memory device according to the first embodiment;



FIG. 2 shows the first stage (1/8) of the method for manufacturing the semiconductor memory device according to the first embodiment;



FIG. 3 shows the second stage (2/8) of the method for manufacturing the semiconductor memory device according to the first embodiment;



FIG. 4 shows the third stage (3/8) of the method for manufacturing the semiconductor memory device according to the first embodiment;



FIG. 5 shows the fourth stage (4/8) of the method for manufacturing the semiconductor memory device according to the first embodiment;



FIG. 6 shows the fifth stage (5/8) of the method for manufacturing the semiconductor memory device according to the first embodiment;



FIG. 7 shows the sixth stage (6/8) of the method for manufacturing the semiconductor memory device according to the first embodiment;



FIG. 8 shows the seventh stage (7/8) of the method for manufacturing the semiconductor memory device according to the first embodiment;



FIG. 9 shows the eighth stage (8/8) of the method for manufacturing the semiconductor memory device according to the first embodiment;



FIG. 10 shows the semiconductor memory device according to the second embodiment;



FIG. 11 shows the first stage (1/9) of the method for manufacturing the semiconductor memory device according to the second embodiment;



FIG. 12 shows the second stage (2/9) of the method for manufacturing the semiconductor memory device according to the second embodiment;



FIG. 13 shows the third stage (3/9) of the method for manufacturing the semiconductor memory device according to the second embodiment;



FIG. 14 shows the fourth stage (4/9) of the method for manufacturing the semiconductor memory device according to the second embodiment;



FIG. 15 shows the fifth stage (5/9) of the method for manufacturing the semiconductor memory device according to the second embodiment;



FIG. 16 shows the sixth stage (6/9) of the method for manufacturing the semiconductor memory device according to the second embodiment;



FIG. 17 shows the seventh stage (7/9) of the method for manufacturing the semiconductor memory device according to the second embodiment;



FIG. 18 shows the eighth stage (8/9) of the method for manufacturing the semiconductor memory device according to the second embodiment; and



FIG. 19 shows the ninth stage (9/9) of the method for manufacturing the semiconductor memory device according to the second embodiment.


Claims
  • 1. A method for manufacturing a semiconductor device comprising: forming a to-be-removed layer on a semiconductor substrate;forming a semiconductor layer on the to-be-removed layer;forming a trench that passes through the semiconductor layer to the to-be-removed layer in an SOI region;removing the to-be-removed layer by using the trench and creating a cavity; andforming an insulating film in the cavity.
  • 2. The method for manufacturing a semiconductor device according to claim 1, etching away the to-be-removed layer from the sides of the trench, by immersing the semiconductor substrate in an etchant.
  • 3. The method for manufacturing a semiconductor device according to claim 1, forming the insulating film which is a silicon oxide film in the cavity, by oxidizing the surface of the cavity.
  • 4. The method for manufacturing a semiconductor device according to claim 1, wherein the to-be-removed layer is a silicon germanium layer.
  • 5. The method for manufacturing a semiconductor device according to claim 1, further comprising: forming a memory cell in the SOI region; andforming a logic transistor in a bulk region.
  • 6. The method for manufacturing a semiconductor device according to claim 5, wherein the memory cell is a capacitorless memory cell.
  • 7. The method for manufacturing a semiconductor device according to claim 6, further comprising: forming a region for storing signal charges in the semiconductor layer in the SOI region.
  • 8. A method for manufacturing a semiconductor device comprising: forming a to-be-removed layer on a semiconductor substrate;removing a part of the to-be-removed layer from an SOI region;after removing the part of the to-be-removed layer in the SOI region, forming a semiconductor layer on the to-be-removed layer;forming a trench that passes through the semiconductor layer to the to-be-removed layer in the SOI region;removing the to-be-removed layer by using the trench and creating a cavity; andforming an insulating film in the cavity.
  • 9. The method for manufacturing a semiconductor device according to claim 8, etching away the to-be-removed layer from the sides of the trench, by immersing the semiconductor substrate in an etchant.
  • 10. The method for manufacturing a semiconductor device according to claim 8, forming the insulating film which is a silicon oxide film in the cavity, by oxidizing the surface of the cavity.
  • 11. The method for manufacturing a semiconductor device according to claim 8, wherein the to-be-removed layer is a silicon germanium layer.
  • 12. The method for manufacturing a semiconductor device according to claim 8, further comprising: forming a memory cell in the SOI region; andforming a logic transistor in a bulk region.
  • 13. The method for manufacturing a semiconductor device according to claim 12, wherein the memory cell is a capacitorless memory cell.
  • 14. The method for manufacturing a semiconductor device according to claim 13, further comprising: forming a region for storing signal charges in the semiconductor layer in the SOI region.
  • 15. A semiconductor device comprising: a semiconductor layer formed in an SOI region on a semiconductor substrate;an insulating film formed between the semiconductor substrate and the semiconductor layer in the SOI region;a memory cell formed on the semiconductor layer; andlinear isolation layers formed in the SOI region, the insulating film and the semiconductor layer being formed between the isolation layers.
  • 16. The semiconductor device according to claim 15, wherein the semiconductor layer includes: a portion formed on the semiconductor layer via the insulating film in the SOI region; anda portion directly formed on the semiconductor substrate in the SOI region.
  • 17. The semiconductor device according to claim 15, further comprising: a logic transistor formed in a bulk region on the semiconductor substrate, the height of the lower side of the insulating film being same with the height of the lower side of a gate insulating film that forms a part of the logic transistor.
  • 18. The semiconductor device according to claim 15, wherein the insulating film is a buried oxide film buried between the semiconductor substrate and the semiconductor layer.
  • 19. The semiconductor device according to claim 16, wherein a pn junction between the semiconductor substrate and the semiconductor layer is formed at a portion where the semiconductor layer is directly formed on the semiconductor substrate.
  • 20. The semiconductor device according to claim 16, wherein a source region is formed in an upper portion where the semiconductor layer is directly formed on the semiconductor substrate.
Priority Claims (1)
Number Date Country Kind
2006-074769 Mar 2006 JP national