Claims
- 1. A semiconductor device comprising:
a substrate layer of a first conductivity type, wherein the substrate layer has a top surface; an epitaxial layer of semiconductor material of the first conductivity type and located over the top surface of the substrate layer; a base region of a second conductivity type opposite to the first conductivity type and located in the epitaxial layer to extend from a top surface of the epitaxial layer to a first predetermined depth into the epitaxial layer; an emitter region of the first conductivity type in the base region; and a plurality of pedestal collector regions of the first conductivity type in a portion of the epitaxial layer and located under the base region.
- 2. The semiconductor device in accordance with claim 1 wherein:
the epitaxial layer has trenches adjacent to the plurality of pedestal collector regions; and the semiconductor device comprises:
a dielectric material deposited into the trenches in the epitaxial layer.
- 3. The semiconductor device in accordance with claim 2 wherein:
the base region and the emitter region are metallized.
- 4. A semiconductor device in accordance with claim 2 wherein:
the dielectric material comprises silicon dioxide.
- 5. The semiconductor device in accordance with claim 2 comprising:
a field oxide in areas adjacent to the epitaxial layer; and a screen oxide covering the epitaxial layer over the base region.
- 6. A semiconductor device in accordance with claim 5 wherein:
the dielectric material has recesses; and the semiconductor device comprises:
a nitride layer over the screen oxide; a polysilicon layer over the nitride layer and in the recesses; and a second nitride layer capping the polysilicon layer.
- 7. A semiconductor device in accordance with claim 6 comprising:
a third nitride layer over the second nitride layer; and an other polysilicon layer over the third nitride layer, wherein:
the third nitride layer, the second nitride layer, the polysilicon layer and the nitride layer have an emitter window; the third nitride layer covers vertical surfaces of the emitter window to reduce a width of the emitter window; and the other polysilicon layer is located in the emitter window.
- 8. A semiconductor device in accordance with claim 7 wherein:
the third nitride layer and the second nitride layer are patterned with holes.
- 9. A semiconductor device in accordance with claim 8 wherein:
a barrier metal is deposited into the holes; and the barrier metal is covered by a conductor layer.
- 10. A semiconductor device comprising:
a semiconductor layer having a plurality of trenches defining sidewalls in the semiconductor layer; a base region in the semiconductor layer; a layer of dielectric material in the plurality of trenches and having recesses in the plurality of trenches; and a doped polysilicon layer in the recesses of the layer of dielectric material, wherein:
the doped polysilicon layer is electrically coupled to the base region at the sidewalls of the semiconductor layer.
- 11. The semiconductor device of claim 10 comprising:
a collector region in the semiconductor layer underneath the base region; and an emitter region in the semiconductor layer above the base and the collector regions.
- 12. The semiconductor device of claim 11 comprising:
a substrate layer beneath the semiconductor layer, wherein:
he semiconductor layer is an epitaxial layer.
- 13. The semiconductor device of claim 12 wherein:
portions of the base and collector regions are defined by the sidewalls in the epitaxial layer.
- 14. The semiconductor device of claim 13 wherein:
the plurality of trenches extend through the epitaxial layer into the substrate layer beneath the epitaxial layer.
- 15. A method of manufacturing a semiconductor device having a bipolar transistor comprising:
etching trenches through a nitride layer and an oxide layer into an epitaxial layer to form pedestal collector regions; depositing dielectric into the trenches; etching recesses in the dielectric; and depositing polysilicon into the recesses.
- 16. A method of manufacturing a semiconductor device in accordance with claim 15 comprising:
doping the polysilicon in the recesses through an implant process; covering the polysilicon in the recesses with a second nitride layer; and capping the second nitride layer with a third nitride layer.
- 17. A method of manufacturing a semiconductor device in accordance with claim 16 comprising:
defining an emitter window above the pedestal collector regions; and dry etching the emitter window through the third nitride layer, the second nitride layer, the polysilicon and the nitride layer.
- 18. A method of manufacturing a semiconductor device in accordance with claim 17 comprising:
coating the emitter window with a spacer nitride to reduce a width of the emitter window.
- 19. A method of manufacturing a semiconductor device in accordance with claim 18 comprising:
etching the spacer nitride on horizontal surfaces of the emitter window; covering the emitter window with a polysilicon cap; implanting the polysilicon cap with a dopant; defining the polysilicon caps through a photoresist process; capping the polysilicon caps with an emitter nitride; and annealing the device to form an emitter region and a base enhancement region in the epitaxial layer.
- 20. A method of manufacturing in accordance with claim 19 comprising:
etching through the emitter nitride over the polysilicon caps and through the emitter nitride and the third nitride layer over horizontal regions over the recesses; metallizing the device by depositing a barrier metal over the emitter nitride, the polysilicon caps, the third nitride layer and the polysilicon; depositing a conductor layer over the barrier metal; etching the conductor layer and the barrier metal; and performing a standard passivation to protect the semiconductor device.
RELATED APPLICATION
[0001] U.S patent application Ser. No. 09/XXX,XXX, filed on even date herewith and assigned to the same assignee, is a related application.
Continuations (1)
|
Number |
Date |
Country |
Parent |
09516350 |
Mar 2000 |
US |
Child |
10211842 |
Aug 2002 |
US |