The present disclosure relates to a semiconductor device and a method of manufacturing the semiconductor device.
In a semiconductor device, an oxide film is provided on the upper surface of a semiconductor substrate, and polyimide is provided thereon. However, the adhesion between the oxide film and the polyimide is weak; therefore, if the device is continuously exposed to high humidity, moisture spreads from the interface between polyimide and the oxide film in the termination region over time. There has been a problem causing the electric field concentration between the outermost guard ring and the channel stopper.
In response to this, a semiconductor device has been proposed in which a groove is provided on the upper surface of the semiconductor substrate in the termination region to improve the moisture resistance without increasing the length of the termination region (for example, see International Publication No. 2020/105097).
However, the technique described in International Publication No. 2020/105097 has had a problem in that, the groove provided in the termination region takes a rectangular shape, which weakens the adhesion in terms of peeling in the vertical direction; therefore, when thermal stress is applied to the chip as in a power cycle, peeling occurs in the vertical direction.
An object of the present disclosure is to provide a technique that improves power cycle tolerance while improving the moisture resistance in a semiconductor device.
A semiconductor device according to the present disclosure includes a semiconductor substrate, an oxide film, a surface protective film, and at least one of concave portion and convex portion. The semiconductor substrate has a first main surface and a second main surface, a surface opposite to the first main surface, in which an effective region through which a current flows and a termination region formed so as to surround the outer peripheral side of the effective region are defined. The oxide film is provided in contact with the first main surface of the termination region covering the first main surface. The surface protective film contains an insulating material and provided so as to cover a portion of the oxide film excluding the peripheral portion. The concave portion is concave downward at a portion that is covered by the surface protective film. The convex portion protrudes upward at a portion that is covered by the surface protective film. The concave portion has a portion in which the width thereof decreases upward. The convex portion has a portion in which the width thereof increases upward.
The adhesion between the surface protective film and the semiconductor substrate improves, and the creeping distance from the outer peripheral end of the surface protective film to the inner peripheral side, for example, a guard ring is increased, so that the moisture resistance of the semiconductor device is improved. Further, the anchor effect produced by the concave portion or the convex portion improves the adhesion in the vertical direction of the semiconductor device, improving the power cycle tolerance of the semiconductor device.
These and other objects, features, aspects and advantages of the present disclosure will become more apparent from the following detailed description of the present disclosure when taken in conjunction with the accompanying drawings.
A first embodiment will be described below with reference to the drawings.
As illustrated in
As illustrated in
As illustrated in
A semiconductor substrate 1 in a wafer state is diced into a chip, and the diced portion corresponds to the outer peripheral end of the semiconductor substrate 1, that is, the terminal end of the chip. The organic insulating film 6 is selectively provided on a part of the upper surface of the oxide film 4 so as to cover the insulating protective film 5. Specifically, the organic insulating film 6 contains an insulating material and is provided so as to cover the portion of the oxide film 4 excluding the peripheral portion. The organic insulating film 6 is, for example, polyimide. The organic insulating film 6 is in direct contact with the oxide film 4 in the termination region 7 between the outermost guard ring 3 and the outer peripheral edge of the semiconductor substrate 1. The organic insulating film 6 is not provided up to the peripheral portion of the semiconductor substrate 1.
In the present embodiment, at least one groove 8 is provided on the upper surface of semiconductor substrate 1 in the termination region 7. In the present embodiment, a case where a plurality of grooves 8 are provided will be described. The organic insulating film 6 is embedded in the groove 8, and the groove 8 has a portion in which the width thereof decreases upward. The width of the groove 8 indicates the width in the horizontal direction in
Next, the top view shape of the groove 8 will be described.
As illustrated in
Alternatively, as illustrated in
Next, a method of forming the groove 8 will be described. First, the oxide film 4 is formed on the upper surface of the semiconductor substrate 1. Next, trench etching is performed from the upper surface of the oxide film 4 to form the first concave portion 1a. By adjusting the etching conditions, the first concave portion 1a having a portion in which the width thereof decreases upward is formed. Alternatively, instead of trench etching, adjusting the doping amount of nitrogen in the drift layer also allows the formation of the first concave portion 1a having a portion in which the width thereof decreases upward.
Next, thermal oxidation is used to form the oxide film 4 on the front surface of the first concave portion 1a, thereby forming the second concave portion 4a. The second concave portion 4a is formed following the shape of the first concave portion 1a; therefore, the second concave portion 4a also has a portion in which the width thereof decreases upward.
As described above, the semiconductor device according to the first embodiment includes the semiconductor substrate 1 having the upper surface and the lower surface, a surface opposite to the upper surface, in which the effective region 2 through which a current flows and the termination region 7 formed so as to surround the outer peripheral side of the effective region 2 are defined, the oxide film 4 provided in contact with the upper surface of termination region 7 so as to cover the upper surface, the organic insulating film 6 containing an insulating material and provided so as to cover a portion of the oxide film 4 excluding the peripheral portion, and grooves 8 as the concave portions concave downward in the portion of the oxide film 4 covered with the organic insulating film 6, and the grooves 8 have a portion in which the width thereof decreases upward. Further, the organic insulating film 6 contains polyimide.
Moisture enters from the outer peripheral edge of the organic insulating film 6 and spreads along the grooves 8; therefore, the creeping distance where the moisture reaches the outermost guard ring 3 is long. In addition, the grooves 8 are filled with the organic insulating film 6, which improves the adhesion between the organic insulating film 6 and the oxide film 4, so that the adhesion between the organic insulating film 6 and the semiconductor substrate 1 is improved. The spread of moisture from the outer peripheral edge of the organic insulating film 6 can be suppressed, improving the humidity resistance of the semiconductor device.
Further, the grooves 8 have a portion in which the width thereof decreases upward; therefore, the anchor effect produced by the grooves 8 improves the adhesion in the vertical direction of the semiconductor device, improving the power cycle tolerance of the semiconductor device.
Further, the termination region 7 is made shortened, which allows the chip size to be reduced, reducing the manufacturing cost of the semiconductor device.
Further the groove 8 has the first concave portion 1a provided on the upper surface of the semiconductor substrate 1 and having an internal space having a trapezoidal cross-sectional shape, and the second concave portion 4a provided on the front surface of the first concave portion 1a and having an internal space formed of the oxide film 4 and having a trapezoidal cross-sectional shape. Also, in a method of manufacturing the semiconductor device according to the first embodiment, the grooves 8 have the first concave portion 1a and the second concave portion 4a, and the method of manufacturing the semiconductor device includes Step (a) of forming the first concave portion 1a having an internal space having a trapezoidal cross-sectional shape provided on the upper surface of the semiconductor substrate 1, and Step (b) of forming the second concave portion 4a provided on the front surface of the first concave portion 1a and having an inner space made of the oxide film 4 and having a trapezoidal cross-sectional shape.
Therefore, the first concave portion 1a can be formed in the trench etching step, which is an existing step; therefore, formation of the groove 8 is ensured by simply adding Step (b) of forming the second concave portion 4a on the front surface of the first concave portion 1a to the existing step. This ensures realizing improvement of the moisture resistance and power cycle tolerance of the semiconductor device.
Further, the concave portion is a groove 8 parallelly extending with respect to the contour of the organic insulating film 6 in top view. Therefore, moisture that has entered from the outer peripheral edge of the organic insulating film 6 spreads toward the center of the semiconductor substrate 1; therefore, by providing the grooves 8 extending in a direction perpendicular to the direction of spreading of moisture, that is, in a direction parallelly extending with respect to the top view contour of the organic insulating film 6, the creepage distance from the outer peripheral edge of the organic insulating film 6 to the effective region 2 is made long.
In addition, the grooves 8 are formed in a grid pattern in top view, and the adhesion area between the organic insulating film 6 and the semiconductor substrate 1 in the termination region 7 increases, thereby improving the adhesion between the organic insulating film 6 and the semiconductor substrate 1 further.
Next, a semiconductor device according to a second embodiment will be explained.
As illustrated in
Next, a method of forming the groove 8 will be described. First, the oxide film 4 is formed on the upper surface of the semiconductor substrate 1. Next, trench etching is performed from the upper surface of the oxide film 4 to form the first concave portion 1a having an internal space having a rectangular cross-sectional shape. Alternatively, instead of trench etching, adjusting the doping amount of nitrogen in the drift layer also allows the formation of the first concave portion 1a.
Next, thermal oxidation is used to form the oxide film 4 on the front surface of the first concave portion 1a, thereby forming the second concave portion 4a having an internal space having a rectangular cross-sectional shape. Next, a deposited oxide film is deposited on the front surface of the oxide film 4 by a CVD method to form the adhesion film 9, thereby forming the third concave portion 9a having an internal space having a trapezoidal cross-sectional shape on the surface of the second concave portion 4a.
As described above, in the semiconductor device according to the second embodiment, as in the case of the first embodiment, the groove 8 has a portion in which the width thereof decreases upward, improving power cycle tolerance while improving the moisture resistance.
Further the groove 8 has the first concave portion 1a provided on the upper surface of the semiconductor substrate 1 and having an internal space having a rectangular cross-sectional shape, the second concave portion 4a provided on the front surface of the first concave portion 1a and having an internal space formed of the oxide film 4 and having a rectangular cross-sectional shape, and the third concave portion 9a provided on the front surface of the second concave portion 4a and having an internal space formed of the adhesion film 9 having a trapezoidal cross-sectional shape. The adhesion film 9 includes a deposited oxide film. Also, in a method of manufacturing the semiconductor device according to the second embodiment, the grooves 8 have the first concave portion 1a, the second concave portion 4a, and the third concave portion 9a, and the method of manufacturing the semiconductor device includes Step (c) of forming the first concave portion 1a having an internal space having a rectangular cross-sectional shape provided on the upper surface of the semiconductor substrate 1, Step (d) of forming the second concave portion 4a provided on the front surface of the first concave portion 1a and having an inner space made of the oxide film 4 and having a rectangular cross-sectional shape, and Step (e) of forming the third concave portion 9a provided on the front surface of the second concave portion 4a and having an inner space formed of the adhesion film 9 having a trapezoidal cross-sectional shape.
The deposited oxide film is typically used in a semiconductor device as an interlayer film, and a deposited oxide film forming process is typically adopted in a manufacturing process of a semiconductor device. In the second embodiment, by forming a deposited oxide film after trench etching, the formation of the grooves 8 that can easily obtain an anchor effect by using existing processes is ensured.
Next, a semiconductor device according to a third embodiment will be explained.
As illustrated in
Further, although not illustrated, the plurality of ridges 10 extend in parallel to the entire circumference of the top view contour of the organic insulating film 6. That is, the plurality of ridges 10 are provided so as to be parallel to the terminal end of the chip in top view, and are formed in a striped pattern. Alternatively, the plurality of ridges 10 may be formed not in a striped pattern but in a grid pattern in top view over the entire circumference of the organic insulating film 6.
Next, a method of forming the ridge 10 will be described with reference to
Further, when the polysilicon film 10c is formed, as illustrated in
As described above, the semiconductor device according to the third embodiment includes, instead of the grooves 8 in the case of the first embodiment, in the portion of the oxide film 4 covered with the organic insulating film 6, the ridges 10 serving as convex portions protruding upward, and the ridges 10 have a portion in which the width thereof increases upward. Thereby, improving the power cycle tolerance while improving the moisture resistance.
The ridges 10 are provided between the oxide film 4 and the organic insulating film 6 and are made of a second adhesion film. Also, the second adhesion film includes a deposited oxide film or a polysilicon film. The adhesion between the second adhesion film forming the ridges 10 and the organic insulating film 6 is higher than the adhesion between the organic insulating film 6 and the oxide film 4; therefore, more improvement in the moisture resistance and power cycle tolerance than that in the case of the first embodiment is ensured.
Further, the convex portion is a ridge 10 parallelly extending with respect to the contour of the organic insulating film 6 in top view. Therefore, moisture that has entered from the outer peripheral edge of the organic insulating film 6 spreads toward the center of the semiconductor substrate 1; therefore, by providing the ridges 10 extending in a direction perpendicular to the direction of spreading of moisture, that is, in a direction parallelly extending with respect to the top view contour of the organic insulating film 6, the creepage distance from the outer peripheral edge of the organic insulating film 6 to the effective region 2 is made long.
In addition, the ridges 10 are formed in a grid pattern in top view, and the adhesion area between the organic insulating film 6 and the semiconductor substrate 1 in the termination region 7 increases, thereby improving the adhesion between the organic insulating film 6 and the semiconductor substrate 1 further.
Next, a semiconductor device according to a fourth embodiment will be explained.
As illustrated in
The grooves 8 are formed by the same method as in the first embodiment, and the ridges 10 are formed by the same method as in the third embodiment, so the description therefor is omitted here.
As described above, the semiconductor device according to the fourth embodiment includes the grooves 8 as concave portions convex downward and the ridges 10 as convex portions protruding upward in the portion of the oxide film 4 covered with the organic insulating film 6, in which the grooves 8 have a portion in which the width thereof decreases upward and the ridges 10 have a portion in which the width thereof increases upward.
This makes the interface through which moisture spreads uneven, and the creepage distance for moisture to reach the outermost guard ring 3 is increased more than that in the case of the first embodiment without increasing the length of the termination region 7. Further, the adhesion area between the organic insulating film 6 and the oxide film 4 increases, and more improvement in the moisture resistance than that in the first embodiment is ensured.
Although, the description of the semiconductor substrate 1 being made of silicon has been made in the first to fourth embodiments, the semiconductor substrate 1 is not limited to the one being made of silicon and may be the one made of a wide bandgap semiconductor having a larger bandgap than silicon. A wide bandgap semiconductor includes, for example, silicon carbide, gallium nitride-based materials, or diamond. Wide bandgap semiconductors are designed to have a high electric field strength at the interface; therefore, by adopting the configurations of the first to fourth embodiments for the semiconductor device including the semiconductor substrate 1 made of a wide bandgap semiconductor, the effect obtained from them becomes more remarkable and particularly effective.
The embodiments can be arbitrarily combined, appropriately modified or omitted.
Hereinafter, various aspects of the present disclosure will be collectively described as appendices.
A semiconductor device comprising;
The semiconductor device according to Appendix 1, wherein
The semiconductor device according to Appendix 1, wherein
The semiconductor device according to Appendix 3, wherein
The semiconductor device according to Appendix 1, wherein
The semiconductor device according to Appendix 5, wherein
The semiconductor device according to any one of Appendices 1 to 6, wherein
The semiconductor device according to any one of Appendices 1 to 6, wherein
The semiconductor device according to any one of Appendices 1 to 8, wherein
The semiconductor device according to any one of Appendices 1 to 9, wherein
A method of manufacturing the semiconductor device according to Appendix 1, wherein
A method of manufacturing the semiconductor device according to Appendix 1, wherein
A method of manufacturing the semiconductor device according to Appendix 5, comprising the steps of:
While the disclosure has been illustrated and described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is therefore understood that numerous modifications and variations can be devised without departing from the scope of the invention.
Number | Date | Country | Kind |
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2022-084896 | May 2022 | JP | national |