Claims
- 1. A semiconductor device, comprising:a semiconductor substrate; a first conductive layer provided on a surface of said semiconductor substrate; a first interlayer insulating film provided on said surface of the semiconductor substrate and covering said first conductive layer; a gate electrode provided on said first interlayer first interlayer insulating film and having upper and lower surfaces; a second interlayer insulating film provided on said first interlayer insulating film and covering said gate electrode; a contact hole provided to penetrate through said second interlayer insulating film, said gate electrode and said first interlayer insulating film having a bottom portion extending radially outward to expose said first conductive layer; a least one of source and drain regions formed filled in said bottom portion of said contact hole and connected to said first conductive layer; a channel semiconductor layer formed filled in said contact hole on a surface of said one of said source and drain regions and opposing to said gate electrode; the other one of said source and drain regions formed filled in said contact hole on a surface of said channel semiconductor layer; and a gate insulating film provided between said gate electrode and said channel semiconductor layer.
- 2. The semiconductor device according to claim 1, further comprisinga silicon nitride film provided between said semiconductor substrate and said gate electrode.
- 3. The semiconductor device according to claim 1, wherein said contact hole has a columnar shape extending vertically upward with respect to said semiconductor substrate; andradius of said column is made equal to or smaller than maximum width of a depletion layer, in said channel semiconductor layer.
- 4. The semiconductor device according to claim 1, wherein an upper end surface of said channel semiconductor layer is made higher than the upper surface of said gate electrode.
Priority Claims (2)
Number |
Date |
Country |
Kind |
5-135430 |
May 1993 |
JP |
|
5-345126 |
Dec 1993 |
JP |
|
Parent Case Info
This application is a Continuation of application Ser. No. 09/295,363 filed Apr. 21, 1999 now U.S. Pat. No. 6,127,209, which is a Divisional of application Ser. No. 08/582,810 filed Jan. 4, 1996, now U.S. Pat. No. 5,994,735, which is a Continuation of application Ser. No. 08/238,084 filed May 4, 1994, now abandoned.
US Referenced Citations (16)
Foreign Referenced Citations (2)
Number |
Date |
Country |
63-293874 |
Nov 1988 |
JP |
3-225873 |
Oct 1991 |
JP |
Non-Patent Literature Citations (2)
Entry |
“Impact of Surrounding Gate Transistor (SGT) for Ultra High-Density LSI's” by Takato et al., IEEE Transactions of Electron Devices, vol. 38, No. 3 (Mar. 1991), pp. 573-578. |
“Silicon-on-Insulator ‘Gate-All-Around Device’” by Colinge et al., IEEE (1990), pp. 25.4.1-25.4.4. |
Continuations (2)
|
Number |
Date |
Country |
Parent |
09/295363 |
Apr 1999 |
US |
Child |
09/640880 |
|
US |
Parent |
08/238084 |
May 1994 |
US |
Child |
08/582810 |
|
US |