The present disclosure relates to a semiconductor device such as a diode and a transistor having a trench structure, and a production method for the semiconductor device.
Conventionally, as described in JP 2016-502270A, there has been known a semiconductor device having a trench structure in which a trench is formed in a semiconductor layer having a first conductivity type that forms a Schottky barrier, and a lightly doped region of a second conductivity type is formed in the semiconductor layer disposed at the bottom of the trench.
In the conventional semiconductor device described above, in a plan view of the semiconductor substrate, the low-concentration region of the second conductivity type protrudes out of the trench.
In such a structure where the low-concentration region of the second conductivity type protrudes outward from the bottom portion of the trench, the low-concentration region of the second conductivity type protrudes in a conductive region for forward current. This causes an increase in on-resistance and degradation of the forward characteristics.
By forming the above low-concentration region of the second conductivity type to improve the voltage resistance, and also by forming the region larger, the voltage resistance can be improved, but at the same time the on-resistance will increase. It is difficult to improve the voltage resistance while suppressing the increase in on-resistance.
Also, for certain semiconductor materials such as next-generation device materials (GaN, SiC, and the like), there may be a situation in which ion implantation technology is not yet fully established. When such materials are selected, it may be difficult to precisely form the low concentration region of the second conductivity type in the desired range using ion implantation techniques.
According to one embodiment of the present disclosure, there is provided a semiconductor device including: a semiconductor substrate; a first semiconductor layer of a first conductivity type that is deposited on a surface of the semiconductor substrate; a second semiconductor layer of a second conductivity type that is deposited by crystal growth using epitaxial growth on a bottom of a recess of the first semiconductor layer; a trench that has a lateral surface constituted by the first semiconductor layer and a bottom surface at least partly constituted by the second semiconductor layer; an insulating film that covers the bottom surface and the lateral surface of the trench; a conductive body that fills inside the trench that is covered by the insulating film; and a metal film that is electrically connected to the conductive body and forms a Schottky barrier with a surface of the first semiconductor layer, wherein the second semiconductor layer constitutes all or a middle portion of the bottom surface of the trench and is within a region of the trench in a plan view of the semiconductor substrate.
According to one embodiment of the present disclosure, there is provided a production method for a semiconductor device, the semiconductor device including: a semiconductor substrate; a first semiconductor layer of a first conductivity type that is deposited on a surface of the semiconductor substrate; a second semiconductor layer of a second conductivity type that is deposited on a bottom of a recess of the first semiconductor layer; a trench that has a lateral surface constituted by the first semiconductor layer and a bottom surface at least partly constituted by the second semiconductor layer; an insulating film that covers the bottom surface and the lateral surface of the trench; a conductive body that fills inside the trench that is covered by the insulating film; and a metal film that is electrically connected to the conductive body and forms a Schottky barrier with a surface of the first semiconductor layer, the production method including: depositing the second semiconductor layer including an impurity of a second conductivity type by epitaxial growth on the first semiconductor layer.
Hereinafter, an embodiment of the present disclosure will be explained with reference to the drawings.
First, a production method for a semiconductor device according to a first embodiment and the semiconductor device will be described.
The semiconductor device is produced as follows.
The semiconductor substrate 101 is an N-type high-concentration silicon substrate. The semiconductor layer 102 is an N-type low-concentration semiconductor layer deposited on the surface of the semiconductor substrate 101 by an epitaxial growth method.
Next, as shown in
Next, as shown in
Next, as shown in
Next, as shown in
Next, insulating films (thermal oxide films) 107a and 107b are formed on the surface of the upper layer portion 105 including inside the trench 106 and an upper surface of the second semiconductor layer 103P exposed at a bottom surface of the trench 106 as shown in
Furthermore, after the insulating film 107b around the trench 106 is removed, as shown in
The semiconductor device 100 shown in
The second semiconductor layer 103P is arranged under the trench 106 and is within the region of the trench 106 in a plan view of the semiconductor substrate 101.
The region in the semiconductor layer deposited on the semiconductor substrate 101 except the region of the trench 106 in the plan view of the semiconductor substrate 101 is occupied by the first conductive type (N-type) region. Therefore, it is possible to ensure a large conductive region for forward current under a Schottky junction.
The semiconductor device 100 can be applied to SBDs (Schottky diodes), MOSFETs (metal-oxide-semiconductor field-effect transistors), IGBTs (Insulated Gate Bipolar Transistors), and the like.
When the semiconductor device 100 constitutes a MOSFET, the P-body, gate, and the like are formed in the center portion, and the surface electrode metal film 109b serves as a source electrode and the back electrode metal film 110 serves as a drain electrode. When the semiconductor device 100 constitutes an IGBT, further, a p-type high-concentration substrate is applied as the semiconductor substrate 101, the surface electrode metal film 109b serves as an emitter electrode, and the back electrode metal film 110 serves as a collector electrode.
Next, a production method for a semiconductor device according to a second embodiment and the semiconductor device will be described.
The semiconductor device is produced as follows.
Next, as shown in
Next, as shown in
Next, as shown in
Next, insulating films (thermal oxide films) 207a and 207b are formed on the surface of the first semiconductor layer 202 including inside the trench 206 and an upper surface of the second semiconductor layer 205P exposed at a bottom surface of the trench 206 as shown in
Furthermore, after the insulating film 207b around the trench 206 is removed, as shown in
The semiconductor device 200 shown in
The second conductive type region 205P is arranged under the trench 206 and is within the region of the trench 206 in a plan view of the semiconductor substrate 201.
The region in the semiconductor layer deposited on the semiconductor substrate 201 except the region of the trench 206 in the plan view of the semiconductor substrate 201 is occupied by the first conductive type (N-type) region. Therefore, it is possible to ensure a large conductive region for forward current under a Schottky junction.
The semiconductor device 200 can be applied to SBDs (Schottky diodes), MOSFETs (metal-oxide-semiconductor field-effect transistors), IGBTs (Insulated Gate Bipolar Transistors), and the like.
When the semiconductor device 200 constitutes a MOSFET, the P-body, gate, and the like are formed in the center portion, and the surface electrode metal film 209b serves as a source electrode and the back electrode metal film 210 serves as a drain electrode. When the semiconductor device 200 constitutes an IGBT, further, a p-type high-concentration substrate is applied as the semiconductor substrate 201, the surface electrode metal film 209b serves as an emitter electrode, and the back electrode metal film 210 serves as a collector electrode.
Next, a production method for a semiconductor device according to a third embodiment and the semiconductor device will be described.
The semiconductor device is produced as follows.
As shown in
Next, as a process of forming a mask after the process of forming a recess, first, an insulator layer 305 is formed as shown in
Next, as shown in
Therefore, as shown in
The sidewall insulator 305S is thicker at the portion closer to the bottom surface of the recess 304 because the etching progresses more at the portion closer to the opening of the recess 304.
On the surface 302a of the first semiconductor layer 302 around the recess 304, the insulator mask pattern 303 is covered by the insulator layer 305 before etching as shown in
The insulator mask pattern 303 and the sidewall insulator 305S remaining after the above anisotropic etching are collectively referred to as an insulator mask pattern 306.
As shown in
Next, the process of depositing the second semiconductor layer is performed. In the process of depositing the second semiconductor layer, a second semiconductor layer 308 including an impurity of a second conductivity type is deposited on the first semiconductor layer 302 by epitaxial growth.
In this embodiment, using the insulator mask pattern 306 as a mask, the second semiconductor layer is deposited on the first semiconductor layer 302 exposed at the middle portion 304c of the bottom surface of the recess 304. However, prior to this process, a process of forming a small recess is performed.
As the process of forming a small recess, by etching of the first semiconductor layer 302 exposed at the middle portion 304c of the bottom surface of the recess 304 using the insulator mask pattern 306 as a mask as shown in
Next, using the insulator mask pattern 306 as a mask as shown in
Next, the impurity in the second semiconductor layer 308 is diffused by heat treatment, and the second conductive type region 309P is formed as shown in
The insulator mask pattern 306 is removed, and a trench 310 is formed with the upper surface of the second conductive type region 309P as the middle portion of the bottom surface.
Next, insulating films (thermal oxide films) 311a and 311b are formed on the surface of the first semiconductor layer 302 including inside the trench 310 and an upper surface of the second semiconductor layer 308 exposed at a bottom surface of the trench 306 as shown in
Furthermore, after the insulating film 311b around the trench 310 is removed, as shown in
The semiconductor device 300 shown in
The second semiconductor layer 308 and the second conductive type region 309P, using the second semiconductor layer 308 as a diffusion source of the second conductive type impurity, are arranged under the trench 310 and are within the region of the trench 206 in a plan view of the semiconductor substrate 201.
The second semiconductor layer 308 and the second conductive type region 309P constitute the middle portion of the bottom surface of the trench 310, and are within the region of the trench 310 without being in contact with the outer edge of the region of the trench 310 in a plan view of the semiconductor substrate 301. The first semiconductor layer 302 constitutes an outer edge portion of the bottom surface of the trench 310 excluding the middle portion.
The region in the semiconductor layer deposited on the semiconductor substrate 301 except the region of the trench 310 in the plan view of the semiconductor substrate 301 is occupied by the first conductive type (N-type) region. Therefore, it is possible to ensure a large conductive region for forward current under a Schottky junction.
In this embodiment, the bottom surface of the trench 310 is formed to be flat, that is, the outer edge portion constituted by the first semiconductor layer 302 and the middle portion constituted by the second semiconductor layer 308 are located at the same depth.
The semiconductor device 300 can be applied to SBDs (Schottky diodes), MOSFETs (metal-oxide-semiconductor field-effect transistors), IGBTs (Insulated Gate Bipolar Transistors), and the like.
When the semiconductor device 300 constitutes a MOSFET, the P-body, gate, and the like are formed in the center portion, and the surface electrode metal film 313b serves as a source electrode and the back electrode metal film 314 serves as a drain electrode. When the semiconductor device 300 constitutes an IGBT, further, a p-type high-concentration substrate is applied as the semiconductor substrate 301, the surface electrode metal film 313b serves as an emitter electrode, and the back electrode metal film 314 serves as a collector electrode.
Next, a production method for a semiconductor device according to a fourth embodiment and the semiconductor device will be described.
The semiconductor device is produced as follows.
In the same manner as the process up to
An insulator mask pattern 403 and the sidewall insulator 405S remaining after the anisotropic etching in the same manner as the above third embodiment are collectively referred to as an insulator mask pattern 406.
As shown in
Next, the process of depositing the second semiconductor layer is performed. In the process of depositing the second semiconductor layer, a second semiconductor layer 407P including an impurity of a second conductivity type is deposited on the first semiconductor layer 402 by epitaxial growth.
In this embodiment, using the insulator mask pattern 406 as a mask, the second semiconductor layer 407P is deposited on the first semiconductor layer 402 exposed at the middle portion 404c of the bottom surface of the recess 404 to obtain a structure shown in
Next, the insulator mask pattern 406 is removed as shown in
Next, insulating films (thermal oxide films) 409a and 409b are formed on the surface of the first semiconductor layer 402 including inside the trench 408 and an upper surface of the second semiconductor layer 407P exposed at a bottom surface of the trench 408 as shown in
Furthermore, after the insulating film 409b around the trench 408 is removed, as shown in
The semiconductor device 400 shown in
The second semiconductor layer 407P is arranged under the trench 408 and is within the region of the trench 408 in a plan view of the semiconductor substrate 401.
The second semiconductor layer 408P constitutes the middle portion of the bottom surface of the trench 408, and is within the region of the trench 408 without being in contact with the outer edge of the region of the trench 408 in a plan view of the semiconductor substrate 401. The first semiconductor layer 402 constitutes an outer edge portion of the bottom surface of the trench 408 excluding the middle portion.
The region in the semiconductor layer deposited on the semiconductor substrate 401 except the region of the trench 408 in the plan view of the semiconductor substrate 401 is occupied by the first conductive type (N-type) region. Therefore, it is possible to ensure a large conductive region for forward current under a Schottky junction.
In this embodiment, the trench 408 has a protruding portion constituted by the second semiconductor layer 407P on the bottom surface, that is, the middle portion constituted by the second semiconductor layer 407P is formed so as to protrude with respect to the outer edge portion constituted by the first semiconductor layer 402.
The semiconductor device 400 can be applied to SBDs (Schottky diodes), MOSFETs (metal-oxide-semiconductor field-effect transistors), IGBTs (Insulated Gate Bipolar Transistors), and the like.
When the semiconductor device 400 constitutes a MOSFET, the P-body, gate, and the like are formed in the center portion, and the surface electrode metal film 411b serves as a source electrode and the back electrode metal film 412 serves as a drain electrode. When the semiconductor device 400 constitutes an IGBT, further, a p-type high-concentration substrate is applied as the semiconductor substrate 401, the surface electrode metal film 411b serves as an emitter electrode, and the back electrode metal film 412 serves as a collector electrode.
Next, a production method for a semiconductor device according to a fifth embodiment and the semiconductor device will be described.
The semiconductor device is produced as follows.
Next, in a process of depositing the second semiconductor layer, a second semiconductor layer 504P including an impurity of a second conductivity type (P-type) is deposited on the bottom by epitaxial growth.
In the process of depositing the second semiconductor layer of this embodiment, on the lower layer portion 502 in the region where a trench is to be formed using the mask pattern 503 as a mask, the second semiconductor layer 504P is deposited so as to be thinner than the mask pattern 503. The resulting gap, that is, the gap formed by the second semiconductor layer 504P and the mask pattern 503, is filled with a nitride film 505 to obtain a structure shown in
Next, as shown in
Next, the mask pattern 503 is removed as shown in
Next, as shown in
Next, as shown in
After that, the trench 508 is filled with a conductive body 510 as shown in
Furthermore, after the insulating film 509b around the trench 508 is removed, as shown in
The semiconductor device 500 shown in
The second semiconductor layer 504P is arranged under the trench 508 and is within the region of the trench 508 in a plan view of the semiconductor substrate 501.
The region in the semiconductor layer deposited on the semiconductor substrate 501 except the region of the trench 508 in the plan view of the semiconductor substrate 501 is occupied by the first conductivity type (N-type) region. Therefore, it is possible to ensure a large conductive region for forward current under a Schottky junction.
The semiconductor device 500 can be applied to SBDs (Schottky diodes), MOSFETs (metal-oxide-semiconductor field-effect transistors), IGBTs (Insulated Gate Bipolar Transistors), and the like.
When the semiconductor device 500 constitutes a MOSFET, the P-body, gate, and the like are formed in the center portion, and the surface electrode metal film 511b serves as a source electrode and the back electrode metal film 512 serves as a drain electrode. When the semiconductor device 500 constitutes an IGBT, further, a p-type high-concentration substrate is applied as the semiconductor substrate 501, the surface electrode metal film 511b serves as an emitter electrode, and the back electrode metal film 512 serves as a collector electrode.
Next, a production method for a semiconductor device according to a sixth embodiment and the semiconductor device will be described.
This embodiment will be described as a semiconductor device based on the semiconductor device 100 of the first embodiment or the semiconductor device 500 of the fifth embodiment above.
As shown in
The upper surfaces 105a, 507a protrude so that the tops are in the middle portion away from the conductive bodies 108, 510 on both sides. This structure allows the upper surfaces 105a, 507a to have larger areas and, therefore, larger Schottky junction surfaces, which are surfaces joined with the Schottky metal films 109a, 511a, and enables a larger forward current to flow. Therefore, it is possible to achieve forward characteristics with low on-resistance.
Such convex upper surfaces 105a, 507a can be configured by the production method described in the above first or fifth embodiment.
The upper layer portion 105 of the above first embodiment is deposited by the epitaxial growth method using the etching mask pattern 104 as a mask. Therefore, the amount of deposition is maximum in the middle away from the edge of the etching mask pattern 104, and the above convex upper surface 105a is formed.
The upper layer portion 507 of the above fifth embodiment is deposited by the epitaxial growth method using the nitride film 506 as a mask. Therefore, the amount of deposition is maximum in the middle away from the edge of the nitride film 506, and the above convex upper surface 507a is formed.
After that, without flattening the convex upper surfaces 105a, 507a, Schottky metal films 109a, 511a are vapor-deposited.
In this way, a Schottky junction can be obtained formed on the convex upper surfaces 105a, 507a.
According to the above-described embodiments, the second semiconductor layer of the second conductivity type arranged under the trench relaxes the electric field when a reverse voltage is applied so as to improve the voltage resistance. Furthermore, it is possible to ensure the conductive region for forward current under a Schottky junction so as to suppress the increase in on-resistance.
Furthermore, a second semiconductor layer of the second conductivity type can be precisely formed in a desired range at the bottom of the trench using epitaxial technology without using an ion implantation method. Therefore, semiconductor materials for which ion implantation technology has not been sufficiently established, such as GaN (gallium nitride), can be selected as the semiconductor substrate 301, first semiconductor layers 102, 105, and second semiconductor layer 103. The semiconductor substrate 301, the first semiconductor layers 102, 105, and the second semiconductor layer 103 may be SiC (silicon carbide), diamond, Ga2O3 (gallium oxide), or AlN (aluminum nitride).
When epitaxial technology is used, the impurity profile can be made steeper than when ion implantation is used. Therefore, the second conductive type region is less likely to spread to the conductive region under the Schottky junction, and thus the increase in on-resistance can be suppressed.
According to the first or fifth embodiment, the shape of the trench can be configured without etching process. Therefore, post-treatment of a damaged etching surface becomes unnecessary.
According to the first or fifth embodiment, since the lower layer portion and the upper layer portion of the first semiconductor layer are stacked in separate processes, the doping concentration can be different between the lower layer portion and the upper layer portion of the first semiconductor layer. This can be expected to improve performance. (For example, by increasing the doping concentration in the lower layer portion compared to the upper layer portion, the on-resistance is reduced.)
A point 11 in the graph of
A point 14 in the graph of
A line 16 in the graph of
Among the SBDs of comparative examples in which the P-type region 103P protrudes outward from the trench 106, the SBD indicated by point 14 had an improved voltage resistance VRM than a SBD of a comparative example having no P-type region 103P. However, the forward voltage VF increased in turn.
In the SBD of comparative examples having the P-type region 103P protruding outward from the trench 106, the forward voltage VF increases as the voltage resistance VRM is improved. This is because the improvement of voltage resistance is achieved, but is accompanied by an increase in on-resistance.
In contrast, in the SBD of the example of the present invention (point 11), the voltage resistance was improved while suppressing the increase in on-resistance. Thus, compared to the comparative examples, it was possible to achieve lower VF and higher voltage resistance VRM.
The embodiments of the present disclosure have been described above, but these embodiments are shown as examples and can be implemented in various other forms. Omission, replacement, or modification of components may be made as long as they do not depart from the gist of the invention.
The present disclosure can be used for a semiconductor device and a production method for the semiconductor device.
Number | Date | Country | Kind |
---|---|---|---|
2019-065368 | Mar 2019 | JP | national |
Filing Document | Filing Date | Country | Kind |
---|---|---|---|
PCT/JP2020/013716 | 3/26/2020 | WO | 00 |